2624 	int vfs = rvu->vfs;  in rvu_mbox_intr_handler()  local
2631 	if (vfs > 64) {  in rvu_mbox_intr_handler()
2635 		rvu_queue_work(&rvu->afvf_wq_info, 64, vfs, intr);  in rvu_mbox_intr_handler()
2636 		vfs -= 64;  in rvu_mbox_intr_handler()
2644 	rvu_queue_work(&rvu->afvf_wq_info, 0, vfs, intr);  in rvu_mbox_intr_handler()
2833 	if (rvu->vfs > 64)  in rvu_flr_intr_handler()
2834 		rvu_afvf_queue_flr_work(rvu, 64, rvu->vfs - 64);  in rvu_flr_intr_handler()
3173 	int vfs = rvu->vfs;  in rvu_disable_afvf_intr()  local
3175 	rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INT_ENA_W1CX(0), INTR_MASK(vfs));  in rvu_disable_afvf_intr()
3176 	rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(vfs));  in rvu_disable_afvf_intr()
3177 	rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1CX(0), INTR_MASK(vfs));  in rvu_disable_afvf_intr()
3178 	if (vfs <= 64)  in rvu_disable_afvf_intr()
3182 		      INTR_MASK(vfs - 64));  in rvu_disable_afvf_intr()
3183 	rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(1), INTR_MASK(vfs - 64));  in rvu_disable_afvf_intr()
3184 	rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1CX(1), INTR_MASK(vfs - 64));  in rvu_disable_afvf_intr()
3189 	int vfs = rvu->vfs;  in rvu_enable_afvf_intr()  local
3195 	rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INTX(0), INTR_MASK(vfs));  in rvu_enable_afvf_intr()
3196 	rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INT_ENA_W1SX(0), INTR_MASK(vfs));  in rvu_enable_afvf_intr()
3199 	rvupf_write64(rvu, RVU_PF_VFFLR_INTX(0), INTR_MASK(vfs));  in rvu_enable_afvf_intr()
3200 	rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(0), INTR_MASK(vfs));  in rvu_enable_afvf_intr()
3201 	rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1SX(0), INTR_MASK(vfs));  in rvu_enable_afvf_intr()
3204 	if (vfs <= 64)  in rvu_enable_afvf_intr()
3207 	rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INTX(1), INTR_MASK(vfs - 64));  in rvu_enable_afvf_intr()
3209 		      INTR_MASK(vfs - 64));  in rvu_enable_afvf_intr()
3211 	rvupf_write64(rvu, RVU_PF_VFFLR_INTX(1), INTR_MASK(vfs - 64));  in rvu_enable_afvf_intr()
3212 	rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(1), INTR_MASK(vfs - 64));  in rvu_enable_afvf_intr()
3213 	rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1SX(1), INTR_MASK(vfs - 64));  in rvu_enable_afvf_intr()
3243 	int err, chans, vfs;  in rvu_enable_sriov()  local
3262 	vfs = pci_sriov_get_totalvfs(pdev);  in rvu_enable_sriov()
3265 	if (vfs > chans)  in rvu_enable_sriov()
3266 		vfs = chans;  in rvu_enable_sriov()
3268 	if (!vfs)  in rvu_enable_sriov()
3274 	if (vfs > 62)  in rvu_enable_sriov()
3275 		vfs = 62;  in rvu_enable_sriov()
3281 	rvu->vfs = vfs;  in rvu_enable_sriov()
3283 	err = rvu_mbox_init(rvu, &rvu->afvf_wq_info, TYPE_AFVF, vfs,  in rvu_enable_sriov()
3292 	err = pci_enable_sriov(pdev, vfs);  in rvu_enable_sriov()