Lines Matching refs:mvpp2_write
35 mvpp2_write(priv, MVPP2_PRS_SRAM_IDX_REG, pe->index); in mvpp2_prs_hw_write()
37 mvpp2_write(priv, MVPP2_PRS_SRAM_DATA_REG(i), pe->sram[i]); in mvpp2_prs_hw_write()
40 mvpp2_write(priv, MVPP2_PRS_TCAM_IDX_REG, pe->index); in mvpp2_prs_hw_write()
42 mvpp2_write(priv, MVPP2_PRS_TCAM_DATA_REG(i), pe->tcam[i]); in mvpp2_prs_hw_write()
62 mvpp2_write(priv, MVPP2_PRS_TCAM_IDX_REG, pe->index); in __mvpp2_prs_init_from_hw()
73 mvpp2_write(priv, MVPP2_PRS_SRAM_IDX_REG, pe->index); in __mvpp2_prs_init_from_hw()
96 mvpp2_write(priv, MVPP2_PRS_TCAM_IDX_REG, index); in mvpp2_prs_hw_inv()
97 mvpp2_write(priv, MVPP2_PRS_TCAM_DATA_REG(MVPP2_PRS_TCAM_INV_WORD), in mvpp2_prs_hw_inv()
1138 mvpp2_write(priv, MVPP2_PRS_INIT_LOOKUP_REG, val); in mvpp2_prs_hw_port_init()
1144 mvpp2_write(priv, MVPP2_PRS_MAX_LOOP_REG(port), val); in mvpp2_prs_hw_port_init()
1152 mvpp2_write(priv, MVPP2_PRS_INIT_OFFS_REG(port), val); in mvpp2_prs_hw_port_init()
2175 mvpp2_write(priv, MVPP2_PRS_TCAM_CTRL_REG, MVPP2_PRS_TCAM_EN_MASK); in mvpp2_prs_default_init()
2179 mvpp2_write(priv, MVPP2_PRS_TCAM_IDX_REG, index); in mvpp2_prs_default_init()
2181 mvpp2_write(priv, MVPP2_PRS_TCAM_DATA_REG(i), 0); in mvpp2_prs_default_init()
2183 mvpp2_write(priv, MVPP2_PRS_SRAM_IDX_REG, index); in mvpp2_prs_default_init()
2185 mvpp2_write(priv, MVPP2_PRS_SRAM_DATA_REG(i), 0); in mvpp2_prs_default_init()
2580 mvpp2_write(priv, MVPP2_PRS_TCAM_HIT_IDX_REG, index); in mvpp2_prs_hits()