Lines Matching +full:100 +full:base +full:- +full:tx
1 /* SPDX-License-Identifier: GPL-2.0 */
90 /* Loop limit on how long we wait for auto-negotiation to complete */
94 /* Number of 100 microseconds we wait for PCI Express master disable */
163 #define NWAY_AR_100TX_HD_CAPS 0x0080 /* 100TX Half Duplex Capable */
164 #define NWAY_AR_100TX_FD_CAPS 0x0100 /* 100TX Full Duplex Capable */
168 /* Link Partner Ability Register (Base Page) */
172 /* 1000BASE-T Control Register */
176 /* 1000BASE-T Status Register */
228 #define IGC_STATUS_SPEED_100 0x00000040 /* Speed 100Mb/s */
233 #define SPEED_100 100
239 /* 1Gbps and 2.5Gbps half duplex is not supported, nor spec-compliant. */
279 #define IGC_IMS_TXDW IGC_ICR_TXDW /* Tx desc written back */
288 #define IGC_QVECTOR_MASK 0x7FFC /* Q-vector mask */
330 #define IGC_TCTL_EN 0x00000002 /* enable Tx */
334 #define IGC_TCTL_RTLC 0x01000000 /* Re-transmit on late collision */
405 #define IGC_DTXMXPKTSZ_TSN 0x19 /* 1600 bytes of max TX DMA packet size */
406 #define IGC_DTXMXPKTSZ_DEFAULT 0x98 /* 9728-byte Jumbo frames */
465 #define IGC_TSYNCTXCTL_TXTT_0 0x00000001 /* Tx timestamp reg 0 valid */
466 #define IGC_TSYNCTXCTL_TXTT_1 0x00000002 /* Tx timestamp reg 1 valid */
467 #define IGC_TSYNCTXCTL_TXTT_2 0x00000004 /* Tx timestamp reg 2 valid */
468 #define IGC_TSYNCTXCTL_TXTT_3 0x00000008 /* Tx timestamp reg 3 valid */
469 #define IGC_TSYNCTXCTL_ENABLED 0x00000010 /* enable Tx timestamping */
474 #define IGC_TSYNCTXCTL_TXSYNSIG 0x00000020 /* Sample TX tstamp in PHY sop */
595 #define IGC_PTM_STAT_ADJUST_CYC BIT(5) /* 1588 timer adjusted during non-1st PTM cycle */
601 /* GPY211 - I225 defines */
614 #define IGC_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */
615 #define IGC_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */
619 #define MAX_PHY_REG_ADDRESS 0x1F /* 5 bit address bus (0-0x1F) */
639 #define PHY_LP_ABILITY 0x05 /* Link Partner Ability (Base Page) */
640 #define PHY_1000T_CTRL 0x09 /* 1000Base-T Control Reg */
641 #define PHY_1000T_STATUS 0x0A /* 1000Base-T Status Reg */
659 /* EEE Link-Partner Ability */
664 #define IGC_N0_QUEUE -1
684 #define IGC_IPCNFG_EEE_100M_AN 0x00000004 /* IPCNFG EEE Ena 100M AN */
686 #define IGC_EEER_TX_LPI_EN 0x00010000 /* EEER Tx LPI Enable */
695 /* Minimum time for 100BASE-T where no data will be transmit following move out
696 * of EEE LPI Tx state