Lines Matching refs:rd32
147 0 : rd32(E1000_STATUS); in igb_get_link_ksettings()
477 regs_buff[0] = rd32(E1000_CTRL); in igb_get_regs()
478 regs_buff[1] = rd32(E1000_STATUS); in igb_get_regs()
479 regs_buff[2] = rd32(E1000_CTRL_EXT); in igb_get_regs()
480 regs_buff[3] = rd32(E1000_MDIC); in igb_get_regs()
481 regs_buff[4] = rd32(E1000_SCTL); in igb_get_regs()
482 regs_buff[5] = rd32(E1000_CONNSW); in igb_get_regs()
483 regs_buff[6] = rd32(E1000_VET); in igb_get_regs()
484 regs_buff[7] = rd32(E1000_LEDCTL); in igb_get_regs()
485 regs_buff[8] = rd32(E1000_PBA); in igb_get_regs()
486 regs_buff[9] = rd32(E1000_PBS); in igb_get_regs()
487 regs_buff[10] = rd32(E1000_FRTIMER); in igb_get_regs()
488 regs_buff[11] = rd32(E1000_TCPTIMER); in igb_get_regs()
491 regs_buff[12] = rd32(E1000_EECD); in igb_get_regs()
497 regs_buff[13] = rd32(E1000_EICS); in igb_get_regs()
498 regs_buff[14] = rd32(E1000_EICS); in igb_get_regs()
499 regs_buff[15] = rd32(E1000_EIMS); in igb_get_regs()
500 regs_buff[16] = rd32(E1000_EIMC); in igb_get_regs()
501 regs_buff[17] = rd32(E1000_EIAC); in igb_get_regs()
502 regs_buff[18] = rd32(E1000_EIAM); in igb_get_regs()
506 regs_buff[19] = rd32(E1000_ICS); in igb_get_regs()
507 regs_buff[20] = rd32(E1000_ICS); in igb_get_regs()
508 regs_buff[21] = rd32(E1000_IMS); in igb_get_regs()
509 regs_buff[22] = rd32(E1000_IMC); in igb_get_regs()
510 regs_buff[23] = rd32(E1000_IAC); in igb_get_regs()
511 regs_buff[24] = rd32(E1000_IAM); in igb_get_regs()
512 regs_buff[25] = rd32(E1000_IMIRVP); in igb_get_regs()
515 regs_buff[26] = rd32(E1000_FCAL); in igb_get_regs()
516 regs_buff[27] = rd32(E1000_FCAH); in igb_get_regs()
517 regs_buff[28] = rd32(E1000_FCTTV); in igb_get_regs()
518 regs_buff[29] = rd32(E1000_FCRTL); in igb_get_regs()
519 regs_buff[30] = rd32(E1000_FCRTH); in igb_get_regs()
520 regs_buff[31] = rd32(E1000_FCRTV); in igb_get_regs()
523 regs_buff[32] = rd32(E1000_RCTL); in igb_get_regs()
524 regs_buff[33] = rd32(E1000_RXCSUM); in igb_get_regs()
525 regs_buff[34] = rd32(E1000_RLPML); in igb_get_regs()
526 regs_buff[35] = rd32(E1000_RFCTL); in igb_get_regs()
527 regs_buff[36] = rd32(E1000_MRQC); in igb_get_regs()
528 regs_buff[37] = rd32(E1000_VT_CTL); in igb_get_regs()
531 regs_buff[38] = rd32(E1000_TCTL); in igb_get_regs()
532 regs_buff[39] = rd32(E1000_TCTL_EXT); in igb_get_regs()
533 regs_buff[40] = rd32(E1000_TIPG); in igb_get_regs()
534 regs_buff[41] = rd32(E1000_DTXCTL); in igb_get_regs()
537 regs_buff[42] = rd32(E1000_WUC); in igb_get_regs()
538 regs_buff[43] = rd32(E1000_WUFC); in igb_get_regs()
539 regs_buff[44] = rd32(E1000_WUS); in igb_get_regs()
540 regs_buff[45] = rd32(E1000_IPAV); in igb_get_regs()
541 regs_buff[46] = rd32(E1000_WUPL); in igb_get_regs()
544 regs_buff[47] = rd32(E1000_PCS_CFG0); in igb_get_regs()
545 regs_buff[48] = rd32(E1000_PCS_LCTL); in igb_get_regs()
546 regs_buff[49] = rd32(E1000_PCS_LSTAT); in igb_get_regs()
547 regs_buff[50] = rd32(E1000_PCS_ANADV); in igb_get_regs()
548 regs_buff[51] = rd32(E1000_PCS_LPAB); in igb_get_regs()
549 regs_buff[52] = rd32(E1000_PCS_NPTX); in igb_get_regs()
550 regs_buff[53] = rd32(E1000_PCS_LPABNP); in igb_get_regs()
616 regs_buff[121 + i] = rd32(E1000_SRRCTL(i)); in igb_get_regs()
618 regs_buff[125 + i] = rd32(E1000_PSRTYPE(i)); in igb_get_regs()
620 regs_buff[129 + i] = rd32(E1000_RDBAL(i)); in igb_get_regs()
622 regs_buff[133 + i] = rd32(E1000_RDBAH(i)); in igb_get_regs()
624 regs_buff[137 + i] = rd32(E1000_RDLEN(i)); in igb_get_regs()
626 regs_buff[141 + i] = rd32(E1000_RDH(i)); in igb_get_regs()
628 regs_buff[145 + i] = rd32(E1000_RDT(i)); in igb_get_regs()
630 regs_buff[149 + i] = rd32(E1000_RXDCTL(i)); in igb_get_regs()
633 regs_buff[153 + i] = rd32(E1000_EITR(i)); in igb_get_regs()
635 regs_buff[163 + i] = rd32(E1000_IMIR(i)); in igb_get_regs()
637 regs_buff[171 + i] = rd32(E1000_IMIREXT(i)); in igb_get_regs()
639 regs_buff[179 + i] = rd32(E1000_RAL(i)); in igb_get_regs()
641 regs_buff[195 + i] = rd32(E1000_RAH(i)); in igb_get_regs()
644 regs_buff[211 + i] = rd32(E1000_TDBAL(i)); in igb_get_regs()
646 regs_buff[215 + i] = rd32(E1000_TDBAH(i)); in igb_get_regs()
648 regs_buff[219 + i] = rd32(E1000_TDLEN(i)); in igb_get_regs()
650 regs_buff[223 + i] = rd32(E1000_TDH(i)); in igb_get_regs()
652 regs_buff[227 + i] = rd32(E1000_TDT(i)); in igb_get_regs()
654 regs_buff[231 + i] = rd32(E1000_TXDCTL(i)); in igb_get_regs()
656 regs_buff[235 + i] = rd32(E1000_TDWBAL(i)); in igb_get_regs()
658 regs_buff[239 + i] = rd32(E1000_TDWBAH(i)); in igb_get_regs()
660 regs_buff[243 + i] = rd32(E1000_DCA_TXCTRL(i)); in igb_get_regs()
663 regs_buff[247 + i] = rd32(E1000_IP4AT_REG(i)); in igb_get_regs()
665 regs_buff[251 + i] = rd32(E1000_IP6AT_REG(i)); in igb_get_regs()
667 regs_buff[255 + i] = rd32(E1000_WUPM_REG(i)); in igb_get_regs()
669 regs_buff[287 + i] = rd32(E1000_FFMT_REG(i)); in igb_get_regs()
671 regs_buff[415 + i] = rd32(E1000_FFVT_REG(i)); in igb_get_regs()
673 regs_buff[543 + i] = rd32(E1000_FFLT_REG(i)); in igb_get_regs()
675 regs_buff[547] = rd32(E1000_TDFH); in igb_get_regs()
676 regs_buff[548] = rd32(E1000_TDFT); in igb_get_regs()
677 regs_buff[549] = rd32(E1000_TDFHS); in igb_get_regs()
678 regs_buff[550] = rd32(E1000_TDFPC); in igb_get_regs()
689 regs_buff[555 + i] = rd32(E1000_SRRCTL(i + 4)); in igb_get_regs()
691 regs_buff[567 + i] = rd32(E1000_PSRTYPE(i + 4)); in igb_get_regs()
693 regs_buff[571 + i] = rd32(E1000_RDBAL(i + 4)); in igb_get_regs()
695 regs_buff[583 + i] = rd32(E1000_RDBAH(i + 4)); in igb_get_regs()
697 regs_buff[595 + i] = rd32(E1000_RDLEN(i + 4)); in igb_get_regs()
699 regs_buff[607 + i] = rd32(E1000_RDH(i + 4)); in igb_get_regs()
701 regs_buff[619 + i] = rd32(E1000_RDT(i + 4)); in igb_get_regs()
703 regs_buff[631 + i] = rd32(E1000_RXDCTL(i + 4)); in igb_get_regs()
706 regs_buff[643 + i] = rd32(E1000_TDBAL(i + 4)); in igb_get_regs()
708 regs_buff[655 + i] = rd32(E1000_TDBAH(i + 4)); in igb_get_regs()
710 regs_buff[667 + i] = rd32(E1000_TDLEN(i + 4)); in igb_get_regs()
712 regs_buff[679 + i] = rd32(E1000_TDH(i + 4)); in igb_get_regs()
714 regs_buff[691 + i] = rd32(E1000_TDT(i + 4)); in igb_get_regs()
716 regs_buff[703 + i] = rd32(E1000_TXDCTL(i + 4)); in igb_get_regs()
718 regs_buff[715 + i] = rd32(E1000_TDWBAL(i + 4)); in igb_get_regs()
720 regs_buff[727 + i] = rd32(E1000_TDWBAH(i + 4)); in igb_get_regs()
724 regs_buff[739] = rd32(E1000_I210_RR2DCDELAY); in igb_get_regs()
1227 val = rd32(reg) & mask; in reg_pattern_test()
1247 val = rd32(reg); in reg_set_and_check()
1308 before = rd32(E1000_STATUS); in igb_reg_test()
1309 value = (rd32(E1000_STATUS) & toggle); in igb_reg_test()
1311 after = rd32(E1000_STATUS) & toggle; in igb_reg_test()
1398 adapter->test_icr |= rd32(E1000_ICR); in igb_test_intr()
1653 ctrl_reg = rd32(E1000_CTRL); in igb_integrated_phy_loopback()
1686 reg = rd32(E1000_CTRL_EXT); in igb_setup_loopback_test()
1697 reg = rd32(E1000_MPHY_ADDR_CTL); in igb_setup_loopback_test()
1702 reg = rd32(E1000_MPHY_DATA); in igb_setup_loopback_test()
1707 reg = rd32(E1000_RCTL); in igb_setup_loopback_test()
1713 reg = rd32(E1000_CTRL); in igb_setup_loopback_test()
1722 reg = rd32(E1000_CONNSW); in igb_setup_loopback_test()
1730 reg = rd32(E1000_PCS_CFG0); in igb_setup_loopback_test()
1736 reg = rd32(E1000_PCS_LCTL); in igb_setup_loopback_test()
1765 reg = rd32(E1000_MPHY_ADDR_CTL); in igb_loopback_cleanup()
1770 reg = rd32(E1000_MPHY_DATA); in igb_loopback_cleanup()
1775 rctl = rd32(E1000_RCTL); in igb_loopback_cleanup()
2007 if (!(rd32(E1000_STATUS) & E1000_STATUS_LU)) in igb_link_test()
2650 u32 mrqc = rd32(E1000_MRQC); in igb_set_rss_hash_opt()
2700 etqf = rd32(E1000_ETQF(i)); in igb_rxnfc_write_etype_filter()
2726 vlapqf = rd32(E1000_VLAPQF); in igb_rxnfc_write_vlan_prio_filter()
2793 u32 etqf = rd32(E1000_ETQF(reg_index)); in igb_clear_etype_filter_regs()
2813 vlapqf = rd32(E1000_VLAPQF); in igb_clear_vlan_prio_filter()
3049 eeer = rd32(E1000_EEER); in igb_get_eee()