Lines Matching +full:- +full:phy
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
31 * igb_check_reset_block - Check if PHY reset is blocked
34 * Read the PHY management control register and check whether a PHY reset
48 * igb_get_phy_id - Retrieve the PHY ID and revision
51 * Reads the PHY registers and stores the PHY ID and possibly the PHY
56 struct e1000_phy_info *phy = &hw->phy; in igb_get_phy_id() local
60 /* ensure PHY page selection to fix misconfigured i210 */ in igb_get_phy_id()
61 if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211)) in igb_get_phy_id()
62 phy->ops.write_reg(hw, I347AT4_PAGE_SELECT, 0); in igb_get_phy_id()
64 ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id); in igb_get_phy_id()
68 phy->id = (u32)(phy_id << 16); in igb_get_phy_id()
70 ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id); in igb_get_phy_id()
74 phy->id |= (u32)(phy_id & PHY_REVISION_MASK); in igb_get_phy_id()
75 phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK); in igb_get_phy_id()
82 * igb_phy_reset_dsp - Reset PHY DSP
91 if (!(hw->phy.ops.write_reg)) in igb_phy_reset_dsp()
94 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xC1); in igb_phy_reset_dsp()
98 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0); in igb_phy_reset_dsp()
105 * igb_read_phy_reg_mdic - Read MDI control register
110 * Reads the MDI control register in the PHY at offset and stores the
115 struct e1000_phy_info *phy = &hw->phy; in igb_read_phy_reg_mdic() local
120 hw_dbg("PHY Address %d is out of range\n", offset); in igb_read_phy_reg_mdic()
121 ret_val = -E1000_ERR_PARAM; in igb_read_phy_reg_mdic()
125 /* Set up Op-code, Phy Address, and register offset in the MDI in igb_read_phy_reg_mdic()
127 * PHY to retrieve the desired data. in igb_read_phy_reg_mdic()
130 (phy->addr << E1000_MDIC_PHY_SHIFT) | in igb_read_phy_reg_mdic()
147 ret_val = -E1000_ERR_PHY; in igb_read_phy_reg_mdic()
152 ret_val = -E1000_ERR_PHY; in igb_read_phy_reg_mdic()
162 * igb_write_phy_reg_mdic - Write MDI control register
167 * Writes data to MDI control register in the PHY at offset.
171 struct e1000_phy_info *phy = &hw->phy; in igb_write_phy_reg_mdic() local
176 hw_dbg("PHY Address %d is out of range\n", offset); in igb_write_phy_reg_mdic()
177 ret_val = -E1000_ERR_PARAM; in igb_write_phy_reg_mdic()
181 /* Set up Op-code, Phy Address, and register offset in the MDI in igb_write_phy_reg_mdic()
183 * PHY to retrieve the desired data. in igb_write_phy_reg_mdic()
187 (phy->addr << E1000_MDIC_PHY_SHIFT) | in igb_write_phy_reg_mdic()
204 ret_val = -E1000_ERR_PHY; in igb_write_phy_reg_mdic()
209 ret_val = -E1000_ERR_PHY; in igb_write_phy_reg_mdic()
218 * igb_read_phy_reg_i2c - Read PHY register using i2c
223 * Reads the PHY register at offset using the i2c interface and stores the
228 struct e1000_phy_info *phy = &hw->phy; in igb_read_phy_reg_i2c() local
231 /* Set up Op-code, Phy Address, and register address in the I2CCMD in igb_read_phy_reg_i2c()
233 * PHY to retrieve the desired data. in igb_read_phy_reg_i2c()
236 (phy->addr << E1000_I2CCMD_PHY_ADDR_SHIFT) | in igb_read_phy_reg_i2c()
250 return -E1000_ERR_PHY; in igb_read_phy_reg_i2c()
254 return -E1000_ERR_PHY; in igb_read_phy_reg_i2c()
257 /* Need to byte-swap the 16-bit value. */ in igb_read_phy_reg_i2c()
264 * igb_write_phy_reg_i2c - Write PHY register using i2c
269 * Writes the data to PHY register at the offset using the i2c interface.
273 struct e1000_phy_info *phy = &hw->phy; in igb_write_phy_reg_i2c() local
278 if ((hw->phy.addr == 0) || (hw->phy.addr > 7)) { in igb_write_phy_reg_i2c()
279 hw_dbg("PHY I2C Address %d is out of range.\n", in igb_write_phy_reg_i2c()
280 hw->phy.addr); in igb_write_phy_reg_i2c()
281 return -E1000_ERR_CONFIG; in igb_write_phy_reg_i2c()
287 /* Set up Op-code, Phy Address, and register address in the I2CCMD in igb_write_phy_reg_i2c()
289 * PHY to retrieve the desired data. in igb_write_phy_reg_i2c()
292 (phy->addr << E1000_I2CCMD_PHY_ADDR_SHIFT) | in igb_write_phy_reg_i2c()
307 return -E1000_ERR_PHY; in igb_write_phy_reg_i2c()
311 return -E1000_ERR_PHY; in igb_write_phy_reg_i2c()
318 * igb_read_sfp_data_byte - Reads SFP module data.
338 return -E1000_ERR_PHY; in igb_read_sfp_data_byte()
341 /* Set up Op-code, EEPROM Address,in the I2CCMD in igb_read_sfp_data_byte()
359 return -E1000_ERR_PHY; in igb_read_sfp_data_byte()
363 return -E1000_ERR_PHY; in igb_read_sfp_data_byte()
371 * igb_read_phy_reg_igp - Read igp PHY register
376 * Acquires semaphore, if necessary, then reads the PHY register at offset
384 if (!(hw->phy.ops.acquire)) in igb_read_phy_reg_igp()
387 ret_val = hw->phy.ops.acquire(hw); in igb_read_phy_reg_igp()
396 hw->phy.ops.release(hw); in igb_read_phy_reg_igp()
404 hw->phy.ops.release(hw); in igb_read_phy_reg_igp()
411 * igb_write_phy_reg_igp - Write igp PHY register
416 * Acquires semaphore, if necessary, then writes the data to PHY register
423 if (!(hw->phy.ops.acquire)) in igb_write_phy_reg_igp()
426 ret_val = hw->phy.ops.acquire(hw); in igb_write_phy_reg_igp()
435 hw->phy.ops.release(hw); in igb_write_phy_reg_igp()
443 hw->phy.ops.release(hw); in igb_write_phy_reg_igp()
450 * igb_copper_link_setup_82580 - Setup 82580 PHY for copper link
453 * Sets up Carrier-sense on Transmit and downshift values.
457 struct e1000_phy_info *phy = &hw->phy; in igb_copper_link_setup_82580() local
461 if (phy->reset_disable) { in igb_copper_link_setup_82580()
466 if (phy->type == e1000_phy_82580) { in igb_copper_link_setup_82580()
467 ret_val = hw->phy.ops.reset(hw); in igb_copper_link_setup_82580()
469 hw_dbg("Error resetting the PHY.\n"); in igb_copper_link_setup_82580()
474 /* Enable CRS on TX. This must be set for half-duplex operation. */ in igb_copper_link_setup_82580()
475 ret_val = phy->ops.read_reg(hw, I82580_CFG_REG, &phy_data); in igb_copper_link_setup_82580()
484 ret_val = phy->ops.write_reg(hw, I82580_CFG_REG, phy_data); in igb_copper_link_setup_82580()
489 ret_val = phy->ops.read_reg(hw, I82580_PHY_CTRL_2, &phy_data); in igb_copper_link_setup_82580()
494 * 0 - Auto (default) in igb_copper_link_setup_82580()
495 * 1 - MDI mode in igb_copper_link_setup_82580()
496 * 2 - MDI-X mode in igb_copper_link_setup_82580()
498 switch (hw->phy.mdix) { in igb_copper_link_setup_82580()
509 ret_val = hw->phy.ops.write_reg(hw, I82580_PHY_CTRL_2, phy_data); in igb_copper_link_setup_82580()
516 * igb_copper_link_setup_m88 - Setup m88 PHY's for copper link
519 * Sets up MDI/MDI-X and polarity for m88 PHY's. If necessary, transmit clock
524 struct e1000_phy_info *phy = &hw->phy; in igb_copper_link_setup_m88() local
528 if (phy->reset_disable) { in igb_copper_link_setup_m88()
533 /* Enable CRS on TX. This must be set for half-duplex operation. */ in igb_copper_link_setup_m88()
534 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data); in igb_copper_link_setup_m88()
541 * MDI/MDI-X = 0 (default) in igb_copper_link_setup_m88()
542 * 0 - Auto for all speeds in igb_copper_link_setup_m88()
543 * 1 - MDI mode in igb_copper_link_setup_m88()
544 * 2 - MDI-X mode in igb_copper_link_setup_m88()
545 * 3 - Auto for 1000Base-T only (MDI-X for 10/100Base-T modes) in igb_copper_link_setup_m88()
549 switch (phy->mdix) { in igb_copper_link_setup_m88()
568 * 0 - Disabled in igb_copper_link_setup_m88()
569 * 1 - Enabled in igb_copper_link_setup_m88()
572 if (phy->disable_polarity_correction == 1) in igb_copper_link_setup_m88()
575 ret_val = phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data); in igb_copper_link_setup_m88()
579 if (phy->revision < E1000_REVISION_4) { in igb_copper_link_setup_m88()
580 /* Force TX_CLK in the Extended PHY Specific Control Register in igb_copper_link_setup_m88()
583 ret_val = phy->ops.read_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, in igb_copper_link_setup_m88()
590 if ((phy->revision == E1000_REVISION_2) && in igb_copper_link_setup_m88()
591 (phy->id == M88E1111_I_PHY_ID)) { in igb_copper_link_setup_m88()
592 /* 82573L PHY - set the downshift counter to 5x. */ in igb_copper_link_setup_m88()
602 ret_val = phy->ops.write_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, in igb_copper_link_setup_m88()
611 hw_dbg("Error committing the PHY changes\n"); in igb_copper_link_setup_m88()
620 * igb_copper_link_setup_m88_gen2 - Setup m88 PHY's for copper link
623 * Sets up MDI/MDI-X and polarity for i347-AT4, m88e1322 and m88e1112 PHY's.
628 struct e1000_phy_info *phy = &hw->phy; in igb_copper_link_setup_m88_gen2() local
632 if (phy->reset_disable) in igb_copper_link_setup_m88_gen2()
635 /* Enable CRS on Tx. This must be set for half-duplex operation. */ in igb_copper_link_setup_m88_gen2()
636 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data); in igb_copper_link_setup_m88_gen2()
641 * MDI/MDI-X = 0 (default) in igb_copper_link_setup_m88_gen2()
642 * 0 - Auto for all speeds in igb_copper_link_setup_m88_gen2()
643 * 1 - MDI mode in igb_copper_link_setup_m88_gen2()
644 * 2 - MDI-X mode in igb_copper_link_setup_m88_gen2()
645 * 3 - Auto for 1000Base-T only (MDI-X for 10/100Base-T modes) in igb_copper_link_setup_m88_gen2()
649 switch (phy->mdix) { in igb_copper_link_setup_m88_gen2()
658 if (phy->id != M88E1112_E_PHY_ID) { in igb_copper_link_setup_m88_gen2()
672 * 0 - Disabled in igb_copper_link_setup_m88_gen2()
673 * 1 - Enabled in igb_copper_link_setup_m88_gen2()
676 if (phy->disable_polarity_correction == 1) in igb_copper_link_setup_m88_gen2()
680 if (phy->id == M88E1543_E_PHY_ID) { in igb_copper_link_setup_m88_gen2()
683 phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data); in igb_copper_link_setup_m88_gen2()
689 hw_dbg("Error committing the PHY changes\n"); in igb_copper_link_setup_m88_gen2()
698 ret_val = phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data); in igb_copper_link_setup_m88_gen2()
705 hw_dbg("Error committing the PHY changes\n"); in igb_copper_link_setup_m88_gen2()
716 * igb_copper_link_setup_igp - Setup igp PHY's for copper link
719 * Sets up LPLU, MDI/MDI-X, polarity, Smartspeed and Master/Slave config for
720 * igp PHY's.
724 struct e1000_phy_info *phy = &hw->phy; in igb_copper_link_setup_igp() local
728 if (phy->reset_disable) { in igb_copper_link_setup_igp()
733 ret_val = phy->ops.reset(hw); in igb_copper_link_setup_igp()
735 hw_dbg("Error resetting the PHY.\n"); in igb_copper_link_setup_igp()
739 /* Wait 100ms for MAC to configure PHY from NVM settings, to avoid in igb_copper_link_setup_igp()
745 * non-IGP1 PHYs. in igb_copper_link_setup_igp()
747 if (phy->type == e1000_phy_igp) { in igb_copper_link_setup_igp()
749 if (phy->ops.set_d3_lplu_state) in igb_copper_link_setup_igp()
750 ret_val = phy->ops.set_d3_lplu_state(hw, false); in igb_copper_link_setup_igp()
758 ret_val = phy->ops.set_d0_lplu_state(hw, false); in igb_copper_link_setup_igp()
763 /* Configure mdi-mdix settings */ in igb_copper_link_setup_igp()
764 ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CTRL, &data); in igb_copper_link_setup_igp()
770 switch (phy->mdix) { in igb_copper_link_setup_igp()
782 ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CTRL, data); in igb_copper_link_setup_igp()
786 /* set auto-master slave resolution settings */ in igb_copper_link_setup_igp()
787 if (hw->mac.autoneg) { in igb_copper_link_setup_igp()
792 if (phy->autoneg_advertised == ADVERTISE_1000_FULL) { in igb_copper_link_setup_igp()
794 ret_val = phy->ops.read_reg(hw, in igb_copper_link_setup_igp()
801 ret_val = phy->ops.write_reg(hw, in igb_copper_link_setup_igp()
808 ret_val = phy->ops.read_reg(hw, PHY_1000T_CTRL, &data); in igb_copper_link_setup_igp()
813 ret_val = phy->ops.write_reg(hw, PHY_1000T_CTRL, data); in igb_copper_link_setup_igp()
818 ret_val = phy->ops.read_reg(hw, PHY_1000T_CTRL, &data); in igb_copper_link_setup_igp()
823 phy->original_ms_type = (data & CR_1000T_MS_ENABLE) ? in igb_copper_link_setup_igp()
829 switch (phy->ms_type) { in igb_copper_link_setup_igp()
843 ret_val = phy->ops.write_reg(hw, PHY_1000T_CTRL, data); in igb_copper_link_setup_igp()
853 * igb_copper_link_autoneg - Setup/Enable autoneg for copper link
857 * configure to advertise the full capability. Setup the PHY to autoneg
863 struct e1000_phy_info *phy = &hw->phy; in igb_copper_link_autoneg() local
870 phy->autoneg_advertised &= phy->autoneg_mask; in igb_copper_link_autoneg()
875 if (phy->autoneg_advertised == 0) in igb_copper_link_autoneg()
876 phy->autoneg_advertised = phy->autoneg_mask; in igb_copper_link_autoneg()
878 hw_dbg("Reconfiguring auto-neg advertisement params\n"); in igb_copper_link_autoneg()
881 hw_dbg("Error Setting up Auto-Negotiation\n"); in igb_copper_link_autoneg()
884 hw_dbg("Restarting Auto-Neg\n"); in igb_copper_link_autoneg()
886 /* Restart auto-negotiation by setting the Auto Neg Enable bit and in igb_copper_link_autoneg()
887 * the Auto Neg Restart bit in the PHY control register. in igb_copper_link_autoneg()
889 ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_ctrl); in igb_copper_link_autoneg()
894 ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_ctrl); in igb_copper_link_autoneg()
898 /* Does the user want to wait for Auto-Neg to complete here, or in igb_copper_link_autoneg()
901 if (phy->autoneg_wait_to_complete) { in igb_copper_link_autoneg()
909 hw->mac.get_link_status = true; in igb_copper_link_autoneg()
916 * igb_phy_setup_autoneg - Configure PHY for auto-negotiation
919 * Reads the MII auto-neg advertisement register and/or the 1000T control
920 * register and if the PHY is already setup for auto-negotiation, then
922 * the appropriate values for the wanted auto-negotiation.
926 struct e1000_phy_info *phy = &hw->phy; in igb_phy_setup_autoneg() local
931 phy->autoneg_advertised &= phy->autoneg_mask; in igb_phy_setup_autoneg()
933 /* Read the MII Auto-Neg Advertisement Register (Address 4). */ in igb_phy_setup_autoneg()
934 ret_val = phy->ops.read_reg(hw, PHY_AUTONEG_ADV, &mii_autoneg_adv_reg); in igb_phy_setup_autoneg()
938 if (phy->autoneg_mask & ADVERTISE_1000_FULL) { in igb_phy_setup_autoneg()
939 /* Read the MII 1000Base-T Control Register (Address 9). */ in igb_phy_setup_autoneg()
940 ret_val = phy->ops.read_reg(hw, PHY_1000T_CTRL, in igb_phy_setup_autoneg()
947 * the appropriate PHY registers. First we will parse for in igb_phy_setup_autoneg()
953 /* First we clear all the 10/100 mb speed bits in the Auto-Neg in igb_phy_setup_autoneg()
955 * the 1000Base-T Control Register (Address 9). in igb_phy_setup_autoneg()
963 hw_dbg("autoneg_advertised %x\n", phy->autoneg_advertised); in igb_phy_setup_autoneg()
966 if (phy->autoneg_advertised & ADVERTISE_10_HALF) { in igb_phy_setup_autoneg()
972 if (phy->autoneg_advertised & ADVERTISE_10_FULL) { in igb_phy_setup_autoneg()
978 if (phy->autoneg_advertised & ADVERTISE_100_HALF) { in igb_phy_setup_autoneg()
984 if (phy->autoneg_advertised & ADVERTISE_100_FULL) { in igb_phy_setup_autoneg()
989 /* We do not allow the Phy to advertise 1000 Mb Half Duplex */ in igb_phy_setup_autoneg()
990 if (phy->autoneg_advertised & ADVERTISE_1000_HALF) in igb_phy_setup_autoneg()
994 if (phy->autoneg_advertised & ADVERTISE_1000_FULL) { in igb_phy_setup_autoneg()
1000 * setup the PHY advertisement registers accordingly. If in igb_phy_setup_autoneg()
1001 * auto-negotiation is enabled, then software will have to set the in igb_phy_setup_autoneg()
1002 * "PAUSE" bits to the correct value in the Auto-Negotiation in igb_phy_setup_autoneg()
1003 * Advertisement Register (PHY_AUTONEG_ADV) and re-start auto- in igb_phy_setup_autoneg()
1016 switch (hw->fc.current_mode) { in igb_phy_setup_autoneg()
1019 * software over-ride. in igb_phy_setup_autoneg()
1025 * disabled, by a software over-ride. in igb_phy_setup_autoneg()
1037 * disabled, by a software over-ride. in igb_phy_setup_autoneg()
1044 * over-ride. in igb_phy_setup_autoneg()
1050 ret_val = -E1000_ERR_CONFIG; in igb_phy_setup_autoneg()
1054 ret_val = phy->ops.write_reg(hw, PHY_AUTONEG_ADV, mii_autoneg_adv_reg); in igb_phy_setup_autoneg()
1058 hw_dbg("Auto-Neg Advertising %x\n", mii_autoneg_adv_reg); in igb_phy_setup_autoneg()
1060 if (phy->autoneg_mask & ADVERTISE_1000_FULL) { in igb_phy_setup_autoneg()
1061 ret_val = phy->ops.write_reg(hw, in igb_phy_setup_autoneg()
1073 * igb_setup_copper_link - Configure copper link settings
1076 * Calls the appropriate function to configure the link for auto-neg or forced
1079 * not established, we return -E1000_ERR_PHY (-2).
1086 if (hw->mac.autoneg) { in igb_setup_copper_link()
1094 /* PHY will be set to 10H, 10F, 100H or 100F in igb_setup_copper_link()
1098 ret_val = hw->phy.ops.force_speed_duplex(hw); in igb_setup_copper_link()
1125 * igb_phy_force_speed_duplex_igp - Force speed/duplex for igp PHY
1128 * Calls the PHY setup function to force speed and duplex. Clears the
1129 * auto-crossover to force MDI manually. Waits for link and returns
1130 * successful if link up is successful, else -E1000_ERR_PHY (-2).
1134 struct e1000_phy_info *phy = &hw->phy; in igb_phy_force_speed_duplex_igp() local
1139 ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_data); in igb_phy_force_speed_duplex_igp()
1145 ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_data); in igb_phy_force_speed_duplex_igp()
1149 /* Clear Auto-Crossover to force MDI manually. IGP requires MDI in igb_phy_force_speed_duplex_igp()
1152 ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CTRL, &phy_data); in igb_phy_force_speed_duplex_igp()
1159 ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CTRL, phy_data); in igb_phy_force_speed_duplex_igp()
1167 if (phy->autoneg_wait_to_complete) { in igb_phy_force_speed_duplex_igp()
1168 hw_dbg("Waiting for forced speed/duplex link on IGP phy.\n"); in igb_phy_force_speed_duplex_igp()
1188 * igb_phy_force_speed_duplex_m88 - Force speed/duplex for m88 PHY
1191 * Calls the PHY setup function to force speed and duplex. Clears the
1192 * auto-crossover to force MDI manually. Resets the PHY to commit the
1199 struct e1000_phy_info *phy = &hw->phy; in igb_phy_force_speed_duplex_m88() local
1204 /* I210 and I211 devices support Auto-Crossover in forced operation. */ in igb_phy_force_speed_duplex_m88()
1205 if (phy->type != e1000_phy_i210) { in igb_phy_force_speed_duplex_m88()
1206 /* Clear Auto-Crossover to force MDI manually. M88E1000 in igb_phy_force_speed_duplex_m88()
1209 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, in igb_phy_force_speed_duplex_m88()
1215 ret_val = phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, in igb_phy_force_speed_duplex_m88()
1223 ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_data); in igb_phy_force_speed_duplex_m88()
1229 ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_data); in igb_phy_force_speed_duplex_m88()
1233 /* Reset the phy to commit changes. */ in igb_phy_force_speed_duplex_m88()
1238 if (phy->autoneg_wait_to_complete) { in igb_phy_force_speed_duplex_m88()
1239 hw_dbg("Waiting for forced speed/duplex link on M88 phy.\n"); in igb_phy_force_speed_duplex_m88()
1248 switch (hw->phy.id) { in igb_phy_force_speed_duplex_m88()
1257 if (hw->phy.type != e1000_phy_m88) in igb_phy_force_speed_duplex_m88()
1267 ret_val = phy->ops.write_reg(hw, in igb_phy_force_speed_duplex_m88()
1285 if (hw->phy.type != e1000_phy_m88 || in igb_phy_force_speed_duplex_m88()
1286 hw->phy.id == I347AT4_E_PHY_ID || in igb_phy_force_speed_duplex_m88()
1287 hw->phy.id == M88E1112_E_PHY_ID || in igb_phy_force_speed_duplex_m88()
1288 hw->phy.id == M88E1543_E_PHY_ID || in igb_phy_force_speed_duplex_m88()
1289 hw->phy.id == M88E1512_E_PHY_ID || in igb_phy_force_speed_duplex_m88()
1290 hw->phy.id == I210_I_PHY_ID) in igb_phy_force_speed_duplex_m88()
1293 ret_val = phy->ops.read_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_data); in igb_phy_force_speed_duplex_m88()
1297 /* Resetting the phy means we need to re-force TX_CLK in the in igb_phy_force_speed_duplex_m88()
1298 * Extended PHY Specific Control Register to 25MHz clock from in igb_phy_force_speed_duplex_m88()
1302 ret_val = phy->ops.write_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, phy_data); in igb_phy_force_speed_duplex_m88()
1306 /* In addition, we must re-enable CRS on Tx for both half and full in igb_phy_force_speed_duplex_m88()
1309 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data); in igb_phy_force_speed_duplex_m88()
1314 ret_val = phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data); in igb_phy_force_speed_duplex_m88()
1321 * igb_phy_force_speed_duplex_setup - Configure forced PHY speed/duplex
1325 * Forces speed and duplex on the PHY by doing the following: disable flow
1327 * disable auto-negotiation, configure duplex, configure speed, configure
1335 struct e1000_mac_info *mac = &hw->mac; in igb_phy_force_speed_duplex_setup()
1339 hw->fc.current_mode = e1000_fc_none; in igb_phy_force_speed_duplex_setup()
1349 /* Disable autoneg on the phy */ in igb_phy_force_speed_duplex_setup()
1353 if (mac->forced_speed_duplex & E1000_ALL_HALF_DUPLEX) { in igb_phy_force_speed_duplex_setup()
1364 if (mac->forced_speed_duplex & E1000_ALL_100_SPEED) { in igb_phy_force_speed_duplex_setup()
1382 * igb_set_d3_lplu_state - Sets low power link up state for D3
1397 struct e1000_phy_info *phy = &hw->phy; in igb_set_d3_lplu_state() local
1401 if (!(hw->phy.ops.read_reg)) in igb_set_d3_lplu_state()
1404 ret_val = phy->ops.read_reg(hw, IGP02E1000_PHY_POWER_MGMT, &data); in igb_set_d3_lplu_state()
1410 ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT, in igb_set_d3_lplu_state()
1419 if (phy->smart_speed == e1000_smart_speed_on) { in igb_set_d3_lplu_state()
1420 ret_val = phy->ops.read_reg(hw, in igb_set_d3_lplu_state()
1427 ret_val = phy->ops.write_reg(hw, in igb_set_d3_lplu_state()
1432 } else if (phy->smart_speed == e1000_smart_speed_off) { in igb_set_d3_lplu_state()
1433 ret_val = phy->ops.read_reg(hw, in igb_set_d3_lplu_state()
1440 ret_val = phy->ops.write_reg(hw, in igb_set_d3_lplu_state()
1446 } else if ((phy->autoneg_advertised == E1000_ALL_SPEED_DUPLEX) || in igb_set_d3_lplu_state()
1447 (phy->autoneg_advertised == E1000_ALL_NOT_GIG) || in igb_set_d3_lplu_state()
1448 (phy->autoneg_advertised == E1000_ALL_10_SPEED)) { in igb_set_d3_lplu_state()
1450 ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT, in igb_set_d3_lplu_state()
1456 ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CONFIG, in igb_set_d3_lplu_state()
1462 ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CONFIG, in igb_set_d3_lplu_state()
1471 * igb_check_downshift - Checks whether a downshift in speed occurred
1476 * A downshift is detected by querying the PHY link health.
1480 struct e1000_phy_info *phy = &hw->phy; in igb_check_downshift() local
1484 switch (phy->type) { in igb_check_downshift()
1499 phy->speed_downgraded = false; in igb_check_downshift()
1504 ret_val = phy->ops.read_reg(hw, offset, &phy_data); in igb_check_downshift()
1507 phy->speed_downgraded = (phy_data & mask) ? true : false; in igb_check_downshift()
1514 * igb_check_polarity_m88 - Checks the polarity.
1517 * Success returns 0, Failure returns -E1000_ERR_PHY (-2)
1519 * Polarity is determined based on the PHY specific status register.
1523 struct e1000_phy_info *phy = &hw->phy; in igb_check_polarity_m88() local
1527 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &data); in igb_check_polarity_m88()
1530 phy->cable_polarity = (data & M88E1000_PSSR_REV_POLARITY) in igb_check_polarity_m88()
1538 * igb_check_polarity_igp - Checks the polarity.
1541 * Success returns 0, Failure returns -E1000_ERR_PHY (-2)
1543 * Polarity is determined based on the PHY port status register, and the
1548 struct e1000_phy_info *phy = &hw->phy; in igb_check_polarity_igp() local
1555 ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_STATUS, &data); in igb_check_polarity_igp()
1571 ret_val = phy->ops.read_reg(hw, offset, &data); in igb_check_polarity_igp()
1574 phy->cable_polarity = (data & mask) in igb_check_polarity_igp()
1583 * igb_wait_autoneg - Wait for auto-neg completion
1586 * Waits for auto-negotiation to complete or for the auto-negotiation time
1595 for (i = PHY_AUTO_NEG_LIMIT; i > 0; i--) { in igb_wait_autoneg()
1596 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status); in igb_wait_autoneg()
1599 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status); in igb_wait_autoneg()
1607 /* PHY_AUTO_NEG_TIME expiration doesn't guarantee auto-negotiation in igb_wait_autoneg()
1614 * igb_phy_has_link - Polls PHY for link
1620 * Polls the PHY status register for link, 'iterations' number of times.
1633 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status); in igb_phy_has_link()
1644 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status); in igb_phy_has_link()
1661 * igb_get_cable_length_m88 - Determine cable length for m88 PHY
1664 * Reads the PHY specific status register to retrieve the cable length
1666 * maximum values to get the "average" cable length. The m88 PHY has four
1670 * 1 50 - 80 meters
1671 * 2 80 - 110 meters
1672 * 3 110 - 140 meters
1677 struct e1000_phy_info *phy = &hw->phy; in igb_get_cable_length_m88() local
1681 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data); in igb_get_cable_length_m88()
1686 if (index >= ARRAY_SIZE(e1000_m88_cable_length_table) - 1) { in igb_get_cable_length_m88()
1687 ret_val = -E1000_ERR_PHY; in igb_get_cable_length_m88()
1691 phy->min_cable_length = e1000_m88_cable_length_table[index]; in igb_get_cable_length_m88()
1692 phy->max_cable_length = e1000_m88_cable_length_table[index + 1]; in igb_get_cable_length_m88()
1694 phy->cable_length = (phy->min_cable_length + phy->max_cable_length) / 2; in igb_get_cable_length_m88()
1702 struct e1000_phy_info *phy = &hw->phy; in igb_get_cable_length_m88_gen2() local
1709 switch (hw->phy.id) { in igb_get_cable_length_m88_gen2()
1715 ret_val = phy->ops.read_reg(hw, I347AT4_PAGE_SELECT, in igb_get_cable_length_m88_gen2()
1720 ret_val = phy->ops.write_reg(hw, I347AT4_PAGE_SELECT, 0x07); in igb_get_cable_length_m88_gen2()
1725 ret_val = phy->ops.read_reg(hw, I347AT4_PCDC, &phy_data2); in igb_get_cable_length_m88_gen2()
1732 ret_val = phy->ops.read_reg(hw, I347AT4_PCDL0, &phy_data); in igb_get_cable_length_m88_gen2()
1736 phy->pair_length[0] = phy_data / (is_cm ? 100 : 1); in igb_get_cable_length_m88_gen2()
1737 len_tot = phy->pair_length[0]; in igb_get_cable_length_m88_gen2()
1738 len_min = phy->pair_length[0]; in igb_get_cable_length_m88_gen2()
1739 len_max = phy->pair_length[0]; in igb_get_cable_length_m88_gen2()
1742 ret_val = phy->ops.read_reg(hw, I347AT4_PCDL1, &phy_data); in igb_get_cable_length_m88_gen2()
1746 phy->pair_length[1] = phy_data / (is_cm ? 100 : 1); in igb_get_cable_length_m88_gen2()
1747 len_tot += phy->pair_length[1]; in igb_get_cable_length_m88_gen2()
1748 len_min = min(len_min, phy->pair_length[1]); in igb_get_cable_length_m88_gen2()
1749 len_max = max(len_max, phy->pair_length[1]); in igb_get_cable_length_m88_gen2()
1752 ret_val = phy->ops.read_reg(hw, I347AT4_PCDL2, &phy_data); in igb_get_cable_length_m88_gen2()
1756 phy->pair_length[2] = phy_data / (is_cm ? 100 : 1); in igb_get_cable_length_m88_gen2()
1757 len_tot += phy->pair_length[2]; in igb_get_cable_length_m88_gen2()
1758 len_min = min(len_min, phy->pair_length[2]); in igb_get_cable_length_m88_gen2()
1759 len_max = max(len_max, phy->pair_length[2]); in igb_get_cable_length_m88_gen2()
1762 ret_val = phy->ops.read_reg(hw, I347AT4_PCDL3, &phy_data); in igb_get_cable_length_m88_gen2()
1766 phy->pair_length[3] = phy_data / (is_cm ? 100 : 1); in igb_get_cable_length_m88_gen2()
1767 len_tot += phy->pair_length[3]; in igb_get_cable_length_m88_gen2()
1768 len_min = min(len_min, phy->pair_length[3]); in igb_get_cable_length_m88_gen2()
1769 len_max = max(len_max, phy->pair_length[3]); in igb_get_cable_length_m88_gen2()
1771 /* Populate the phy structure with cable length in meters */ in igb_get_cable_length_m88_gen2()
1772 phy->min_cable_length = len_min; in igb_get_cable_length_m88_gen2()
1773 phy->max_cable_length = len_max; in igb_get_cable_length_m88_gen2()
1774 phy->cable_length = len_tot / 4; in igb_get_cable_length_m88_gen2()
1777 ret_val = phy->ops.write_reg(hw, I347AT4_PAGE_SELECT, in igb_get_cable_length_m88_gen2()
1784 ret_val = phy->ops.read_reg(hw, I347AT4_PAGE_SELECT, in igb_get_cable_length_m88_gen2()
1789 ret_val = phy->ops.write_reg(hw, I347AT4_PAGE_SELECT, 0x05); in igb_get_cable_length_m88_gen2()
1793 ret_val = phy->ops.read_reg(hw, M88E1112_VCT_DSP_DISTANCE, in igb_get_cable_length_m88_gen2()
1799 if (index >= ARRAY_SIZE(e1000_m88_cable_length_table) - 1) { in igb_get_cable_length_m88_gen2()
1800 ret_val = -E1000_ERR_PHY; in igb_get_cable_length_m88_gen2()
1804 phy->min_cable_length = e1000_m88_cable_length_table[index]; in igb_get_cable_length_m88_gen2()
1805 phy->max_cable_length = e1000_m88_cable_length_table[index + 1]; in igb_get_cable_length_m88_gen2()
1807 phy->cable_length = (phy->min_cable_length + in igb_get_cable_length_m88_gen2()
1808 phy->max_cable_length) / 2; in igb_get_cable_length_m88_gen2()
1811 ret_val = phy->ops.write_reg(hw, I347AT4_PAGE_SELECT, in igb_get_cable_length_m88_gen2()
1818 ret_val = -E1000_ERR_PHY; in igb_get_cable_length_m88_gen2()
1827 * igb_get_cable_length_igp_2 - Determine cable length for igp2 PHY
1839 struct e1000_phy_info *phy = &hw->phy; in igb_get_cable_length_igp_2() local
1843 u16 min_agc_index = ARRAY_SIZE(e1000_igp_2_cable_length_table) - 1; in igb_get_cable_length_igp_2()
1853 ret_val = phy->ops.read_reg(hw, agc_reg_array[i], &phy_data); in igb_get_cable_length_igp_2()
1868 ret_val = -E1000_ERR_PHY; in igb_get_cable_length_igp_2()
1883 agc_value -= (e1000_igp_2_cable_length_table[min_agc_index] + in igb_get_cable_length_igp_2()
1885 agc_value /= (IGP02E1000_PHY_CHANNEL_NUM - 2); in igb_get_cable_length_igp_2()
1887 /* Calculate cable length with the error range of +/- 10 meters. */ in igb_get_cable_length_igp_2()
1888 phy->min_cable_length = ((agc_value - IGP02E1000_AGC_RANGE) > 0) ? in igb_get_cable_length_igp_2()
1889 (agc_value - IGP02E1000_AGC_RANGE) : 0; in igb_get_cable_length_igp_2()
1890 phy->max_cable_length = agc_value + IGP02E1000_AGC_RANGE; in igb_get_cable_length_igp_2()
1892 phy->cable_length = (phy->min_cable_length + phy->max_cable_length) / 2; in igb_get_cable_length_igp_2()
1899 * igb_get_phy_info_m88 - Retrieve PHY information
1902 * Valid for only copper links. Read the PHY status register (sticky read)
1903 * to verify that link is up. Read the PHY special control register to
1904 * determine the polarity and 10base-T extended distance. Read the PHY
1910 struct e1000_phy_info *phy = &hw->phy; in igb_get_phy_info_m88() local
1915 if (phy->media_type != e1000_media_type_copper) { in igb_get_phy_info_m88()
1916 hw_dbg("Phy info is only valid for copper media\n"); in igb_get_phy_info_m88()
1917 ret_val = -E1000_ERR_CONFIG; in igb_get_phy_info_m88()
1926 hw_dbg("Phy info is only valid if link is up\n"); in igb_get_phy_info_m88()
1927 ret_val = -E1000_ERR_CONFIG; in igb_get_phy_info_m88()
1931 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data); in igb_get_phy_info_m88()
1935 phy->polarity_correction = (phy_data & M88E1000_PSCR_POLARITY_REVERSAL) in igb_get_phy_info_m88()
1942 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data); in igb_get_phy_info_m88()
1946 phy->is_mdix = (phy_data & M88E1000_PSSR_MDIX) ? true : false; in igb_get_phy_info_m88()
1949 ret_val = phy->ops.get_cable_length(hw); in igb_get_phy_info_m88()
1953 ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &phy_data); in igb_get_phy_info_m88()
1957 phy->local_rx = (phy_data & SR_1000T_LOCAL_RX_STATUS) in igb_get_phy_info_m88()
1961 phy->remote_rx = (phy_data & SR_1000T_REMOTE_RX_STATUS) in igb_get_phy_info_m88()
1966 phy->cable_length = E1000_CABLE_LENGTH_UNDEFINED; in igb_get_phy_info_m88()
1967 phy->local_rx = e1000_1000t_rx_status_undefined; in igb_get_phy_info_m88()
1968 phy->remote_rx = e1000_1000t_rx_status_undefined; in igb_get_phy_info_m88()
1976 * igb_get_phy_info_igp - Retrieve igp PHY information
1979 * Read PHY status to determine if link is up. If link is up, then
1980 * set/determine 10base-T extended distance and polarity correction. Read
1981 * PHY port status to determine MDI/MDIx and speed. Based on the speed,
1986 struct e1000_phy_info *phy = &hw->phy; in igb_get_phy_info_igp() local
1996 hw_dbg("Phy info is only valid if link is up\n"); in igb_get_phy_info_igp()
1997 ret_val = -E1000_ERR_CONFIG; in igb_get_phy_info_igp()
2001 phy->polarity_correction = true; in igb_get_phy_info_igp()
2007 ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_STATUS, &data); in igb_get_phy_info_igp()
2011 phy->is_mdix = (data & IGP01E1000_PSSR_MDIX) ? true : false; in igb_get_phy_info_igp()
2015 ret_val = phy->ops.get_cable_length(hw); in igb_get_phy_info_igp()
2019 ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &data); in igb_get_phy_info_igp()
2023 phy->local_rx = (data & SR_1000T_LOCAL_RX_STATUS) in igb_get_phy_info_igp()
2027 phy->remote_rx = (data & SR_1000T_REMOTE_RX_STATUS) in igb_get_phy_info_igp()
2031 phy->cable_length = E1000_CABLE_LENGTH_UNDEFINED; in igb_get_phy_info_igp()
2032 phy->local_rx = e1000_1000t_rx_status_undefined; in igb_get_phy_info_igp()
2033 phy->remote_rx = e1000_1000t_rx_status_undefined; in igb_get_phy_info_igp()
2041 * igb_phy_sw_reset - PHY software reset
2044 * Does a software reset of the PHY by reading the PHY control register and
2045 * setting/write the control register reset bit to the PHY.
2052 if (!(hw->phy.ops.read_reg)) in igb_phy_sw_reset()
2055 ret_val = hw->phy.ops.read_reg(hw, PHY_CONTROL, &phy_ctrl); in igb_phy_sw_reset()
2060 ret_val = hw->phy.ops.write_reg(hw, PHY_CONTROL, phy_ctrl); in igb_phy_sw_reset()
2071 * igb_phy_hw_reset - PHY hardware reset
2076 * bit in the PHY. Wait the appropriate delay time for the device to
2081 struct e1000_phy_info *phy = &hw->phy; in igb_phy_hw_reset() local
2091 ret_val = phy->ops.acquire(hw); in igb_phy_hw_reset()
2099 udelay(phy->reset_delay_us); in igb_phy_hw_reset()
2106 phy->ops.release(hw); in igb_phy_hw_reset()
2108 ret_val = phy->ops.get_cfg_done(hw); in igb_phy_hw_reset()
2115 * igb_phy_init_script_igp3 - Inits the IGP3 PHY
2122 hw_dbg("Running IGP 3 PHY init script\n"); in igb_phy_init_script_igp3()
2124 /* PHY init IGP 3 */ in igb_phy_init_script_igp3()
2125 /* Enable rise/fall, 10-mode work in class-A */ in igb_phy_init_script_igp3()
2126 hw->phy.ops.write_reg(hw, 0x2F5B, 0x9018); in igb_phy_init_script_igp3()
2128 hw->phy.ops.write_reg(hw, 0x2F52, 0x0000); in igb_phy_init_script_igp3()
2130 hw->phy.ops.write_reg(hw, 0x2FB1, 0x8B24); in igb_phy_init_script_igp3()
2132 hw->phy.ops.write_reg(hw, 0x2FB2, 0xF8F0); in igb_phy_init_script_igp3()
2134 hw->phy.ops.write_reg(hw, 0x2010, 0x10B0); in igb_phy_init_script_igp3()
2136 hw->phy.ops.write_reg(hw, 0x2011, 0x0000); in igb_phy_init_script_igp3()
2138 hw->phy.ops.write_reg(hw, 0x20DD, 0x249A); in igb_phy_init_script_igp3()
2140 hw->phy.ops.write_reg(hw, 0x20DE, 0x00D3); in igb_phy_init_script_igp3()
2142 hw->phy.ops.write_reg(hw, 0x28B4, 0x04CE); in igb_phy_init_script_igp3()
2144 hw->phy.ops.write_reg(hw, 0x2F70, 0x29E4); in igb_phy_init_script_igp3()
2145 /* Force 1000 ( required for enabling PHY regs configuration) */ in igb_phy_init_script_igp3()
2146 hw->phy.ops.write_reg(hw, 0x0000, 0x0140); in igb_phy_init_script_igp3()
2148 hw->phy.ops.write_reg(hw, 0x1F30, 0x1606); in igb_phy_init_script_igp3()
2150 hw->phy.ops.write_reg(hw, 0x1F31, 0xB814); in igb_phy_init_script_igp3()
2152 hw->phy.ops.write_reg(hw, 0x1F35, 0x002A); in igb_phy_init_script_igp3()
2154 hw->phy.ops.write_reg(hw, 0x1F3E, 0x0067); in igb_phy_init_script_igp3()
2156 hw->phy.ops.write_reg(hw, 0x1F54, 0x0065); in igb_phy_init_script_igp3()
2158 hw->phy.ops.write_reg(hw, 0x1F55, 0x002A); in igb_phy_init_script_igp3()
2160 hw->phy.ops.write_reg(hw, 0x1F56, 0x002A); in igb_phy_init_script_igp3()
2162 hw->phy.ops.write_reg(hw, 0x1F72, 0x3FB0); in igb_phy_init_script_igp3()
2164 hw->phy.ops.write_reg(hw, 0x1F76, 0xC0FF); in igb_phy_init_script_igp3()
2166 hw->phy.ops.write_reg(hw, 0x1F77, 0x1DEC); in igb_phy_init_script_igp3()
2168 hw->phy.ops.write_reg(hw, 0x1F78, 0xF9EF); in igb_phy_init_script_igp3()
2170 hw->phy.ops.write_reg(hw, 0x1F79, 0x0210); in igb_phy_init_script_igp3()
2172 hw->phy.ops.write_reg(hw, 0x1895, 0x0003); in igb_phy_init_script_igp3()
2174 hw->phy.ops.write_reg(hw, 0x1796, 0x0008); in igb_phy_init_script_igp3()
2176 hw->phy.ops.write_reg(hw, 0x1798, 0xD008); in igb_phy_init_script_igp3()
2180 hw->phy.ops.write_reg(hw, 0x1898, 0xD918); in igb_phy_init_script_igp3()
2182 hw->phy.ops.write_reg(hw, 0x187A, 0x0800); in igb_phy_init_script_igp3()
2183 /* Enable LPLU and disable AN to 1000 in non-D0a states, in igb_phy_init_script_igp3()
2186 hw->phy.ops.write_reg(hw, 0x0019, 0x008D); in igb_phy_init_script_igp3()
2188 hw->phy.ops.write_reg(hw, 0x001B, 0x2080); in igb_phy_init_script_igp3()
2190 hw->phy.ops.write_reg(hw, 0x0014, 0x0045); in igb_phy_init_script_igp3()
2192 hw->phy.ops.write_reg(hw, 0x0000, 0x1340); in igb_phy_init_script_igp3()
2198 * igb_initialize_M88E1512_phy - Initialize M88E1512 PHY
2205 struct e1000_phy_info *phy = &hw->phy; in igb_initialize_M88E1512_phy() local
2208 /* Switch to PHY page 0xFF. */ in igb_initialize_M88E1512_phy()
2209 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x00FF); in igb_initialize_M88E1512_phy()
2213 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0x214B); in igb_initialize_M88E1512_phy()
2217 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x2144); in igb_initialize_M88E1512_phy()
2221 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0x0C28); in igb_initialize_M88E1512_phy()
2225 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x2146); in igb_initialize_M88E1512_phy()
2229 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0xB233); in igb_initialize_M88E1512_phy()
2233 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x214D); in igb_initialize_M88E1512_phy()
2237 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0xCC0C); in igb_initialize_M88E1512_phy()
2241 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x2159); in igb_initialize_M88E1512_phy()
2245 /* Switch to PHY page 0xFB. */ in igb_initialize_M88E1512_phy()
2246 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x00FB); in igb_initialize_M88E1512_phy()
2250 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_3, 0x000D); in igb_initialize_M88E1512_phy()
2254 /* Switch to PHY page 0x12. */ in igb_initialize_M88E1512_phy()
2255 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x12); in igb_initialize_M88E1512_phy()
2259 /* Change mode to SGMII-to-Copper */ in igb_initialize_M88E1512_phy()
2260 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_MODE, 0x8001); in igb_initialize_M88E1512_phy()
2264 /* Return the PHY to page 0. */ in igb_initialize_M88E1512_phy()
2265 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0); in igb_initialize_M88E1512_phy()
2271 hw_dbg("Error committing the PHY changes\n"); in igb_initialize_M88E1512_phy()
2282 * igb_initialize_M88E1543_phy - Initialize M88E1512 PHY
2289 struct e1000_phy_info *phy = &hw->phy; in igb_initialize_M88E1543_phy() local
2292 /* Switch to PHY page 0xFF. */ in igb_initialize_M88E1543_phy()
2293 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x00FF); in igb_initialize_M88E1543_phy()
2297 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0x214B); in igb_initialize_M88E1543_phy()
2301 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x2144); in igb_initialize_M88E1543_phy()
2305 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0x0C28); in igb_initialize_M88E1543_phy()
2309 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x2146); in igb_initialize_M88E1543_phy()
2313 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0xB233); in igb_initialize_M88E1543_phy()
2317 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x214D); in igb_initialize_M88E1543_phy()
2321 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0xDC0C); in igb_initialize_M88E1543_phy()
2325 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x2159); in igb_initialize_M88E1543_phy()
2329 /* Switch to PHY page 0xFB. */ in igb_initialize_M88E1543_phy()
2330 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x00FB); in igb_initialize_M88E1543_phy()
2334 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_3, 0x0C0D); in igb_initialize_M88E1543_phy()
2338 /* Switch to PHY page 0x12. */ in igb_initialize_M88E1543_phy()
2339 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x12); in igb_initialize_M88E1543_phy()
2343 /* Change mode to SGMII-to-Copper */ in igb_initialize_M88E1543_phy()
2344 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_MODE, 0x8001); in igb_initialize_M88E1543_phy()
2348 /* Switch to PHY page 1. */ in igb_initialize_M88E1543_phy()
2349 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x1); in igb_initialize_M88E1543_phy()
2353 /* Change mode to 1000BASE-X/SGMII and autoneg enable */ in igb_initialize_M88E1543_phy()
2354 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_FIBER_CTRL, 0x9140); in igb_initialize_M88E1543_phy()
2358 /* Return the PHY to page 0. */ in igb_initialize_M88E1543_phy()
2359 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0); in igb_initialize_M88E1543_phy()
2365 hw_dbg("Error committing the PHY changes\n"); in igb_initialize_M88E1543_phy()
2376 * igb_power_up_phy_copper - Restore copper link in case of PHY power down
2379 * In the case of a PHY power down to save power, or to turn off link during a
2386 /* The PHY will retain its settings across a power down/up cycle */ in igb_power_up_phy_copper()
2387 hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg); in igb_power_up_phy_copper()
2389 hw->phy.ops.write_reg(hw, PHY_CONTROL, mii_reg); in igb_power_up_phy_copper()
2393 * igb_power_down_phy_copper - Power down copper PHY
2396 * Power down PHY to save power when interface is down and wake on lan
2403 /* The PHY will retain its settings across a power down/up cycle */ in igb_power_down_phy_copper()
2404 hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg); in igb_power_down_phy_copper()
2406 hw->phy.ops.write_reg(hw, PHY_CONTROL, mii_reg); in igb_power_down_phy_copper()
2411 * igb_check_polarity_82580 - Checks the polarity.
2414 * Success returns 0, Failure returns -E1000_ERR_PHY (-2)
2416 * Polarity is determined based on the PHY specific status register.
2420 struct e1000_phy_info *phy = &hw->phy; in igb_check_polarity_82580() local
2425 ret_val = phy->ops.read_reg(hw, I82580_PHY_STATUS_2, &data); in igb_check_polarity_82580()
2428 phy->cable_polarity = (data & I82580_PHY_STATUS2_REV_POLARITY) in igb_check_polarity_82580()
2436 * igb_phy_force_speed_duplex_82580 - Force speed/duplex for I82580 PHY
2439 * Calls the PHY setup function to force speed and duplex. Clears the
2440 * auto-crossover to force MDI manually. Waits for link and returns
2441 * successful if link up is successful, else -E1000_ERR_PHY (-2).
2445 struct e1000_phy_info *phy = &hw->phy; in igb_phy_force_speed_duplex_82580() local
2450 ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_data); in igb_phy_force_speed_duplex_82580()
2456 ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_data); in igb_phy_force_speed_duplex_82580()
2460 /* Clear Auto-Crossover to force MDI manually. 82580 requires MDI in igb_phy_force_speed_duplex_82580()
2463 ret_val = phy->ops.read_reg(hw, I82580_PHY_CTRL_2, &phy_data); in igb_phy_force_speed_duplex_82580()
2469 ret_val = phy->ops.write_reg(hw, I82580_PHY_CTRL_2, phy_data); in igb_phy_force_speed_duplex_82580()
2477 if (phy->autoneg_wait_to_complete) { in igb_phy_force_speed_duplex_82580()
2478 hw_dbg("Waiting for forced speed/duplex link on 82580 phy\n"); in igb_phy_force_speed_duplex_82580()
2498 * igb_get_phy_info_82580 - Retrieve I82580 PHY information
2501 * Read PHY status to determine if link is up. If link is up, then
2502 * set/determine 10base-T extended distance and polarity correction. Read
2503 * PHY port status to determine MDI/MDIx and speed. Based on the speed,
2508 struct e1000_phy_info *phy = &hw->phy; in igb_get_phy_info_82580() local
2518 hw_dbg("Phy info is only valid if link is up\n"); in igb_get_phy_info_82580()
2519 ret_val = -E1000_ERR_CONFIG; in igb_get_phy_info_82580()
2523 phy->polarity_correction = true; in igb_get_phy_info_82580()
2529 ret_val = phy->ops.read_reg(hw, I82580_PHY_STATUS_2, &data); in igb_get_phy_info_82580()
2533 phy->is_mdix = (data & I82580_PHY_STATUS2_MDIX) ? true : false; in igb_get_phy_info_82580()
2537 ret_val = hw->phy.ops.get_cable_length(hw); in igb_get_phy_info_82580()
2541 ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &data); in igb_get_phy_info_82580()
2545 phy->local_rx = (data & SR_1000T_LOCAL_RX_STATUS) in igb_get_phy_info_82580()
2549 phy->remote_rx = (data & SR_1000T_REMOTE_RX_STATUS) in igb_get_phy_info_82580()
2553 phy->cable_length = E1000_CABLE_LENGTH_UNDEFINED; in igb_get_phy_info_82580()
2554 phy->local_rx = e1000_1000t_rx_status_undefined; in igb_get_phy_info_82580()
2555 phy->remote_rx = e1000_1000t_rx_status_undefined; in igb_get_phy_info_82580()
2563 * igb_get_cable_length_82580 - Determine cable length for 82580 PHY
2571 struct e1000_phy_info *phy = &hw->phy; in igb_get_cable_length_82580() local
2575 ret_val = phy->ops.read_reg(hw, I82580_PHY_DIAG_STATUS, &phy_data); in igb_get_cable_length_82580()
2582 ret_val = -E1000_ERR_PHY; in igb_get_cable_length_82580()
2584 phy->cable_length = length; in igb_get_cable_length_82580()
2591 * igb_set_master_slave_mode - Setup PHY for Master/slave mode
2602 ret_val = hw->phy.ops.read_reg(hw, PHY_1000T_CTRL, &phy_data); in igb_set_master_slave_mode()
2607 hw->phy.original_ms_type = (phy_data & CR_1000T_MS_ENABLE) ? in igb_set_master_slave_mode()
2612 switch (hw->phy.ms_type) { in igb_set_master_slave_mode()
2627 return hw->phy.ops.write_reg(hw, PHY_1000T_CTRL, phy_data); in igb_set_master_slave_mode()