995 	if (!vsi->tc_cfg.numtc) {  in ice_vsi_setup_q_map()
997 		vsi->tc_cfg.numtc = 1;  in ice_vsi_setup_q_map()
998 		vsi->tc_cfg.ena_tc = 1;  in ice_vsi_setup_q_map()
1001 	num_rxq_per_tc = min_t(u16, qcount_rx / vsi->tc_cfg.numtc, ICE_MAX_RXQS_PER_TC);  in ice_vsi_setup_q_map()
1004 	num_txq_per_tc = qcount_tx / vsi->tc_cfg.numtc;  in ice_vsi_setup_q_map()
1023 		if (!(vsi->tc_cfg.ena_tc & BIT(i))) {  in ice_vsi_setup_q_map()
1025 			vsi->tc_cfg.tc_info[i].qoffset = 0;  in ice_vsi_setup_q_map()
1026 			vsi->tc_cfg.tc_info[i].qcount_rx = 1;  in ice_vsi_setup_q_map()
1027 			vsi->tc_cfg.tc_info[i].qcount_tx = 1;  in ice_vsi_setup_q_map()
1028 			vsi->tc_cfg.tc_info[i].netdev_tc = 0;  in ice_vsi_setup_q_map()
1034 		vsi->tc_cfg.tc_info[i].qoffset = offset;  in ice_vsi_setup_q_map()
1035 		vsi->tc_cfg.tc_info[i].qcount_rx = num_rxq_per_tc;  in ice_vsi_setup_q_map()
1036 		vsi->tc_cfg.tc_info[i].qcount_tx = num_txq_per_tc;  in ice_vsi_setup_q_map()
1037 		vsi->tc_cfg.tc_info[i].netdev_tc = netdev_tc++;  in ice_vsi_setup_q_map()
2044 		vsi->tc_cfg.ena_tc = ICE_DFLT_TRAFFIC_CLASS;  in ice_vsi_set_tc_cfg()
2045 		vsi->tc_cfg.numtc = 1;  in ice_vsi_set_tc_cfg()
2179 				     (u8)vsi->tc_cfg.ena_tc);  in ice_set_agg_vsi()
2192 				     (u8)vsi->tc_cfg.ena_tc);  in ice_set_agg_vsi()
2207 		vsi->idx, vsi->tc_cfg.ena_tc, vsi->agg_node->agg_id,  in ice_set_agg_vsi()
2219 		if (!(vsi->tc_cfg.ena_tc & BIT(i)))  in ice_vsi_cfg_tc_lan()
2235 	dev_dbg(dev, "vsi->tc_cfg.ena_tc = %d\n", vsi->tc_cfg.ena_tc);  in ice_vsi_cfg_tc_lan()
2236 	ret = ice_cfg_vsi_lan(vsi->port_info, vsi->idx, vsi->tc_cfg.ena_tc,  in ice_vsi_cfg_tc_lan()
3136 	int numtc = vsi->tc_cfg.numtc;  in ice_vsi_cfg_netdev_tc()
3162 		if (vsi->tc_cfg.ena_tc & BIT(i))  in ice_vsi_cfg_netdev_tc()
3164 					    vsi->tc_cfg.tc_info[i].netdev_tc,  in ice_vsi_cfg_netdev_tc()
3165 					    vsi->tc_cfg.tc_info[i].qcount_tx,  in ice_vsi_cfg_netdev_tc()
3166 					    vsi->tc_cfg.tc_info[i].qoffset);  in ice_vsi_cfg_netdev_tc()
3185 		netdev_tc = vsi->tc_cfg.tc_info[ets_tc].netdev_tc;  in ice_vsi_cfg_netdev_tc()
3209 	vsi->tc_cfg.ena_tc = ena_tc ? ena_tc : 1;  in ice_vsi_setup_q_map_mqprio()
3216 		if (!(vsi->tc_cfg.ena_tc & BIT(i))) {  in ice_vsi_setup_q_map_mqprio()
3218 			vsi->tc_cfg.tc_info[i].qoffset = 0;  in ice_vsi_setup_q_map_mqprio()
3219 			vsi->tc_cfg.tc_info[i].qcount_rx = 1;  in ice_vsi_setup_q_map_mqprio()
3220 			vsi->tc_cfg.tc_info[i].qcount_tx = 1;  in ice_vsi_setup_q_map_mqprio()
3221 			vsi->tc_cfg.tc_info[i].netdev_tc = 0;  in ice_vsi_setup_q_map_mqprio()
3229 		vsi->tc_cfg.tc_info[i].qoffset = offset;  in ice_vsi_setup_q_map_mqprio()
3230 		vsi->tc_cfg.tc_info[i].qcount_rx = qcount_rx;  in ice_vsi_setup_q_map_mqprio()
3231 		vsi->tc_cfg.tc_info[i].qcount_tx = qcount_tx;  in ice_vsi_setup_q_map_mqprio()
3232 		vsi->tc_cfg.tc_info[i].netdev_tc = netdev_tc++;  in ice_vsi_setup_q_map_mqprio()
3235 	if (vsi->all_numtc && vsi->all_numtc != vsi->tc_cfg.numtc) {  in ice_vsi_setup_q_map_mqprio()
3278 		vsi->all_numtc, vsi->all_enatc, vsi->tc_cfg.numtc);  in ice_vsi_setup_q_map_mqprio()
3301 	if (vsi->tc_cfg.ena_tc == ena_tc &&  in ice_vsi_cfg_tc()
3319 	memcpy(&old_tc_cfg, &vsi->tc_cfg, sizeof(old_tc_cfg));  in ice_vsi_cfg_tc()
3320 	vsi->tc_cfg.ena_tc = ena_tc;  in ice_vsi_cfg_tc()
3321 	vsi->tc_cfg.numtc = num_tc;  in ice_vsi_cfg_tc()
3337 		memcpy(&vsi->tc_cfg, &old_tc_cfg, sizeof(vsi->tc_cfg));  in ice_vsi_cfg_tc()
3354 				      vsi->tc_cfg.ena_tc, max_txqs);  in ice_vsi_cfg_tc()