142  * Context: Called under pf->dplls.lock
194  * Context: Acquires pf->dplls.lock
214 	mutex_lock(&pf->dplls.lock);  in ice_dpll_frequency_set()
216 	mutex_unlock(&pf->dplls.lock);  in ice_dpll_frequency_set()
232  * Context: Calls a function which acquires pf->dplls.lock
257  * Context: Calls a function which acquires pf->dplls.lock
283  * Context: Acquires pf->dplls.lock
298 	mutex_lock(&pf->dplls.lock);  in ice_dpll_frequency_get()
300 	mutex_unlock(&pf->dplls.lock);  in ice_dpll_frequency_get()
316  * Context: Calls a function which acquires pf->dplls.lock
341  * Context: Calls a function which acquires pf->dplls.lock
366  * Context: Calls a function which acquires and releases pf->dplls.lock
406  * Context: Calls a function which acquires and releases pf->dplls.lock
437  * ice_dpll_pin_enable - enable a pin on dplls
444  * Enable a pin on both dplls. Store current state in pin->flags.
446  * Context: Called under pf->dplls.lock
487  * ice_dpll_pin_disable - disable a pin on dplls
493  * Disable a pin on both dplls. Store current state in pin->flags.
495  * Context: Called under pf->dplls.lock
538  * Context: Call with pf->dplls.lock held
546 	struct ice_dplls *d = &pf->dplls;  in ice_dpll_sw_pins_update()
603  * Context: Called under pf->dplls.lock
625 				pin->state[pf->dplls.eec.dpll_idx] =  in ice_dpll_pin_state_update()
626 					pin->pin == pf->dplls.eec.active_input ?  in ice_dpll_pin_state_update()
629 				pin->state[pf->dplls.pps.dpll_idx] =  in ice_dpll_pin_state_update()
630 					pin->pin == pf->dplls.pps.active_input ?  in ice_dpll_pin_state_update()
634 				pin->state[pf->dplls.eec.dpll_idx] =  in ice_dpll_pin_state_update()
636 				pin->state[pf->dplls.pps.dpll_idx] =  in ice_dpll_pin_state_update()
640 			pin->state[pf->dplls.eec.dpll_idx] =  in ice_dpll_pin_state_update()
642 			pin->state[pf->dplls.pps.dpll_idx] =  in ice_dpll_pin_state_update()
655 			pin->state[pf->dplls.eec.dpll_idx] =  in ice_dpll_pin_state_update()
656 				parent == pf->dplls.eec.dpll_idx ?  in ice_dpll_pin_state_update()
659 			pin->state[pf->dplls.pps.dpll_idx] =  in ice_dpll_pin_state_update()
660 				parent == pf->dplls.pps.dpll_idx ?  in ice_dpll_pin_state_update()
664 			pin->state[pf->dplls.eec.dpll_idx] =  in ice_dpll_pin_state_update()
666 			pin->state[pf->dplls.pps.dpll_idx] =  in ice_dpll_pin_state_update()
671 		for (parent = 0; parent < pf->dplls.rclk.num_parents;  in ice_dpll_pin_state_update()
725  * Context: Called under pf->dplls.lock
761  * Context: Acquires pf->dplls.lock
775 	mutex_lock(&pf->dplls.lock);  in ice_dpll_lock_status_get()
777 	mutex_unlock(&pf->dplls.lock);  in ice_dpll_lock_status_get()
791  * Context: Acquires pf->dplls.lock
803 	mutex_lock(&pf->dplls.lock);  in ice_dpll_mode_get()
805 	mutex_unlock(&pf->dplls.lock);  in ice_dpll_mode_get()
819  * Context: Acquires and releases pf->dplls.lock
830 	mutex_lock(&pf->dplls.lock);  in ice_dpll_phase_offset_monitor_set()
835 	mutex_unlock(&pf->dplls.lock);  in ice_dpll_phase_offset_monitor_set()
850  * Context: Acquires and releases pf->dplls.lock
861 	mutex_lock(&pf->dplls.lock);  in ice_dpll_phase_offset_monitor_get()
866 	mutex_unlock(&pf->dplls.lock);  in ice_dpll_phase_offset_monitor_get()
883  * Context: Acquires pf->dplls.lock
902 	mutex_lock(&pf->dplls.lock);  in ice_dpll_pin_state_set()
910 	mutex_unlock(&pf->dplls.lock);  in ice_dpll_pin_state_set()
926  * Context: Calls a function which acquires pf->dplls.lock
961  * Context: Calls a function which acquires pf->dplls.lock
990  * Context: Acquires pf->dplls.lock
1010 	mutex_lock(&pf->dplls.lock);  in ice_dpll_pin_state_get()
1019 	mutex_unlock(&pf->dplls.lock);  in ice_dpll_pin_state_get()
1035  * Context: Calls a function which acquires pf->dplls.lock
1061  * Context: Calls a function which acquires pf->dplls.lock
1084  * Context: Call with pf->dplls.lock held
1139  * Context: Acquires and releases pf->dplls.lock
1162 	mutex_lock(&pf->dplls.lock);  in ice_dpll_ufl_pin_state_set()
1217 	mutex_unlock(&pf->dplls.lock);  in ice_dpll_ufl_pin_state_set()
1233  * Context: Acquires and releases pf->dplls.lock
1251 	mutex_lock(&pf->dplls.lock);  in ice_dpll_sw_pin_state_get()
1273 	mutex_unlock(&pf->dplls.lock);  in ice_dpll_sw_pin_state_get()
1289  * Context: Acquires and releases pf->dplls.lock
1310 	mutex_lock(&pf->dplls.lock);  in ice_dpll_sma_pin_state_set()
1335 	mutex_unlock(&pf->dplls.lock);  in ice_dpll_sma_pin_state_set()
1351  * Context: Acquires pf->dplls.lock
1365 	mutex_lock(&pf->dplls.lock);  in ice_dpll_input_prio_get()
1367 	mutex_unlock(&pf->dplls.lock);  in ice_dpll_input_prio_get()
1383  * Context: Acquires pf->dplls.lock
1401 	mutex_lock(&pf->dplls.lock);  in ice_dpll_input_prio_set()
1403 	mutex_unlock(&pf->dplls.lock);  in ice_dpll_input_prio_set()
1417 	mutex_lock(&pf->dplls.lock);  in ice_dpll_sw_input_prio_get()
1422 	mutex_unlock(&pf->dplls.lock);  in ice_dpll_sw_input_prio_get()
1442 	mutex_lock(&pf->dplls.lock);  in ice_dpll_sw_input_prio_set()
1444 	mutex_unlock(&pf->dplls.lock);  in ice_dpll_sw_input_prio_set()
1510  * Context: Acquires and releases pf->dplls.lock
1528 	mutex_lock(&pf->dplls.lock);  in ice_dpll_pin_sma_direction_set()
1530 	mutex_unlock(&pf->dplls.lock);  in ice_dpll_pin_sma_direction_set()
1546  * Context: Acquires and releases pf->dplls.lock
1562 	mutex_lock(&pf->dplls.lock);  in ice_dpll_pin_sw_direction_get()
1564 	mutex_unlock(&pf->dplls.lock);  in ice_dpll_pin_sw_direction_get()
1580  * Context: Acquires pf->dplls.lock
1594 	mutex_lock(&pf->dplls.lock);  in ice_dpll_pin_phase_adjust_get()
1596 	mutex_unlock(&pf->dplls.lock);  in ice_dpll_pin_phase_adjust_get()
1614  * Context: Acquires pf->dplls.lock
1635 	mutex_lock(&pf->dplls.lock);  in ice_dpll_pin_phase_adjust_set()
1660 	mutex_unlock(&pf->dplls.lock);  in ice_dpll_pin_phase_adjust_set()
1683  * Context: Calls a function which acquires and releases pf->dplls.lock
1711  * Context: Calls a function which acquires pf->dplls.lock
1739  * Context: Calls a function which acquires and releases pf->dplls.lock
1774  * Context: Calls a function which acquires and releases pf->dplls.lock
1818  * Context: Acquires pf->dplls.lock
1832 	mutex_lock(&pf->dplls.lock);  in ice_dpll_phase_offset_get()
1840 	mutex_unlock(&pf->dplls.lock);  in ice_dpll_phase_offset_get()
1857  * Context: Acquires pf->dplls.lock
1875 	mutex_lock(&pf->dplls.lock);  in ice_dpll_output_esync_set()
1895 	mutex_unlock(&pf->dplls.lock);  in ice_dpll_output_esync_set()
1912  * Context: Acquires pf->dplls.lock
1929 	mutex_lock(&pf->dplls.lock);  in ice_dpll_output_esync_get()
1932 		mutex_unlock(&pf->dplls.lock);  in ice_dpll_output_esync_get()
1944 	mutex_unlock(&pf->dplls.lock);  in ice_dpll_output_esync_get()
1961  * Context: Acquires pf->dplls.lock
1979 	mutex_lock(&pf->dplls.lock);  in ice_dpll_input_esync_set()
1999 	mutex_unlock(&pf->dplls.lock);  in ice_dpll_input_esync_set()
2016  * Context: Acquires pf->dplls.lock
2033 	mutex_lock(&pf->dplls.lock);  in ice_dpll_input_esync_get()
2036 		mutex_unlock(&pf->dplls.lock);  in ice_dpll_input_esync_get()
2048 	mutex_unlock(&pf->dplls.lock);  in ice_dpll_input_esync_get()
2065  * Context: Calls a function which acquires and releases pf->dplls.lock
2101  * Context: Calls a function which acquires and releases pf->dplls.lock
2135  * Context: Acquires and releases pf->dplls.lock
2153 	mutex_lock(&pf->dplls.lock);  in ice_dpll_input_ref_sync_set()
2163 	mutex_unlock(&pf->dplls.lock);  in ice_dpll_input_ref_sync_set()
2180  * Context: Acquires and releases pf->dplls.lock
2196 	mutex_lock(&pf->dplls.lock);  in ice_dpll_input_ref_sync_get()
2201 	mutex_unlock(&pf->dplls.lock);  in ice_dpll_input_ref_sync_get()
2218  * Context: Calls a function which acquires and releases pf->dplls.lock
2248  * Context: Calls a function which acquires and releases pf->dplls.lock
2277  * Context: Acquires pf->dplls.lock
2298 	mutex_lock(&pf->dplls.lock);  in ice_dpll_rclk_state_on_pin_set()
2299 	hw_idx = parent->idx - pf->dplls.base_rclk_idx;  in ice_dpll_rclk_state_on_pin_set()
2300 	if (hw_idx >= pf->dplls.num_inputs)  in ice_dpll_rclk_state_on_pin_set()
2319 	mutex_unlock(&pf->dplls.lock);  in ice_dpll_rclk_state_on_pin_set()
2335  * Context: Acquires pf->dplls.lock
2355 	mutex_lock(&pf->dplls.lock);  in ice_dpll_rclk_state_on_pin_get()
2356 	hw_idx = parent->idx - pf->dplls.base_rclk_idx;  in ice_dpll_rclk_state_on_pin_get()
2357 	if (hw_idx >= pf->dplls.num_inputs)  in ice_dpll_rclk_state_on_pin_get()
2368 	mutex_unlock(&pf->dplls.lock);  in ice_dpll_rclk_state_on_pin_get()
2527  * Context: Must be called while pf->dplls.lock is released.
2549  * Context: Shall be called with pf->dplls.lock being locked.
2574 	for (i = 0; i < pf->dplls.num_inputs; i++) {  in ice_dpll_pps_update_phase_offsets()
2575 		p = &pf->dplls.inputs[i];  in ice_dpll_pps_update_phase_offsets()
2607  * Context: Called by kworker under pf->dplls.lock
2636 			d->active_input = pf->dplls.inputs[d->input_idx].pin;  in ice_dpll_update_state()
2637 		p = &pf->dplls.inputs[d->input_idx];  in ice_dpll_update_state()
2645 			p = &pf->dplls.inputs[d->input_idx];  in ice_dpll_update_state()
2654 			p = &pf->dplls.inputs[d->prev_input_idx];  in ice_dpll_update_state()
2660 			p = &pf->dplls.inputs[d->input_idx];  in ice_dpll_update_state()
2673  * ice_dpll_periodic_work - DPLLs periodic worker
2676  * DPLLs periodic worker is responsible for polling state of dpll.
2677  * Context: Holds pf->dplls.lock
2682 	struct ice_pf *pf = container_of(d, struct ice_pf, dplls);  in ice_dpll_periodic_work()
2683 	struct ice_dpll *de = &pf->dplls.eec;  in ice_dpll_periodic_work()
2684 	struct ice_dpll *dp = &pf->dplls.pps;  in ice_dpll_periodic_work()
2690 	mutex_lock(&pf->dplls.lock);  in ice_dpll_periodic_work()
2704 				"EEC/PPS DPLLs periodic work disabled\n");  in ice_dpll_periodic_work()
2705 			mutex_unlock(&pf->dplls.lock);  in ice_dpll_periodic_work()
2709 	mutex_unlock(&pf->dplls.lock);  in ice_dpll_periodic_work()
2736 	struct ice_dpll_pin *inputs = pf->dplls.inputs;  in ice_dpll_init_ref_sync_inputs()
2954  * If cgu is owned unregister pins from given dplls.
2982  * If cgu is owned register allocated pins with given dplls.
2996 	ret = ice_dpll_get_pins(pf, pins, start_idx, count, pf->dplls.clock_id);  in ice_dpll_init_direct_pins()
3025 	struct ice_dpll_pin *rclk = &pf->dplls.rclk;  in ice_dpll_deinit_rclk_pin()
3031 		parent = pf->dplls.inputs[rclk->parent_idx[i]].pin;  in ice_dpll_deinit_rclk_pin()
3069 				pf->dplls.clock_id);  in ice_dpll_init_rclk_pins()
3072 	for (i = 0; i < pf->dplls.rclk.num_parents; i++) {  in ice_dpll_init_rclk_pins()
3073 		parent = pf->dplls.inputs[pf->dplls.rclk.parent_idx[i]].pin;  in ice_dpll_init_rclk_pins()
3078 		ret = dpll_pin_on_pin_register(parent, pf->dplls.rclk.pin,  in ice_dpll_init_rclk_pins()
3079 					       ops, &pf->dplls.rclk);  in ice_dpll_init_rclk_pins()
3083 	dpll_netdev_pin_set(vsi->netdev, pf->dplls.rclk.pin);  in ice_dpll_init_rclk_pins()
3089 		parent = pf->dplls.inputs[pf->dplls.rclk.parent_idx[--i]].pin;  in ice_dpll_init_rclk_pins()
3090 		dpll_pin_on_pin_unregister(parent, pf->dplls.rclk.pin,  in ice_dpll_init_rclk_pins()
3091 					   &ice_dpll_rclk_ops, &pf->dplls.rclk);  in ice_dpll_init_rclk_pins()
3102  * If cgu is owned unregister directly connected pins from the dplls.
3107 	struct ice_dpll_pin *outputs = pf->dplls.outputs;  in ice_dpll_deinit_pins()
3108 	struct ice_dpll_pin *inputs = pf->dplls.inputs;  in ice_dpll_deinit_pins()
3109 	int num_outputs = pf->dplls.num_outputs;  in ice_dpll_deinit_pins()
3110 	int num_inputs = pf->dplls.num_inputs;  in ice_dpll_deinit_pins()
3111 	struct ice_dplls *d = &pf->dplls;  in ice_dpll_deinit_pins()
3129 		if (!pf->dplls.generic) {  in ice_dpll_deinit_pins()
3130 			ice_dpll_deinit_direct_pins(cgu, pf->dplls.ufl,  in ice_dpll_deinit_pins()
3133 						    pf->dplls.pps.dpll,  in ice_dpll_deinit_pins()
3134 						    pf->dplls.eec.dpll);  in ice_dpll_deinit_pins()
3135 			ice_dpll_deinit_direct_pins(cgu, pf->dplls.sma,  in ice_dpll_deinit_pins()
3138 						    pf->dplls.pps.dpll,  in ice_dpll_deinit_pins()
3139 						    pf->dplls.eec.dpll);  in ice_dpll_deinit_pins()
3145  * ice_dpll_init_pins - init pins and register pins with a dplls
3149  * Initialize directly connected pf's pins within pf's dplls in a Linux dpll
3160 	ret = ice_dpll_init_direct_pins(pf, cgu, pf->dplls.inputs, 0,  in ice_dpll_init_pins()
3161 					pf->dplls.num_inputs,  in ice_dpll_init_pins()
3163 					pf->dplls.eec.dpll, pf->dplls.pps.dpll);  in ice_dpll_init_pins()
3166 	count = pf->dplls.num_inputs;  in ice_dpll_init_pins()
3168 		ret = ice_dpll_init_direct_pins(pf, cgu, pf->dplls.outputs,  in ice_dpll_init_pins()
3170 						pf->dplls.num_outputs,  in ice_dpll_init_pins()
3172 						pf->dplls.eec.dpll,  in ice_dpll_init_pins()
3173 						pf->dplls.pps.dpll);  in ice_dpll_init_pins()
3176 		count += pf->dplls.num_outputs;  in ice_dpll_init_pins()
3177 		if (!pf->dplls.generic) {  in ice_dpll_init_pins()
3178 			ret = ice_dpll_init_direct_pins(pf, cgu, pf->dplls.sma,  in ice_dpll_init_pins()
3182 							pf->dplls.eec.dpll,  in ice_dpll_init_pins()
3183 							pf->dplls.pps.dpll);  in ice_dpll_init_pins()
3187 			ret = ice_dpll_init_direct_pins(pf, cgu, pf->dplls.ufl,  in ice_dpll_init_pins()
3191 							pf->dplls.eec.dpll,  in ice_dpll_init_pins()
3192 							pf->dplls.pps.dpll);  in ice_dpll_init_pins()
3197 		ret = ice_dpll_pin_ref_sync_register(pf->dplls.inputs,  in ice_dpll_init_pins()
3198 						     pf->dplls.num_inputs);  in ice_dpll_init_pins()
3201 		ret = ice_dpll_pin_ref_sync_register(pf->dplls.sma,  in ice_dpll_init_pins()
3206 		count += pf->dplls.num_outputs + 2 * ICE_DPLL_PIN_SW_NUM;  in ice_dpll_init_pins()
3208 	ret = ice_dpll_init_rclk_pins(pf, &pf->dplls.rclk, count + pf->hw.pf_id,  in ice_dpll_init_pins()
3215 	ice_dpll_deinit_direct_pins(cgu, pf->dplls.ufl,  in ice_dpll_init_pins()
3218 				    pf->dplls.pps.dpll, pf->dplls.eec.dpll);  in ice_dpll_init_pins()
3220 	ice_dpll_deinit_direct_pins(cgu, pf->dplls.sma,  in ice_dpll_init_pins()
3223 				    pf->dplls.pps.dpll, pf->dplls.eec.dpll);  in ice_dpll_init_pins()
3225 	ice_dpll_deinit_direct_pins(cgu, pf->dplls.outputs,  in ice_dpll_init_pins()
3226 				    pf->dplls.num_outputs,  in ice_dpll_init_pins()
3227 				    &ice_dpll_output_ops, pf->dplls.pps.dpll,  in ice_dpll_init_pins()
3228 				    pf->dplls.eec.dpll);  in ice_dpll_init_pins()
3230 	ice_dpll_deinit_direct_pins(cgu, pf->dplls.inputs, pf->dplls.num_inputs,  in ice_dpll_init_pins()
3231 				    &ice_dpll_input_ops, pf->dplls.pps.dpll,  in ice_dpll_init_pins()
3232 				    pf->dplls.eec.dpll);  in ice_dpll_init_pins()
3271 	u64 clock_id = pf->dplls.clock_id;  in ice_dpll_init_dpll()
3307 	struct ice_dplls *d = &pf->dplls;  in ice_dpll_deinit_worker()
3314  * ice_dpll_init_worker - Initialize DPLLs periodic worker
3317  * Create and start DPLLs periodic worker.
3319  * Context: Shall be called after pf->dplls.lock is initialized.
3326 	struct ice_dplls *d = &pf->dplls;  in ice_dpll_init_worker()
3330 	kworker = kthread_run_worker(0, "ice-dplls-%s",  in ice_dpll_init_worker()
3366 	struct ice_dpll *de = &pf->dplls.eec, *dp = &pf->dplls.pps;  in ice_dpll_init_info_pins_generic()
3377 		pin_num = pf->dplls.num_inputs;  in ice_dpll_init_info_pins_generic()
3378 		pins = pf->dplls.inputs;  in ice_dpll_init_info_pins_generic()
3379 		phase_adj_max = pf->dplls.input_phase_adj_max;  in ice_dpll_init_info_pins_generic()
3383 		pin_num = pf->dplls.num_outputs;  in ice_dpll_init_info_pins_generic()
3384 		pins = pf->dplls.outputs;  in ice_dpll_init_info_pins_generic()
3385 		phase_adj_max = pf->dplls.output_phase_adj_max;  in ice_dpll_init_info_pins_generic()
3436 	struct ice_dpll *de = &pf->dplls.eec, *dp = &pf->dplls.pps;  in ice_dpll_init_info_direct_pins()
3447 		pins = pf->dplls.inputs;  in ice_dpll_init_info_direct_pins()
3448 		num_pins = pf->dplls.num_inputs;  in ice_dpll_init_info_direct_pins()
3449 		phase_adj_max = pf->dplls.input_phase_adj_max;  in ice_dpll_init_info_direct_pins()
3453 		pins = pf->dplls.outputs;  in ice_dpll_init_info_direct_pins()
3454 		num_pins = pf->dplls.num_outputs;  in ice_dpll_init_info_direct_pins()
3455 		phase_adj_max = pf->dplls.output_phase_adj_max;  in ice_dpll_init_info_direct_pins()
3462 		pf->dplls.generic = true;  in ice_dpll_init_info_direct_pins()
3512  * Init information for rclk pin, cache them in pf->dplls.rclk.
3520 	struct ice_dpll_pin *pin = &pf->dplls.rclk;  in ice_dpll_init_info_rclk_pin()
3535  * pf->dplls.sma and pf->dplls.ufl.
3544 	struct ice_dplls *d = &pf->dplls;  in ice_dpll_init_info_sw_pins()
3650 	kfree(pf->dplls.inputs);  in ice_dpll_deinit_info()
3651 	kfree(pf->dplls.outputs);  in ice_dpll_deinit_info()
3652 	kfree(pf->dplls.eec.input_prio);  in ice_dpll_deinit_info()
3653 	kfree(pf->dplls.pps.input_prio);  in ice_dpll_deinit_info()
3661  * Acquire (from HW) and set basic dpll information (on pf->dplls struct).
3670 	struct ice_dpll *de = &pf->dplls.eec;  in ice_dpll_init_info()
3671 	struct ice_dpll *dp = &pf->dplls.pps;  in ice_dpll_init_info()
3672 	struct ice_dplls *d = &pf->dplls;  in ice_dpll_init_info()
3729 					&pf->dplls.rclk.num_parents);  in ice_dpll_init_info()
3732 	for (i = 0; i < pf->dplls.rclk.num_parents; i++)  in ice_dpll_init_info()
3733 		pf->dplls.rclk.parent_idx[i] = d->base_rclk_idx + i;  in ice_dpll_init_info()
3764  * Context: Destroys pf->dplls.lock mutex. Call only if ICE_FLAG_DPLL was set.
3775 	ice_dpll_deinit_dpll(pf, &pf->dplls.pps, cgu);  in ice_dpll_deinit()
3776 	ice_dpll_deinit_dpll(pf, &pf->dplls.eec, cgu);  in ice_dpll_deinit()
3778 	mutex_destroy(&pf->dplls.lock);  in ice_dpll_deinit()
3785  * Set up the device dplls, register them and pins connected within Linux dpll
3789  * Context: Initializes pf->dplls.lock mutex.
3794 	struct ice_dplls *d = &pf->dplls;  in ice_dpll_init()
3801 	err = ice_dpll_init_dpll(pf, &pf->dplls.eec, cgu, DPLL_TYPE_EEC);  in ice_dpll_init()
3804 	err = ice_dpll_init_dpll(pf, &pf->dplls.pps, cgu, DPLL_TYPE_PPS);  in ice_dpll_init()
3822 	ice_dpll_deinit_dpll(pf, &pf->dplls.pps, cgu);  in ice_dpll_init()
3824 	ice_dpll_deinit_dpll(pf, &pf->dplls.eec, cgu);  in ice_dpll_init()
3829 	dev_warn(ice_pf_to_dev(pf), "DPLLs init failure err:%d\n", err);  in ice_dpll_init()