Lines Matching +full:power +full:- +full:friendly
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2018-2023, Intel Corporation. */
90 * ice_dump_phy_type - helper function to dump phy_type
117 * ice_set_mac_type - Sets MAC type
125 if (hw->vendor_id != PCI_VENDOR_ID_INTEL) in ice_set_mac_type()
126 return -ENODEV; in ice_set_mac_type()
128 switch (hw->device_id) { in ice_set_mac_type()
135 hw->mac_type = ICE_MAC_E810; in ice_set_mac_type()
156 hw->mac_type = ICE_MAC_GENERIC; in ice_set_mac_type()
162 hw->mac_type = ICE_MAC_GENERIC_3K_E825; in ice_set_mac_type()
183 hw->mac_type = ICE_MAC_E830; in ice_set_mac_type()
186 hw->mac_type = ICE_MAC_UNKNOWN; in ice_set_mac_type()
190 ice_debug(hw, ICE_DBG_INIT, "mac_type: %d\n", hw->mac_type); in ice_set_mac_type()
195 * ice_is_generic_mac - check if device's mac_type is generic
202 return (hw->mac_type == ICE_MAC_GENERIC || in ice_is_generic_mac()
203 hw->mac_type == ICE_MAC_GENERIC_3K_E825); in ice_is_generic_mac()
207 * ice_is_pf_c827 - check if pf contains c827 phy
219 if (hw->mac_type != ICE_MAC_E810) in ice_is_pf_c827()
222 if (hw->device_id != ICE_DEV_ID_E810C_QSFP) in ice_is_pf_c827()
243 * ice_clear_pf_cfg - Clear PF configuration
259 * ice_aq_manage_mac_read - manage MAC address read command
287 return -EINVAL; in ice_aq_manage_mac_read()
296 flags = le16_to_cpu(cmd->flags) & ICE_AQC_MAN_MAC_READ_M; in ice_aq_manage_mac_read()
300 return -EIO; in ice_aq_manage_mac_read()
304 for (i = 0; i < cmd->num_addr; i++) in ice_aq_manage_mac_read()
306 ether_addr_copy(hw->port_info->mac.lan_addr, in ice_aq_manage_mac_read()
308 ether_addr_copy(hw->port_info->mac.perm_addr, in ice_aq_manage_mac_read()
317 * ice_aq_get_phy_caps - returns PHY capabilities
341 return -EINVAL; in ice_aq_get_phy_caps()
342 hw = pi->hw; in ice_aq_get_phy_caps()
346 return -EINVAL; in ice_aq_get_phy_caps()
351 cmd->param0 |= cpu_to_le16(ICE_AQC_GET_PHY_RQM); in ice_aq_get_phy_caps()
353 cmd->param0 |= cpu_to_le16(report_mode); in ice_aq_get_phy_caps()
375 ice_dump_phy_type(hw, le64_to_cpu(pcaps->phy_type_low), in ice_aq_get_phy_caps()
376 le64_to_cpu(pcaps->phy_type_high), prefix); in ice_aq_get_phy_caps()
380 ice_debug(hw, ICE_DBG_LINK, "%s: caps = 0x%x\n", prefix, pcaps->caps); in ice_aq_get_phy_caps()
382 pcaps->low_power_ctrl_an); in ice_aq_get_phy_caps()
384 pcaps->eee_cap); in ice_aq_get_phy_caps()
386 pcaps->eeer_value); in ice_aq_get_phy_caps()
388 pcaps->link_fec_options); in ice_aq_get_phy_caps()
390 prefix, pcaps->module_compliance_enforcement); in ice_aq_get_phy_caps()
392 prefix, pcaps->extended_compliance_code); in ice_aq_get_phy_caps()
394 pcaps->module_type[0]); in ice_aq_get_phy_caps()
396 pcaps->module_type[1]); in ice_aq_get_phy_caps()
398 pcaps->module_type[2]); in ice_aq_get_phy_caps()
401 pi->phy.phy_type_low = le64_to_cpu(pcaps->phy_type_low); in ice_aq_get_phy_caps()
402 pi->phy.phy_type_high = le64_to_cpu(pcaps->phy_type_high); in ice_aq_get_phy_caps()
403 memcpy(pi->phy.link_info.module_type, &pcaps->module_type, in ice_aq_get_phy_caps()
404 sizeof(pi->phy.link_info.module_type)); in ice_aq_get_phy_caps()
411 * ice_aq_get_link_topo_handle - get link topology node return status
420 * connection type is backplane or BASE-T.
433 cmd->addr.topo_params.node_type_ctx = in ice_aq_get_link_topo_handle()
438 cmd->addr.topo_params.node_type_ctx |= in ice_aq_get_link_topo_handle()
441 return ice_aq_send_cmd(pi->hw, &desc, NULL, 0, cd); in ice_aq_get_link_topo_handle()
465 return -EINTR; in ice_aq_get_netlist_node()
468 *node_handle = le16_to_cpu(resp->addr.handle); in ice_aq_get_netlist_node()
470 *node_part_number = resp->node_part_num; in ice_aq_get_netlist_node()
481 * @node_handle: output parameter if node found - optional
485 * If node_handle is non-NULL it will be modified on function exit. It is only
486 * valid if the function returns zero, and should be ignored on any non-zero
491 * * -ENOENT if no handle was found,
519 return -ENOENT; in ice_find_netlist_node()
527 * media type is backplane or BASE-T.
533 * connection type is backplane or BASE-T. in ice_is_media_cage_present()
541 * ice_get_media_type - Gets media type
551 hw_link_info = &pi->phy.link_info; in ice_get_media_type()
552 if (hw_link_info->phy_type_low && hw_link_info->phy_type_high) in ice_get_media_type()
556 if (hw_link_info->phy_type_low) { in ice_get_media_type()
562 if (hw_link_info->phy_type_low == ICE_PHY_TYPE_LOW_1G_SGMII && in ice_get_media_type()
563 (hw_link_info->module_type[ICE_AQC_MOD_TYPE_IDENT] == in ice_get_media_type()
565 hw_link_info->module_type[ICE_AQC_MOD_TYPE_IDENT] == in ice_get_media_type()
569 switch (hw_link_info->phy_type_low) { in ice_get_media_type()
641 switch (hw_link_info->phy_type_high) { in ice_get_media_type()
666 switch (hw->mac_type) { in ice_get_link_status_datalen()
679 * @link: pointer to link status structure - optional
700 return -EINVAL; in ice_aq_get_link_info()
701 hw = pi->hw; in ice_aq_get_link_info()
702 li_old = &pi->phy.link_info_old; in ice_aq_get_link_info()
703 hw_media_type = &pi->phy.media_type; in ice_aq_get_link_info()
704 li = &pi->phy.link_info; in ice_aq_get_link_info()
705 hw_fc_info = &pi->fc; in ice_aq_get_link_info()
710 resp->cmd_flags = cpu_to_le16(cmd_flags); in ice_aq_get_link_info()
711 resp->lport_num = pi->lport; in ice_aq_get_link_info()
722 li->link_speed = le16_to_cpu(link_data.link_speed); in ice_aq_get_link_info()
723 li->phy_type_low = le64_to_cpu(link_data.phy_type_low); in ice_aq_get_link_info()
724 li->phy_type_high = le64_to_cpu(link_data.phy_type_high); in ice_aq_get_link_info()
726 li->link_info = link_data.link_info; in ice_aq_get_link_info()
727 li->link_cfg_err = link_data.link_cfg_err; in ice_aq_get_link_info()
728 li->an_info = link_data.an_info; in ice_aq_get_link_info()
729 li->ext_info = link_data.ext_info; in ice_aq_get_link_info()
730 li->max_frame_size = le16_to_cpu(link_data.max_frame_size); in ice_aq_get_link_info()
731 li->fec_info = link_data.cfg & ICE_AQ_FEC_MASK; in ice_aq_get_link_info()
732 li->topo_media_conflict = link_data.topo_media_conflict; in ice_aq_get_link_info()
733 li->pacing = link_data.cfg & (ICE_AQ_CFG_PACING_M | in ice_aq_get_link_info()
740 hw_fc_info->current_mode = ICE_FC_FULL; in ice_aq_get_link_info()
742 hw_fc_info->current_mode = ICE_FC_TX_PAUSE; in ice_aq_get_link_info()
744 hw_fc_info->current_mode = ICE_FC_RX_PAUSE; in ice_aq_get_link_info()
746 hw_fc_info->current_mode = ICE_FC_NONE; in ice_aq_get_link_info()
748 li->lse_ena = !!(resp->cmd_flags & cpu_to_le16(ICE_AQ_LSE_IS_ENABLED)); in ice_aq_get_link_info()
751 ice_debug(hw, ICE_DBG_LINK, " link_speed = 0x%x\n", li->link_speed); in ice_aq_get_link_info()
753 (unsigned long long)li->phy_type_low); in ice_aq_get_link_info()
755 (unsigned long long)li->phy_type_high); in ice_aq_get_link_info()
757 ice_debug(hw, ICE_DBG_LINK, " link_info = 0x%x\n", li->link_info); in ice_aq_get_link_info()
758 ice_debug(hw, ICE_DBG_LINK, " link_cfg_err = 0x%x\n", li->link_cfg_err); in ice_aq_get_link_info()
759 ice_debug(hw, ICE_DBG_LINK, " an_info = 0x%x\n", li->an_info); in ice_aq_get_link_info()
760 ice_debug(hw, ICE_DBG_LINK, " ext_info = 0x%x\n", li->ext_info); in ice_aq_get_link_info()
761 ice_debug(hw, ICE_DBG_LINK, " fec_info = 0x%x\n", li->fec_info); in ice_aq_get_link_info()
762 ice_debug(hw, ICE_DBG_LINK, " lse_ena = 0x%x\n", li->lse_ena); in ice_aq_get_link_info()
764 li->max_frame_size); in ice_aq_get_link_info()
765 ice_debug(hw, ICE_DBG_LINK, " pacing = 0x%x\n", li->pacing); in ice_aq_get_link_info()
772 pi->phy.get_link_info = false; in ice_aq_get_link_info()
801 if (hw->mac_type == ICE_MAC_E830) { in ice_fill_tx_timer_and_fc_thresh()
804 cmd->tx_tmr_value = in ice_fill_tx_timer_and_fc_thresh()
814 cmd->tx_tmr_value = in ice_fill_tx_timer_and_fc_thresh()
823 cmd->fc_refresh_threshold = le16_encode_bits(val, fc_thres_m); in ice_fill_tx_timer_and_fc_thresh()
843 return -EINVAL; in ice_aq_set_mac_cfg()
847 cmd->max_frame_size = cpu_to_le16(max_frame_size); in ice_aq_set_mac_cfg()
855 * ice_init_fltr_mgmt_struct - initializes filter management list and locks
863 hw->switch_info = devm_kzalloc(ice_hw_to_dev(hw), in ice_init_fltr_mgmt_struct()
864 sizeof(*hw->switch_info), GFP_KERNEL); in ice_init_fltr_mgmt_struct()
865 sw = hw->switch_info; in ice_init_fltr_mgmt_struct()
868 return -ENOMEM; in ice_init_fltr_mgmt_struct()
870 INIT_LIST_HEAD(&sw->vsi_list_map_head); in ice_init_fltr_mgmt_struct()
871 sw->prof_res_bm_init = 0; in ice_init_fltr_mgmt_struct()
874 sw->recp_cnt = ICE_SW_LKUP_LAST; in ice_init_fltr_mgmt_struct()
878 devm_kfree(ice_hw_to_dev(hw), hw->switch_info); in ice_init_fltr_mgmt_struct()
885 * ice_cleanup_fltr_mgmt_struct - cleanup filter management list and locks
890 struct ice_switch_info *sw = hw->switch_info; in ice_cleanup_fltr_mgmt_struct()
896 list_for_each_entry_safe(v_pos_map, v_tmp_map, &sw->vsi_list_map_head, in ice_cleanup_fltr_mgmt_struct()
898 list_del(&v_pos_map->list_entry); in ice_cleanup_fltr_mgmt_struct()
901 recps = sw->recp_list; in ice_cleanup_fltr_mgmt_struct()
913 list_del(&lst_itr->list_entry); in ice_cleanup_fltr_mgmt_struct()
914 devm_kfree(ice_hw_to_dev(hw), lst_itr->lkups); in ice_cleanup_fltr_mgmt_struct()
924 list_del(&lst_itr->list_entry); in ice_cleanup_fltr_mgmt_struct()
930 devm_kfree(ice_hw_to_dev(hw), sw->recp_list); in ice_cleanup_fltr_mgmt_struct()
939 * bandwidth according to the device's configuration during power-on.
950 hw->itr_gran = ICE_ITR_GRAN_ABOVE_25; in ice_get_itr_intrl_gran()
951 hw->intrl_gran = ICE_INTRL_GRAN_ABOVE_25; in ice_get_itr_intrl_gran()
954 hw->itr_gran = ICE_ITR_GRAN_MAX_25; in ice_get_itr_intrl_gran()
955 hw->intrl_gran = ICE_INTRL_GRAN_MAX_25; in ice_get_itr_intrl_gran()
961 * ice_wait_for_fw - wait for full FW readiness
965 * Return: 0 on success, -ETIMEDOUT on timeout.
984 return -ETIMEDOUT; in ice_wait_for_fw()
997 struct ice_pf *pf = hw->back; in __fwlog_init()
999 .pdev = pf->pdev, in __fwlog_init()
1006 if (hw->bus.func) in __fwlog_init()
1007 return -EINVAL; in __fwlog_init()
1013 api.debugfs_root = pf->ice_debugfs_pf; in __fwlog_init()
1015 return libie_fwlog_init(&hw->fwlog, &api); in __fwlog_init()
1019 * ice_init_hw - main hardware initialization routine
1034 hw->pf_id = FIELD_GET(PF_FUNC_RID_FUNC_NUM_M, rd32(hw, PF_FUNC_RID)); in ice_init_hw()
1057 INIT_LIST_HEAD(&hw->fdir_list_head); in ice_init_hw()
1069 if (!hw->port_info) in ice_init_hw()
1070 hw->port_info = devm_kzalloc(ice_hw_to_dev(hw), in ice_init_hw()
1071 sizeof(*hw->port_info), in ice_init_hw()
1073 if (!hw->port_info) { in ice_init_hw()
1074 status = -ENOMEM; in ice_init_hw()
1078 hw->port_info->local_fwd_mode = ICE_LOCAL_FWD_MODE_ENABLED; in ice_init_hw()
1080 hw->port_info->hw = hw; in ice_init_hw()
1087 hw->evb_veb = true; in ice_init_hw()
1090 xa_init_flags(&hw->port_info->sched_node_ids, XA_FLAGS_ALLOC); in ice_init_hw()
1101 status = ice_sched_init_port(hw->port_info); in ice_init_hw()
1107 status = -ENOMEM; in ice_init_hw()
1112 status = ice_aq_get_phy_caps(hw->port_info, false, in ice_init_hw()
1120 status = ice_aq_get_link_info(hw->port_info, false, NULL, NULL); in ice_init_hw()
1125 if (!hw->sw_entry_point_layer) { in ice_init_hw()
1127 status = -EIO; in ice_init_hw()
1130 INIT_LIST_HEAD(&hw->agg_list); in ice_init_hw()
1132 if (!hw->max_burst_size) in ice_init_hw()
1144 status = -ENOMEM; in ice_init_hw()
1158 status = ice_alloc_fd_res_cntr(hw, &hw->fd_ctr_base); in ice_init_hw()
1164 mutex_init(&hw->tnl_lock); in ice_init_hw()
1179 hw->lane_num = ice_get_phy_lane_number(hw); in ice_init_hw()
1187 devm_kfree(ice_hw_to_dev(hw), hw->port_info); in ice_init_hw()
1196 if (hw->bus.func) in __fwlog_deinit()
1199 ice_debugfs_pf_deinit(hw->back); in __fwlog_deinit()
1200 libie_fwlog_deinit(&hw->fwlog); in __fwlog_deinit()
1204 * ice_deinit_hw - unroll initialization operations done by ice_init_hw
1213 ice_free_fd_res_cntr(hw, hw->fd_ctr_base); in ice_deinit_hw()
1220 mutex_destroy(&hw->tnl_lock); in ice_deinit_hw()
1229 * ice_check_reset - Check to see if a global reset is complete
1252 return -EIO; in ice_check_reset()
1263 uld_mask = ICE_RESET_DONE_MASK | (hw->func_caps.common_cap.rdma ? in ice_check_reset()
1279 return -EIO; in ice_check_reset()
1286 * ice_pf_reset - Reset the PF
1305 return -EIO; in ice_pf_reset()
1330 return -EIO; in ice_pf_reset()
1337 * ice_reset - Perform different types of reset
1364 return -EINVAL; in ice_reset()
1376 * ice_copy_rxq_ctx_to_hw - Copy packed Rx queue context to HW registers
1396 * ice_copy_rxq_ctx_from_hw - Copy packed Rx Queue context from HW registers
1416 PACKED_FIELD((lsb) + (width) - 1, (lsb), struct struct_name, struct_field)
1444 * ice_pack_rxq_ctx - Pack Rx queue context into a HW buffer
1448 * Pack the Rx queue context from the CPU-friendly unpacked buffer into its
1449 * bit-packed HW layout.
1459 * ice_unpack_rxq_ctx - Unpack Rx queue context from a HW buffer
1463 * Unpack the Rx queue context from the HW buffer into the CPU-friendly
1474 * ice_write_rxq_ctx - Write Rx Queue context to hardware
1482 * Return: 0 on success, or -EINVAL if the Rx queue index is invalid.
1490 return -EINVAL; in ice_write_rxq_ctx()
1499 * ice_read_rxq_ctx - Read Rx queue context from HW
1507 * Returns: 0 on success, or -EINVAL if the Rx queue index is invalid.
1515 return -EINVAL; in ice_read_rxq_ctx()
1556 * ice_pack_txq_ctx - Pack Tx queue context into Admin Queue buffer
1560 * Pack the Tx queue context from the CPU-friendly unpacked buffer into its
1561 * bit-packed Admin Queue layout.
1570 * ice_pack_txq_ctx_full - Pack Tx queue context into a HW buffer
1574 * Pack the Tx queue context from the CPU-friendly unpacked buffer into its
1575 * bit-packed HW layout, including the internal data portion.
1585 * ice_unpack_txq_ctx_full - Unpack Tx queue context from a HW buffer
1590 * state) into the CPU-friendly structure.
1600 * ice_copy_txq_ctx_from_hw - Copy Tx Queue context from HW registers
1616 txq_base = rd32(hw, PFLAN_TX_QALLOC(hw->pf_id)); in ice_copy_txq_ctx_from_hw()
1628 spin_lock(&pf->adapter->txq_ctx_lock); in ice_copy_txq_ctx_from_hw()
1640 spin_unlock(&pf->adapter->txq_ctx_lock); in ice_copy_txq_ctx_from_hw()
1644 * ice_copy_txq_ctx_to_hw - Copy Tx Queue context into HW registers
1657 txq_base = rd32(hw, PFLAN_TX_QALLOC(hw->pf_id)); in ice_copy_txq_ctx_to_hw()
1669 spin_lock(&pf->adapter->txq_ctx_lock); in ice_copy_txq_ctx_to_hw()
1683 spin_unlock(&pf->adapter->txq_ctx_lock); in ice_copy_txq_ctx_to_hw()
1687 * ice_read_txq_ctx - Read Tx queue context from HW
1695 * Returns: 0 on success, or -EINVAL on an invalid Tx queue index.
1703 return -EINVAL; in ice_read_txq_ctx()
1712 * ice_write_txq_ctx - Write Tx queue context to HW
1720 * Returns: 0 on success, or -EINVAL on an invalid Tx queue index.
1728 return -EINVAL; in ice_write_txq_ctx()
1760 * ice_pack_txtime_ctx - pack Tx time queue context into a HW buffer
1764 * Pack the Tx time queue context from the CPU-friendly unpacked buffer into
1765 * its bit-packed HW layout.
1777 * ice_sbq_send_cmd - send Sideband Queue command to Sideband Queue
1793 * ice_sbq_rw_reg - Fill Sideband Queue command
1807 msg.dest_dev = in->dest_dev; in ice_sbq_rw_reg()
1808 msg.opcode = in->opcode; in ice_sbq_rw_reg()
1811 msg.msg_addr_low = cpu_to_le16(in->msg_addr_low); in ice_sbq_rw_reg()
1812 msg.msg_addr_high = cpu_to_le32(in->msg_addr_high); in ice_sbq_rw_reg()
1814 if (in->opcode) in ice_sbq_rw_reg()
1815 msg.data = cpu_to_le32(in->data); in ice_sbq_rw_reg()
1820 msg_len -= sizeof(msg.data); in ice_sbq_rw_reg()
1826 if (!status && !in->opcode) in ice_sbq_rw_reg()
1827 in->data = le32_to_cpu in ice_sbq_rw_reg()
1828 (((struct ice_sbq_msg_cmpl *)&msg)->data); in ice_sbq_rw_reg()
1861 * ice_sq_send_cmd_retry - send command to Control Queue (ATQ)
1883 opcode = le16_to_cpu(desc->opcode); in ice_sq_send_cmd_retry()
1898 hw->adminq.sq_last_status != LIBIE_AQ_RC_EBUSY) in ice_sq_send_cmd_retry()
1911 * ice_aq_send_cmd - send FW Admin Queue command to FW Admin Queue
1938 switch (le16_to_cpu(desc->opcode)) { in ice_aq_send_cmd()
1955 if (le16_to_cpu(cmd->res_id) == LIBIE_AQC_RES_ID_GLBL_LOCK) in ice_aq_send_cmd()
1964 status = ice_sq_send_cmd_retry(hw, &hw->adminq, desc, buf, buf_size, cd); in ice_aq_send_cmd()
1991 hw->fw_branch = resp->fw_branch; in ice_aq_get_fw_ver()
1992 hw->fw_maj_ver = resp->fw_major; in ice_aq_get_fw_ver()
1993 hw->fw_min_ver = resp->fw_minor; in ice_aq_get_fw_ver()
1994 hw->fw_patch = resp->fw_patch; in ice_aq_get_fw_ver()
1995 hw->fw_build = le32_to_cpu(resp->fw_build); in ice_aq_get_fw_ver()
1996 hw->api_branch = resp->api_branch; in ice_aq_get_fw_ver()
1997 hw->api_maj_ver = resp->api_major; in ice_aq_get_fw_ver()
1998 hw->api_min_ver = resp->api_minor; in ice_aq_get_fw_ver()
1999 hw->api_patch = resp->api_patch; in ice_aq_get_fw_ver()
2024 return -EINVAL; in ice_aq_send_driver_ver()
2029 cmd->major_ver = dv->major_ver; in ice_aq_send_driver_ver()
2030 cmd->minor_ver = dv->minor_ver; in ice_aq_send_driver_ver()
2031 cmd->build_ver = dv->build_ver; in ice_aq_send_driver_ver()
2032 cmd->subbuild_ver = dv->subbuild_ver; in ice_aq_send_driver_ver()
2035 while (len < sizeof(dv->driver_string) && in ice_aq_send_driver_ver()
2036 isascii(dv->driver_string[len]) && dv->driver_string[len]) in ice_aq_send_driver_ver()
2039 return ice_aq_send_cmd(hw, &desc, dv->driver_string, len, cd); in ice_aq_send_driver_ver()
2060 cmd->driver_unloading = ICE_AQC_DRIVER_UNLOADING; in ice_aq_q_shutdown()
2077 * 1) 0 - acquired lock, and can perform download package
2078 * 2) -EIO - did not get lock, driver should fail to load
2079 * 3) -EALREADY - did not get lock, but another driver has
2104 cmd_resp->res_id = cpu_to_le16(res); in ice_aq_req_res()
2105 cmd_resp->access_type = cpu_to_le16(access); in ice_aq_req_res()
2106 cmd_resp->res_number = cpu_to_le32(sdp_number); in ice_aq_req_res()
2107 cmd_resp->timeout = cpu_to_le32(*timeout); in ice_aq_req_res()
2124 if (le16_to_cpu(cmd_resp->status) == LIBIE_AQ_RES_GLBL_SUCCESS) { in ice_aq_req_res()
2125 *timeout = le32_to_cpu(cmd_resp->timeout); in ice_aq_req_res()
2127 } else if (le16_to_cpu(cmd_resp->status) == in ice_aq_req_res()
2129 *timeout = le32_to_cpu(cmd_resp->timeout); in ice_aq_req_res()
2130 return -EIO; in ice_aq_req_res()
2131 } else if (le16_to_cpu(cmd_resp->status) == in ice_aq_req_res()
2133 return -EALREADY; in ice_aq_req_res()
2138 return -EIO; in ice_aq_req_res()
2145 if (!status || hw->adminq.sq_last_status == LIBIE_AQ_RC_EBUSY) in ice_aq_req_res()
2146 *timeout = le32_to_cpu(cmd_resp->timeout); in ice_aq_req_res()
2171 cmd->res_id = cpu_to_le16(res); in ice_aq_release_res()
2172 cmd->res_number = cpu_to_le32(sdp_number); in ice_aq_release_res()
2197 /* A return code of -EALREADY means that another driver has in ice_acquire_res()
2202 if (status == -EALREADY) in ice_acquire_res()
2212 timeout = (timeout > delay) ? timeout - delay : 0; in ice_acquire_res()
2215 if (status == -EALREADY) in ice_acquire_res()
2223 if (status && status != -EALREADY) in ice_acquire_res()
2227 if (status == -EALREADY) { in ice_acquire_res()
2231 ice_debug(hw, ICE_DBG_RES, "Warning: -EALREADY not expected\n"); in ice_acquire_res()
2254 if (status != -EIO) in ice_release_res()
2261 * ice_aq_alloc_free_res - command to allocate/free resources
2279 return -EINVAL; in ice_aq_alloc_free_res()
2285 cmd->num_entries = cpu_to_le16(1); in ice_aq_alloc_free_res()
2291 * ice_alloc_hw_res - allocate resource
2308 return -ENOMEM; in ice_alloc_hw_res()
2311 buf->num_elems = cpu_to_le16(num); in ice_alloc_hw_res()
2312 buf->res_type = cpu_to_le16(type | ICE_AQC_RES_TYPE_FLAG_DEDICATED | in ice_alloc_hw_res()
2315 buf->res_type |= cpu_to_le16(ICE_AQC_RES_TYPE_FLAG_SCAN_BOTTOM); in ice_alloc_hw_res()
2321 memcpy(res, buf->elem, sizeof(*buf->elem) * num); in ice_alloc_hw_res()
2329 * ice_free_hw_res - free allocated HW resource
2344 return -ENOMEM; in ice_free_hw_res()
2347 buf->num_elems = cpu_to_le16(num); in ice_free_hw_res()
2348 buf->res_type = cpu_to_le16(type); in ice_free_hw_res()
2349 memcpy(buf->elem, res, sizeof(*buf->elem) * num); in ice_free_hw_res()
2360 * ice_get_num_per_func - determine number of resources per PF
2373 funcs = hweight8(hw->dev_caps.common_cap.valid_functions & in ice_get_num_per_func()
2383 * ice_parse_common_caps - parse common device/function capabilities
2399 u32 logical_id = le32_to_cpu(elem->logical_id); in ice_parse_common_caps()
2400 u32 phys_id = le32_to_cpu(elem->phys_id); in ice_parse_common_caps()
2401 u32 number = le32_to_cpu(elem->number); in ice_parse_common_caps()
2402 u16 cap = le16_to_cpu(elem->cap); in ice_parse_common_caps()
2407 caps->valid_functions = number; in ice_parse_common_caps()
2409 caps->valid_functions); in ice_parse_common_caps()
2412 caps->sr_iov_1_1 = (number == 1); in ice_parse_common_caps()
2414 caps->sr_iov_1_1); in ice_parse_common_caps()
2417 caps->dcb = (number == 1); in ice_parse_common_caps()
2418 caps->active_tc_bitmap = logical_id; in ice_parse_common_caps()
2419 caps->maxtc = phys_id; in ice_parse_common_caps()
2420 ice_debug(hw, ICE_DBG_INIT, "%s: dcb = %d\n", prefix, caps->dcb); in ice_parse_common_caps()
2422 caps->active_tc_bitmap); in ice_parse_common_caps()
2423 ice_debug(hw, ICE_DBG_INIT, "%s: maxtc = %d\n", prefix, caps->maxtc); in ice_parse_common_caps()
2426 caps->rss_table_size = number; in ice_parse_common_caps()
2427 caps->rss_table_entry_width = logical_id; in ice_parse_common_caps()
2429 caps->rss_table_size); in ice_parse_common_caps()
2431 caps->rss_table_entry_width); in ice_parse_common_caps()
2434 caps->num_rxq = number; in ice_parse_common_caps()
2435 caps->rxq_first_id = phys_id; in ice_parse_common_caps()
2437 caps->num_rxq); in ice_parse_common_caps()
2439 caps->rxq_first_id); in ice_parse_common_caps()
2442 caps->num_txq = number; in ice_parse_common_caps()
2443 caps->txq_first_id = phys_id; in ice_parse_common_caps()
2445 caps->num_txq); in ice_parse_common_caps()
2447 caps->txq_first_id); in ice_parse_common_caps()
2450 caps->num_msix_vectors = number; in ice_parse_common_caps()
2451 caps->msix_vector_first_id = phys_id; in ice_parse_common_caps()
2453 caps->num_msix_vectors); in ice_parse_common_caps()
2455 caps->msix_vector_first_id); in ice_parse_common_caps()
2458 caps->nvm_update_pending_nvm = true; in ice_parse_common_caps()
2462 caps->nvm_update_pending_orom = true; in ice_parse_common_caps()
2466 caps->nvm_update_pending_netlist = true; in ice_parse_common_caps()
2470 caps->nvm_unified_update = in ice_parse_common_caps()
2474 caps->nvm_unified_update); in ice_parse_common_caps()
2478 caps->rdma = (number == 1); in ice_parse_common_caps()
2479 ice_debug(hw, ICE_DBG_INIT, "%s: rdma = %d\n", prefix, caps->rdma); in ice_parse_common_caps()
2482 caps->max_mtu = number; in ice_parse_common_caps()
2484 prefix, caps->max_mtu); in ice_parse_common_caps()
2487 caps->pcie_reset_avoidance = (number > 0); in ice_parse_common_caps()
2490 caps->pcie_reset_avoidance); in ice_parse_common_caps()
2493 caps->reset_restrict_support = (number == 1); in ice_parse_common_caps()
2496 caps->reset_restrict_support); in ice_parse_common_caps()
2499 caps->roce_lag = number & LIBIE_AQC_BIT_ROCEV2_LAG; in ice_parse_common_caps()
2501 prefix, caps->roce_lag); in ice_parse_common_caps()
2502 caps->sriov_lag = number & LIBIE_AQC_BIT_SRIOV_LAG; in ice_parse_common_caps()
2504 prefix, caps->sriov_lag); in ice_parse_common_caps()
2505 caps->sriov_aa_lag = number & LIBIE_AQC_BIT_SRIOV_AA_LAG; in ice_parse_common_caps()
2507 prefix, caps->sriov_aa_lag); in ice_parse_common_caps()
2510 caps->tx_sched_topo_comp_mode_en = (number == 1); in ice_parse_common_caps()
2521 * ice_recalc_port_limited_caps - Recalculate port limited capabilities
2525 * Re-calculate the capabilities that are dependent on the number of physical
2535 if (hw->dev_caps.num_funcs > 4) { in ice_recalc_port_limited_caps()
2537 caps->maxtc = 4; in ice_recalc_port_limited_caps()
2539 caps->maxtc); in ice_recalc_port_limited_caps()
2540 if (caps->rdma) { in ice_recalc_port_limited_caps()
2542 caps->rdma = 0; in ice_recalc_port_limited_caps()
2548 if (caps == &hw->dev_caps.common_cap) in ice_recalc_port_limited_caps()
2554 * ice_parse_vf_func_caps - Parse ICE_AQC_CAPS_VF function caps
2565 u32 logical_id = le32_to_cpu(cap->logical_id); in ice_parse_vf_func_caps()
2566 u32 number = le32_to_cpu(cap->number); in ice_parse_vf_func_caps()
2568 func_p->num_allocd_vfs = number; in ice_parse_vf_func_caps()
2569 func_p->vf_base_id = logical_id; in ice_parse_vf_func_caps()
2571 func_p->num_allocd_vfs); in ice_parse_vf_func_caps()
2573 func_p->vf_base_id); in ice_parse_vf_func_caps()
2577 * ice_parse_vsi_func_caps - Parse ICE_AQC_CAPS_VSI function caps
2588 func_p->guar_num_vsi = ice_get_num_per_func(hw, ICE_MAX_VSI); in ice_parse_vsi_func_caps()
2590 le32_to_cpu(cap->number)); in ice_parse_vsi_func_caps()
2592 func_p->guar_num_vsi); in ice_parse_vsi_func_caps()
2596 * ice_parse_1588_func_caps - Parse ICE_AQC_CAPS_1588 function caps
2607 struct ice_ts_func_info *info = &func_p->ts_func_info; in ice_parse_1588_func_caps()
2608 u32 number = le32_to_cpu(cap->number); in ice_parse_1588_func_caps()
2610 info->ena = ((number & ICE_TS_FUNC_ENA_M) != 0); in ice_parse_1588_func_caps()
2611 func_p->common_cap.ieee_1588 = info->ena; in ice_parse_1588_func_caps()
2613 info->src_tmr_owned = ((number & ICE_TS_SRC_TMR_OWND_M) != 0); in ice_parse_1588_func_caps()
2614 info->tmr_ena = ((number & ICE_TS_TMR_ENA_M) != 0); in ice_parse_1588_func_caps()
2615 info->tmr_index_owned = ((number & ICE_TS_TMR_IDX_OWND_M) != 0); in ice_parse_1588_func_caps()
2616 info->tmr_index_assoc = ((number & ICE_TS_TMR_IDX_ASSOC_M) != 0); in ice_parse_1588_func_caps()
2618 if (hw->mac_type != ICE_MAC_GENERIC_3K_E825) { in ice_parse_1588_func_caps()
2619 info->clk_freq = FIELD_GET(ICE_TS_CLK_FREQ_M, number); in ice_parse_1588_func_caps()
2620 info->clk_src = ((number & ICE_TS_CLK_SRC_M) != 0); in ice_parse_1588_func_caps()
2622 info->clk_freq = ICE_TSPLL_FREQ_156_250; in ice_parse_1588_func_caps()
2623 info->clk_src = ICE_CLK_SRC_TIME_REF; in ice_parse_1588_func_caps()
2626 if (info->clk_freq < NUM_ICE_TSPLL_FREQ) { in ice_parse_1588_func_caps()
2627 info->time_ref = (enum ice_tspll_freq)info->clk_freq; in ice_parse_1588_func_caps()
2630 * default to avoid out-of-bounds look ups of frequency in ice_parse_1588_func_caps()
2634 info->clk_freq); in ice_parse_1588_func_caps()
2635 info->time_ref = ICE_TSPLL_FREQ_25_000; in ice_parse_1588_func_caps()
2639 func_p->common_cap.ieee_1588); in ice_parse_1588_func_caps()
2641 info->src_tmr_owned); in ice_parse_1588_func_caps()
2643 info->tmr_ena); in ice_parse_1588_func_caps()
2645 info->tmr_index_owned); in ice_parse_1588_func_caps()
2647 info->tmr_index_assoc); in ice_parse_1588_func_caps()
2649 info->clk_freq); in ice_parse_1588_func_caps()
2651 info->clk_src); in ice_parse_1588_func_caps()
2655 * ice_parse_fdir_func_caps - Parse ICE_AQC_CAPS_FD function caps
2667 switch (hw->mac_type) { in ice_parse_fdir_func_caps()
2677 func_p->fd_fltr_guar = ice_get_num_per_func(hw, gsize); in ice_parse_fdir_func_caps()
2678 func_p->fd_fltr_best_effort = bsize; in ice_parse_fdir_func_caps()
2681 func_p->fd_fltr_guar); in ice_parse_fdir_func_caps()
2683 func_p->fd_fltr_best_effort); in ice_parse_fdir_func_caps()
2687 * ice_parse_func_caps - Parse function capabilities
2715 found = ice_parse_common_caps(hw, &func_p->common_cap, in ice_parse_func_caps()
2740 ice_recalc_port_limited_caps(hw, &func_p->common_cap); in ice_parse_func_caps()
2744 * ice_func_id_to_logical_id - map from function id to logical pf id
2763 * ice_parse_valid_functions_cap - Parse ICE_AQC_CAPS_VALID_FUNCTIONS caps
2774 u32 number = le32_to_cpu(cap->number); in ice_parse_valid_functions_cap()
2776 dev_p->num_funcs = hweight32(number); in ice_parse_valid_functions_cap()
2778 dev_p->num_funcs); in ice_parse_valid_functions_cap()
2780 hw->logical_pf_id = ice_func_id_to_logical_id(number, hw->pf_id); in ice_parse_valid_functions_cap()
2784 * ice_parse_vf_dev_caps - Parse ICE_AQC_CAPS_VF device caps
2795 u32 number = le32_to_cpu(cap->number); in ice_parse_vf_dev_caps()
2797 dev_p->num_vfs_exposed = number; in ice_parse_vf_dev_caps()
2799 dev_p->num_vfs_exposed); in ice_parse_vf_dev_caps()
2803 * ice_parse_vsi_dev_caps - Parse ICE_AQC_CAPS_VSI device caps
2814 u32 number = le32_to_cpu(cap->number); in ice_parse_vsi_dev_caps()
2816 dev_p->num_vsi_allocd_to_host = number; in ice_parse_vsi_dev_caps()
2818 dev_p->num_vsi_allocd_to_host); in ice_parse_vsi_dev_caps()
2822 * ice_parse_1588_dev_caps - Parse ICE_AQC_CAPS_1588 device caps
2833 struct ice_ts_dev_info *info = &dev_p->ts_dev_info; in ice_parse_1588_dev_caps()
2834 u32 logical_id = le32_to_cpu(cap->logical_id); in ice_parse_1588_dev_caps()
2835 u32 phys_id = le32_to_cpu(cap->phys_id); in ice_parse_1588_dev_caps()
2836 u32 number = le32_to_cpu(cap->number); in ice_parse_1588_dev_caps()
2838 info->ena = ((number & ICE_TS_DEV_ENA_M) != 0); in ice_parse_1588_dev_caps()
2839 dev_p->common_cap.ieee_1588 = info->ena; in ice_parse_1588_dev_caps()
2841 info->tmr0_owner = number & ICE_TS_TMR0_OWNR_M; in ice_parse_1588_dev_caps()
2842 info->tmr0_owned = ((number & ICE_TS_TMR0_OWND_M) != 0); in ice_parse_1588_dev_caps()
2843 info->tmr0_ena = ((number & ICE_TS_TMR0_ENA_M) != 0); in ice_parse_1588_dev_caps()
2845 info->tmr1_owner = FIELD_GET(ICE_TS_TMR1_OWNR_M, number); in ice_parse_1588_dev_caps()
2846 info->tmr1_owned = ((number & ICE_TS_TMR1_OWND_M) != 0); in ice_parse_1588_dev_caps()
2847 info->tmr1_ena = ((number & ICE_TS_TMR1_ENA_M) != 0); in ice_parse_1588_dev_caps()
2849 info->ts_ll_read = ((number & ICE_TS_LL_TX_TS_READ_M) != 0); in ice_parse_1588_dev_caps()
2850 info->ts_ll_int_read = ((number & ICE_TS_LL_TX_TS_INT_READ_M) != 0); in ice_parse_1588_dev_caps()
2851 info->ll_phy_tmr_update = ((number & ICE_TS_LL_PHY_TMR_UPDATE_M) != 0); in ice_parse_1588_dev_caps()
2853 info->ena_ports = logical_id; in ice_parse_1588_dev_caps()
2854 info->tmr_own_map = phys_id; in ice_parse_1588_dev_caps()
2857 dev_p->common_cap.ieee_1588); in ice_parse_1588_dev_caps()
2859 info->tmr0_owner); in ice_parse_1588_dev_caps()
2861 info->tmr0_owned); in ice_parse_1588_dev_caps()
2863 info->tmr0_ena); in ice_parse_1588_dev_caps()
2865 info->tmr1_owner); in ice_parse_1588_dev_caps()
2867 info->tmr1_owned); in ice_parse_1588_dev_caps()
2869 info->tmr1_ena); in ice_parse_1588_dev_caps()
2871 info->ts_ll_read); in ice_parse_1588_dev_caps()
2873 info->ts_ll_int_read); in ice_parse_1588_dev_caps()
2875 info->ll_phy_tmr_update); in ice_parse_1588_dev_caps()
2877 info->ena_ports); in ice_parse_1588_dev_caps()
2879 info->tmr_own_map); in ice_parse_1588_dev_caps()
2883 * ice_parse_fdir_dev_caps - Parse ICE_AQC_CAPS_FD device caps
2894 u32 number = le32_to_cpu(cap->number); in ice_parse_fdir_dev_caps()
2896 dev_p->num_flow_director_fltr = number; in ice_parse_fdir_dev_caps()
2898 dev_p->num_flow_director_fltr); in ice_parse_fdir_dev_caps()
2902 * ice_parse_sensor_reading_cap - Parse ICE_AQC_CAPS_SENSOR_READING cap
2914 dev_p->supported_sensors = le32_to_cpu(cap->number); in ice_parse_sensor_reading_cap()
2918 dev_p->supported_sensors); in ice_parse_sensor_reading_cap()
2922 * ice_parse_nac_topo_dev_caps - Parse ICE_AQC_CAPS_NAC_TOPOLOGY cap
2933 dev_p->nac_topo.mode = le32_to_cpu(cap->number); in ice_parse_nac_topo_dev_caps()
2934 dev_p->nac_topo.id = le32_to_cpu(cap->phys_id) & ICE_NAC_TOPO_ID_M; in ice_parse_nac_topo_dev_caps()
2938 (dev_p->nac_topo.mode & ICE_NAC_TOPO_PRIMARY_M) ? in ice_parse_nac_topo_dev_caps()
2939 "primary" : "secondary", dev_p->nac_topo.id); in ice_parse_nac_topo_dev_caps()
2942 !!(dev_p->nac_topo.mode & ICE_NAC_TOPO_PRIMARY_M)); in ice_parse_nac_topo_dev_caps()
2944 !!(dev_p->nac_topo.mode & ICE_NAC_TOPO_DUAL_M)); in ice_parse_nac_topo_dev_caps()
2946 dev_p->nac_topo.id); in ice_parse_nac_topo_dev_caps()
2950 * ice_parse_dev_caps - Parse device capabilities
2978 found = ice_parse_common_caps(hw, &dev_p->common_cap, in ice_parse_dev_caps()
3012 ice_recalc_port_limited_caps(hw, &dev_p->common_cap); in ice_parse_dev_caps()
3052 * ice_is_cgu_in_netlist - check for CGU presence
3058 * * true - cgu is present
3059 * * false - cgu is not present
3067 hw->cgu_part_number = ICE_AQC_GET_LINK_TOPO_NODE_NR_ZL30632_80032; in ice_is_cgu_in_netlist()
3074 hw->cgu_part_number = ICE_AQC_GET_LINK_TOPO_NODE_NR_SI5383_5384; in ice_is_cgu_in_netlist()
3098 * ice_aq_list_caps - query function/device capabilities
3128 return -EINVAL; in ice_aq_list_caps()
3134 *cap_count = le32_to_cpu(cmd->count); in ice_aq_list_caps()
3140 * ice_discover_dev_caps - Read and extract device capabilities
3156 return -ENOMEM; in ice_discover_dev_caps()
3174 * ice_discover_func_caps - Read and extract function capabilities
3190 return -ENOMEM; in ice_discover_func_caps()
3208 * ice_set_safe_mode_caps - Override dev/func capabilities when in safe mode
3213 struct ice_hw_func_caps *func_caps = &hw->func_caps; in ice_set_safe_mode_caps()
3214 struct ice_hw_dev_caps *dev_caps = &hw->dev_caps; in ice_set_safe_mode_caps()
3219 cached_caps = func_caps->common_cap; in ice_set_safe_mode_caps()
3225 func_caps->common_cap.name = cached_caps.name in ice_set_safe_mode_caps()
3239 func_caps->common_cap.num_rxq = 1; in ice_set_safe_mode_caps()
3240 func_caps->common_cap.num_txq = 1; in ice_set_safe_mode_caps()
3243 func_caps->common_cap.num_msix_vectors = 2; in ice_set_safe_mode_caps()
3244 func_caps->guar_num_vsi = 1; in ice_set_safe_mode_caps()
3247 cached_caps = dev_caps->common_cap; in ice_set_safe_mode_caps()
3248 num_funcs = dev_caps->num_funcs; in ice_set_safe_mode_caps()
3254 dev_caps->common_cap.name = cached_caps.name in ice_set_safe_mode_caps()
3266 dev_caps->num_funcs = num_funcs; in ice_set_safe_mode_caps()
3269 dev_caps->common_cap.num_rxq = num_funcs; in ice_set_safe_mode_caps()
3270 dev_caps->common_cap.num_txq = num_funcs; in ice_set_safe_mode_caps()
3273 dev_caps->common_cap.num_msix_vectors = 2 * num_funcs; in ice_set_safe_mode_caps()
3277 * ice_get_caps - get info about the HW
3284 status = ice_discover_dev_caps(hw, &hw->dev_caps); in ice_get_caps()
3288 return ice_discover_func_caps(hw, &hw->func_caps); in ice_get_caps()
3292 * ice_aq_manage_mac_write - manage MAC address write command
3310 cmd->flags = flags; in ice_aq_manage_mac_write()
3311 ether_addr_copy(cmd->mac_addr, mac_addr); in ice_aq_manage_mac_write()
3329 cmd->rx_cnt = ICE_AQC_CLEAR_PXE_RX_CNT; in ice_aq_clear_pxe_mode()
3335 * ice_clear_pxe_mode - clear pxe operations mode
3339 * like descriptor fetch/write-back mode.
3343 if (ice_check_sq_alive(hw, &hw->adminq)) in ice_clear_pxe_mode()
3348 * ice_aq_set_port_params - set physical port parameters.
3361 struct ice_hw *hw = pi->hw; in ice_aq_set_port_params()
3370 cmd->cmd_flags = cpu_to_le16(cmd_flags); in ice_aq_set_port_params()
3372 cmd->local_fwd_mode = pi->local_fwd_mode | in ice_aq_set_port_params()
3387 switch (hw->device_id) { in ice_is_100m_speed_supported()
3399 * ice_get_link_speed_based_on_phy_type - returns link speed
3550 * [ice_aqc_get_link_status->link_speed]. Caller can pass in
3607 return -EINVAL; in ice_aq_set_phy_cfg()
3609 /* Ensure that only valid bits of cfg->caps can be turned on. */ in ice_aq_set_phy_cfg()
3610 if (cfg->caps & ~ICE_AQ_PHY_ENA_VALID_MASK) { in ice_aq_set_phy_cfg()
3611 ice_debug(hw, ICE_DBG_PHY, "Invalid bit is set in ice_aqc_set_phy_cfg_data->caps : 0x%x\n", in ice_aq_set_phy_cfg()
3612 cfg->caps); in ice_aq_set_phy_cfg()
3614 cfg->caps &= ICE_AQ_PHY_ENA_VALID_MASK; in ice_aq_set_phy_cfg()
3619 cmd->lport_num = pi->lport; in ice_aq_set_phy_cfg()
3624 (unsigned long long)le64_to_cpu(cfg->phy_type_low)); in ice_aq_set_phy_cfg()
3626 (unsigned long long)le64_to_cpu(cfg->phy_type_high)); in ice_aq_set_phy_cfg()
3627 ice_debug(hw, ICE_DBG_LINK, " caps = 0x%x\n", cfg->caps); in ice_aq_set_phy_cfg()
3629 cfg->low_power_ctrl_an); in ice_aq_set_phy_cfg()
3630 ice_debug(hw, ICE_DBG_LINK, " eee_cap = 0x%x\n", cfg->eee_cap); in ice_aq_set_phy_cfg()
3631 ice_debug(hw, ICE_DBG_LINK, " eeer_value = 0x%x\n", cfg->eeer_value); in ice_aq_set_phy_cfg()
3633 cfg->link_fec_opt); in ice_aq_set_phy_cfg()
3636 if (hw->adminq.sq_last_status == LIBIE_AQ_RC_EMODE) in ice_aq_set_phy_cfg()
3640 pi->phy.curr_user_phy_cfg = *cfg; in ice_aq_set_phy_cfg()
3646 * ice_update_link_info - update status of the HW network link
3655 return -EINVAL; in ice_update_link_info()
3657 li = &pi->phy.link_info; in ice_update_link_info()
3663 if (li->link_info & ICE_AQ_MEDIA_AVAILABLE) { in ice_update_link_info()
3668 return -ENOMEM; in ice_update_link_info()
3678 * ice_aq_get_phy_equalization - function to read serdes equaliser
3684 * @output: pointer to the caller-supplied buffer to return serdes equaliser
3686 * Return: non-zero status on error and 0 on success.
3705 cmd->activity_id = cpu_to_le16(ICE_AQC_ACT_ID_DNL); in ice_aq_get_phy_equalization()
3729 * ice_aq_get_fec_stats - reads fec stats from phy
3734 * @output: pointer to the caller-supplied buffer to return requested fec stats
3736 * Return: non-zero status on error and 0 on success.
3747 return -EINVAL; in ice_aq_get_fec_stats()
3756 return -EINVAL; in ice_aq_get_fec_stats()
3789 pi->phy.curr_user_fc_req = cache_data.data.curr_user_fc_req; in ice_cache_phy_user_req()
3792 pi->phy.curr_user_speed_req = in ice_cache_phy_user_req()
3796 pi->phy.curr_user_fec_req = cache_data.data.curr_user_fec_req; in ice_cache_phy_user_req()
3851 * ice_cfg_phy_fc - Configure PHY FC data based on FC mode
3864 return -EINVAL; in ice_cfg_phy_fc()
3882 cfg->caps &= ~(ICE_AQC_PHY_EN_TX_LINK_PAUSE | in ice_cfg_phy_fc()
3886 cfg->caps |= pause_mask; in ice_cfg_phy_fc()
3912 return -EINVAL; in ice_set_fc()
3915 hw = pi->hw; in ice_set_fc()
3919 return -ENOMEM; in ice_set_fc()
3932 status = ice_cfg_phy_fc(pi, &cfg, pi->fc.req_mode); in ice_set_fc()
3937 if (cfg.caps != pcaps->caps) { in ice_set_fc()
3996 if (phy_caps->phy_type_low != phy_cfg->phy_type_low || in ice_phy_caps_equals_cfg()
3997 phy_caps->phy_type_high != phy_cfg->phy_type_high || in ice_phy_caps_equals_cfg()
3998 ((phy_caps->caps & caps_mask) != (phy_cfg->caps & cfg_mask)) || in ice_phy_caps_equals_cfg()
3999 phy_caps->low_power_ctrl_an != phy_cfg->low_power_ctrl_an || in ice_phy_caps_equals_cfg()
4000 phy_caps->eee_cap != phy_cfg->eee_cap || in ice_phy_caps_equals_cfg()
4001 phy_caps->eeer_value != phy_cfg->eeer_value || in ice_phy_caps_equals_cfg()
4002 phy_caps->link_fec_options != phy_cfg->link_fec_opt) in ice_phy_caps_equals_cfg()
4009 * ice_copy_phy_caps_to_cfg - Copy PHY ability data to configuration data
4026 cfg->phy_type_low = caps->phy_type_low; in ice_copy_phy_caps_to_cfg()
4027 cfg->phy_type_high = caps->phy_type_high; in ice_copy_phy_caps_to_cfg()
4028 cfg->caps = caps->caps; in ice_copy_phy_caps_to_cfg()
4029 cfg->low_power_ctrl_an = caps->low_power_ctrl_an; in ice_copy_phy_caps_to_cfg()
4030 cfg->eee_cap = caps->eee_cap; in ice_copy_phy_caps_to_cfg()
4031 cfg->eeer_value = caps->eeer_value; in ice_copy_phy_caps_to_cfg()
4032 cfg->link_fec_opt = caps->link_fec_options; in ice_copy_phy_caps_to_cfg()
4033 cfg->module_compliance_enforcement = in ice_copy_phy_caps_to_cfg()
4034 caps->module_compliance_enforcement; in ice_copy_phy_caps_to_cfg()
4038 * ice_cfg_phy_fec - Configure PHY FEC data based on FEC mode
4052 return -EINVAL; in ice_cfg_phy_fec()
4054 hw = pi->hw; in ice_cfg_phy_fec()
4058 return -ENOMEM; in ice_cfg_phy_fec()
4067 cfg->caps |= pcaps->caps & ICE_AQC_PHY_EN_AUTO_FEC; in ice_cfg_phy_fec()
4068 cfg->link_fec_opt = pcaps->link_fec_options; in ice_cfg_phy_fec()
4072 /* Clear RS bits, and AND BASE-R ability in ice_cfg_phy_fec()
4075 cfg->link_fec_opt &= ICE_AQC_PHY_FEC_10G_KR_40G_KR4_EN | in ice_cfg_phy_fec()
4077 cfg->link_fec_opt |= ICE_AQC_PHY_FEC_10G_KR_40G_KR4_REQ | in ice_cfg_phy_fec()
4081 /* Clear BASE-R bits, and AND RS ability in ice_cfg_phy_fec()
4084 cfg->link_fec_opt &= ICE_AQC_PHY_FEC_25G_RS_CLAUSE91_EN; in ice_cfg_phy_fec()
4085 cfg->link_fec_opt |= ICE_AQC_PHY_FEC_25G_RS_528_REQ | in ice_cfg_phy_fec()
4090 cfg->link_fec_opt &= ~ICE_AQC_PHY_FEC_MASK; in ice_cfg_phy_fec()
4094 cfg->caps &= ICE_AQC_PHY_CAPS_MASK; in ice_cfg_phy_fec()
4095 cfg->link_fec_opt |= pcaps->link_fec_options; in ice_cfg_phy_fec()
4098 status = -EINVAL; in ice_cfg_phy_fec()
4112 cfg->link_fec_opt = tlv.fec_options; in ice_cfg_phy_fec()
4120 * ice_get_link_status - get status of the HW network link
4134 return -EINVAL; in ice_get_link_status()
4136 phy_info = &pi->phy; in ice_get_link_status()
4138 if (phy_info->get_link_info) { in ice_get_link_status()
4142 ice_debug(pi->hw, ICE_DBG_LINK, "get link status error, status = %d\n", in ice_get_link_status()
4146 *link_up = phy_info->link_info.link_info & ICE_AQ_LINK_UP; in ice_get_link_status()
4157 * Sets up the link and restarts the Auto-Negotiation over the link.
4170 cmd->cmd_flags = ICE_AQC_RESTART_AN_LINK_RESTART; in ice_aq_set_link_restart_an()
4171 cmd->lport_num = pi->lport; in ice_aq_set_link_restart_an()
4173 cmd->cmd_flags |= ICE_AQC_RESTART_AN_LINK_ENABLE; in ice_aq_set_link_restart_an()
4175 cmd->cmd_flags &= ~ICE_AQC_RESTART_AN_LINK_ENABLE; in ice_aq_set_link_restart_an()
4177 return ice_aq_send_cmd(pi->hw, &desc, NULL, 0, cd); in ice_aq_set_link_restart_an()
4200 cmd->lport_num = port_num; in ice_aq_set_event_mask()
4202 cmd->event_mask = cpu_to_le16(mask); in ice_aq_set_event_mask()
4224 cmd->lb_mode = ICE_AQ_MAC_LB_EN; in ice_aq_set_mac_loopback()
4232 * @is_orig_mode: is this LED set to original mode (by the net-list)
4242 struct ice_hw *hw = pi->hw; in ice_aq_set_port_id_led()
4250 cmd->ident_mode = ICE_AQC_PORT_IDENT_LED_ORIG; in ice_aq_set_port_id_led()
4252 cmd->ident_mode = ICE_AQC_PORT_IDENT_LED_BLINK; in ice_aq_set_port_id_led()
4261 * @option_count: input - size of the buffer in port options structures,
4262 * output - number of returned port options
4287 return -EINVAL; in ice_aq_get_port_options()
4293 cmd->lport_num = lport; in ice_aq_get_port_options()
4294 cmd->lport_num_valid = lport_valid; in ice_aq_get_port_options()
4303 cmd->port_options_count); in ice_aq_get_port_options()
4306 cmd->port_options); in ice_aq_get_port_options()
4309 cmd->port_options); in ice_aq_get_port_options()
4310 if (*active_option_idx > (*option_count - 1)) in ice_aq_get_port_options()
4311 return -EIO; in ice_aq_get_port_options()
4317 cmd->pending_port_option_status); in ice_aq_get_port_options()
4320 cmd->pending_port_option_status); in ice_aq_get_port_options()
4321 if (*pending_option_idx > (*option_count - 1)) in ice_aq_get_port_options()
4322 return -EIO; in ice_aq_get_port_options()
4358 return -EINVAL; in ice_aq_set_port_option()
4364 cmd->lport_num = lport; in ice_aq_set_port_option()
4366 cmd->lport_num_valid = lport_valid; in ice_aq_set_port_option()
4367 cmd->selected_port_option = new_option; in ice_aq_set_port_option()
4373 * ice_get_phy_lane_number - Get PHY lane number for current adapter
4387 * PHY (0x579F), in which there is also 1:1 pf_id -> lane_number in ice_get_phy_lane_number()
4390 if (hw->mac_type == ICE_MAC_GENERIC || in ice_get_phy_lane_number()
4391 hw->device_id == ICE_DEV_ID_E825C_SGMII) in ice_get_phy_lane_number()
4392 return hw->pf_id; in ice_get_phy_lane_number()
4396 return -ENOMEM; in ice_get_phy_lane_number()
4417 if (hw->pf_id == lport) { in ice_get_phy_lane_number()
4418 if (hw->mac_type == ICE_MAC_GENERIC_3K_E825 && in ice_get_phy_lane_number()
4428 err = -ENXIO; in ice_get_phy_lane_number()
4443 * @length: 1-16 for read, 1 for write.
4460 return -EINVAL; in ice_aq_sff_eeprom()
4465 cmd->lport_num = (u8)(lport & 0xff); in ice_aq_sff_eeprom()
4466 cmd->lport_num_valid = (u8)((lport >> 8) & 0x01); in ice_aq_sff_eeprom()
4471 cmd->i2c_bus_addr = cpu_to_le16(i2c_bus_addr); in ice_aq_sff_eeprom()
4472 cmd->i2c_mem_addr = cpu_to_le16(mem_addr & 0xff); in ice_aq_sff_eeprom()
4473 cmd->eeprom_page = le16_encode_bits(page, ICE_AQC_SFF_EEPROM_PAGE_M); in ice_aq_sff_eeprom()
4519 u16 opcode, vsi_id, vsi_handle = params->vsi_handle, glob_lut_idx = 0; in __ice_aq_get_set_rss_lut()
4520 enum ice_lut_type lut_type = params->lut_type; in __ice_aq_get_set_rss_lut()
4525 u8 *lut = params->lut; in __ice_aq_get_set_rss_lut()
4529 return -EINVAL; in __ice_aq_get_set_rss_lut()
4532 if (lut_size > params->lut_size) in __ice_aq_get_set_rss_lut()
4533 return -EINVAL; in __ice_aq_get_set_rss_lut()
4534 else if (set && lut_size != params->lut_size) in __ice_aq_get_set_rss_lut()
4535 return -EINVAL; in __ice_aq_get_set_rss_lut()
4544 desc_params->vsi_id = cpu_to_le16(vsi_id | ICE_AQC_RSS_VSI_VALID); in __ice_aq_get_set_rss_lut()
4548 params->global_lut_id); in __ice_aq_get_set_rss_lut()
4551 desc_params->flags = cpu_to_le16(flags); in __ice_aq_get_set_rss_lut()
4607 desc_params->vsi_id = cpu_to_le16(vsi_id | ICE_AQC_RSS_VSI_VALID); in __ice_aq_get_set_rss_key()
4625 return -EINVAL; in ice_aq_get_rss_key()
4644 return -EINVAL; in ice_aq_set_rss_key()
4686 return -EINVAL; in ice_aq_add_lan_txq()
4689 return -EINVAL; in ice_aq_add_lan_txq()
4692 sum_size += struct_size(list, txqs, list->num_txqs); in ice_aq_add_lan_txq()
4693 list = (struct ice_aqc_add_tx_qgrp *)(list->txqs + in ice_aq_add_lan_txq()
4694 list->num_txqs); in ice_aq_add_lan_txq()
4698 return -EINVAL; in ice_aq_add_lan_txq()
4702 cmd->num_qgrps = num_qgrps; in ice_aq_add_lan_txq()
4737 return -EINVAL; in ice_aq_dis_lan_txq()
4740 return -EINVAL; in ice_aq_dis_lan_txq()
4742 cmd->num_entries = num_qgrps; in ice_aq_dis_lan_txq()
4748 cmd->cmd_type = ICE_AQC_Q_DIS_CMD_VM_RESET; in ice_aq_dis_lan_txq()
4752 cmd->cmd_type = ICE_AQC_Q_DIS_CMD_VF_RESET; in ice_aq_dis_lan_txq()
4754 vmvf_and_timeout |= (vmvf_num + hw->func_caps.vf_base_id) & in ice_aq_dis_lan_txq()
4762 cmd->vmvf_and_timeout = cpu_to_le16(vmvf_and_timeout); in ice_aq_dis_lan_txq()
4765 cmd->cmd_type |= ICE_AQC_Q_DIS_CMD_FLUSH_PIPE; in ice_aq_dis_lan_txq()
4776 u16 item_size = struct_size(item, q_id, item->num_qs); in ice_aq_dis_lan_txq()
4779 if ((item->num_qs % 2) == 0) in ice_aq_dis_lan_txq()
4788 return -EINVAL; in ice_aq_dis_lan_txq()
4795 vmvf_num, hw->adminq.sq_last_status); in ice_aq_dis_lan_txq()
4799 hw->adminq.sq_last_status); in ice_aq_dis_lan_txq()
4805 * ice_aq_cfg_lan_txq - send AQ command 0x0C32 to FW
4833 return -EINVAL; in ice_aq_cfg_lan_txq()
4835 cmd->cmd_type = mode; in ice_aq_cfg_lan_txq()
4836 cmd->num_qs = num_qs; in ice_aq_cfg_lan_txq()
4837 cmd->port_num_chng = (oldport & ICE_AQC_Q_CFG_SRC_PRT_M); in ice_aq_cfg_lan_txq()
4838 cmd->port_num_chng |= FIELD_PREP(ICE_AQC_Q_CFG_DST_PRT_M, newport); in ice_aq_cfg_lan_txq()
4839 cmd->port_num_chng |= FIELD_PREP(ICE_AQC_Q_CFG_MODE_M, in ice_aq_cfg_lan_txq()
4841 cmd->time_out = FIELD_PREP(ICE_AQC_Q_CFG_TIMEOUT_M, 5); in ice_aq_cfg_lan_txq()
4842 cmd->blocked_cgds = 0; in ice_aq_cfg_lan_txq()
4847 hw->adminq.sq_last_status); in ice_aq_cfg_lan_txq()
4876 return -EINVAL; in ice_aq_add_rdma_qsets()
4879 u16 num_qsets = le16_to_cpu(list->num_qsets); in ice_aq_add_rdma_qsets()
4882 list = (struct ice_aqc_add_rdma_qset_data *)(list->rdma_qsets + in ice_aq_add_rdma_qsets()
4887 return -EINVAL; in ice_aq_add_rdma_qsets()
4891 cmd->num_qset_grps = num_qset_grps; in ice_aq_add_rdma_qsets()
4897 * ice_aq_set_txtimeq - set Tx time queues
4919 return -EINVAL; in ice_aq_set_txtimeq()
4923 return -EINVAL; in ice_aq_set_txtimeq()
4931 cmd->q_id = cpu_to_le16(txtimeq); in ice_aq_set_txtimeq()
4932 cmd->q_amount = cpu_to_le16(q_count); in ice_aq_set_txtimeq()
4939 * ice_get_lan_q_ctx - get the LAN queue context for the given VSI and TC
4954 if (q_handle >= vsi->num_lan_q_entries[tc]) in ice_get_lan_q_ctx()
4956 if (!vsi->lan_q_ctx[tc]) in ice_get_lan_q_ctx()
4958 q_ctx = vsi->lan_q_ctx[tc]; in ice_get_lan_q_ctx()
4986 if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY) in ice_ena_vsi_txq()
4987 return -EIO; in ice_ena_vsi_txq()
4989 if (num_qgrps > 1 || buf->num_txqs > 1) in ice_ena_vsi_txq()
4990 return -ENOSPC; in ice_ena_vsi_txq()
4992 hw = pi->hw; in ice_ena_vsi_txq()
4995 return -EINVAL; in ice_ena_vsi_txq()
4997 mutex_lock(&pi->sched_lock); in ice_ena_vsi_txq()
5003 status = -EINVAL; in ice_ena_vsi_txq()
5011 status = -EINVAL; in ice_ena_vsi_txq()
5015 buf->parent_teid = parent->info.node_teid; in ice_ena_vsi_txq()
5016 node.parent_teid = parent->info.node_teid; in ice_ena_vsi_txq()
5019 * - Scheduling mode is Bytes Per Second (BPS), indicated by Bit 0. in ice_ena_vsi_txq()
5020 * - 0 priority among siblings, indicated by Bit 1-3. in ice_ena_vsi_txq()
5021 * - WFQ, indicated by Bit 4. in ice_ena_vsi_txq()
5022 * - 0 Adjustment value is used in PSM credit update flow, indicated by in ice_ena_vsi_txq()
5023 * Bit 5-6. in ice_ena_vsi_txq()
5024 * - Bit 7 is reserved. in ice_ena_vsi_txq()
5028 buf->txqs[0].info.valid_sections = in ice_ena_vsi_txq()
5031 buf->txqs[0].info.generic = 0; in ice_ena_vsi_txq()
5032 buf->txqs[0].info.cir_bw.bw_profile_idx = in ice_ena_vsi_txq()
5034 buf->txqs[0].info.cir_bw.bw_alloc = in ice_ena_vsi_txq()
5036 buf->txqs[0].info.eir_bw.bw_profile_idx = in ice_ena_vsi_txq()
5038 buf->txqs[0].info.eir_bw.bw_alloc = in ice_ena_vsi_txq()
5045 le16_to_cpu(buf->txqs[0].txq_id), in ice_ena_vsi_txq()
5046 hw->adminq.sq_last_status); in ice_ena_vsi_txq()
5050 node.node_teid = buf->txqs[0].q_teid; in ice_ena_vsi_txq()
5052 q_ctx->q_handle = q_handle; in ice_ena_vsi_txq()
5053 q_ctx->q_teid = le32_to_cpu(node.node_teid); in ice_ena_vsi_txq()
5056 status = ice_sched_add_node(pi, hw->num_tx_sched_layers - 1, &node, NULL); in ice_ena_vsi_txq()
5061 mutex_unlock(&pi->sched_lock); in ice_ena_vsi_txq()
5089 int status = -ENOENT; in ice_dis_vsi_txq()
5092 if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY) in ice_dis_vsi_txq()
5093 return -EIO; in ice_dis_vsi_txq()
5095 hw = pi->hw; in ice_dis_vsi_txq()
5105 return -EIO; in ice_dis_vsi_txq()
5108 mutex_lock(&pi->sched_lock); in ice_dis_vsi_txq()
5113 node = ice_sched_find_node_by_teid(pi->root, q_teids[i]); in ice_dis_vsi_txq()
5122 if (q_ctx->q_handle != q_handles[i]) { in ice_dis_vsi_txq()
5124 q_ctx->q_handle, q_handles[i]); in ice_dis_vsi_txq()
5127 qg_list->parent_teid = node->info.parent_teid; in ice_dis_vsi_txq()
5128 qg_list->num_qs = 1; in ice_dis_vsi_txq()
5129 qg_list->q_id[0] = cpu_to_le16(q_ids[i]); in ice_dis_vsi_txq()
5136 q_ctx->q_handle = ICE_INVAL_Q_HANDLE; in ice_dis_vsi_txq()
5137 q_ctx->q_teid = ICE_INVAL_TEID; in ice_dis_vsi_txq()
5139 mutex_unlock(&pi->sched_lock); in ice_dis_vsi_txq()
5144 * ice_cfg_vsi_qs - configure the new/existing VSI queues
5160 if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY) in ice_cfg_vsi_qs()
5161 return -EIO; in ice_cfg_vsi_qs()
5163 if (!ice_is_vsi_valid(pi->hw, vsi_handle)) in ice_cfg_vsi_qs()
5164 return -EINVAL; in ice_cfg_vsi_qs()
5166 mutex_lock(&pi->sched_lock); in ice_cfg_vsi_qs()
5179 mutex_unlock(&pi->sched_lock); in ice_cfg_vsi_qs()
5184 * ice_cfg_vsi_lan - configure VSI LAN queues
5201 * ice_cfg_vsi_rdma - configure the VSI RDMA queues
5239 if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY) in ice_ena_vsi_rdma_qset()
5240 return -EIO; in ice_ena_vsi_rdma_qset()
5241 hw = pi->hw; in ice_ena_vsi_rdma_qset()
5244 return -EINVAL; in ice_ena_vsi_rdma_qset()
5249 return -ENOMEM; in ice_ena_vsi_rdma_qset()
5250 mutex_lock(&pi->sched_lock); in ice_ena_vsi_rdma_qset()
5255 ret = -EINVAL; in ice_ena_vsi_rdma_qset()
5258 buf->parent_teid = parent->info.node_teid; in ice_ena_vsi_rdma_qset()
5259 node.parent_teid = parent->info.node_teid; in ice_ena_vsi_rdma_qset()
5261 buf->num_qsets = cpu_to_le16(num_qsets); in ice_ena_vsi_rdma_qset()
5263 buf->rdma_qsets[i].tx_qset_id = cpu_to_le16(rdma_qset[i]); in ice_ena_vsi_rdma_qset()
5264 buf->rdma_qsets[i].info.valid_sections = in ice_ena_vsi_rdma_qset()
5267 buf->rdma_qsets[i].info.generic = 0; in ice_ena_vsi_rdma_qset()
5268 buf->rdma_qsets[i].info.cir_bw.bw_profile_idx = in ice_ena_vsi_rdma_qset()
5270 buf->rdma_qsets[i].info.cir_bw.bw_alloc = in ice_ena_vsi_rdma_qset()
5272 buf->rdma_qsets[i].info.eir_bw.bw_profile_idx = in ice_ena_vsi_rdma_qset()
5274 buf->rdma_qsets[i].info.eir_bw.bw_alloc = in ice_ena_vsi_rdma_qset()
5284 node.node_teid = buf->rdma_qsets[i].qset_teid; in ice_ena_vsi_rdma_qset()
5285 ret = ice_sched_add_node(pi, hw->num_tx_sched_layers - 1, in ice_ena_vsi_rdma_qset()
5292 mutex_unlock(&pi->sched_lock); in ice_ena_vsi_rdma_qset()
5298 * ice_dis_vsi_rdma_qset - free RDMA resources
5314 if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY) in ice_dis_vsi_rdma_qset()
5315 return -EIO; in ice_dis_vsi_rdma_qset()
5317 hw = pi->hw; in ice_dis_vsi_rdma_qset()
5319 mutex_lock(&pi->sched_lock); in ice_dis_vsi_rdma_qset()
5324 node = ice_sched_find_node_by_teid(pi->root, qset_teid[i]); in ice_dis_vsi_rdma_qset()
5328 qg_list->parent_teid = node->info.parent_teid; in ice_dis_vsi_rdma_qset()
5329 qg_list->num_qs = 1; in ice_dis_vsi_rdma_qset()
5330 qg_list->q_id[0] = in ice_dis_vsi_rdma_qset()
5342 mutex_unlock(&pi->sched_lock); in ice_dis_vsi_rdma_qset()
5347 * ice_aq_get_cgu_input_pin_measure - get input pin signal measurements
5367 cmd->dpll_idx_opt = dpll_idx & ICE_AQC_GET_CGU_IN_MEAS_DPLL_IDX_M; in ice_aq_get_cgu_input_pin_measure()
5373 * ice_aq_get_cgu_abilities - get cgu abilities
5391 * ice_aq_set_input_pin_cfg - set input pin config
5411 cmd->input_idx = input_idx; in ice_aq_set_input_pin_cfg()
5412 cmd->flags1 = flags1; in ice_aq_set_input_pin_cfg()
5413 cmd->flags2 = flags2; in ice_aq_set_input_pin_cfg()
5414 cmd->freq = cpu_to_le32(freq); in ice_aq_set_input_pin_cfg()
5415 cmd->phase_delay = cpu_to_le32(phase_delay); in ice_aq_set_input_pin_cfg()
5421 * ice_aq_get_input_pin_cfg - get input pin config
5444 cmd->input_idx = input_idx; in ice_aq_get_input_pin_cfg()
5449 *status = cmd->status; in ice_aq_get_input_pin_cfg()
5451 *type = cmd->type; in ice_aq_get_input_pin_cfg()
5453 *flags1 = cmd->flags1; in ice_aq_get_input_pin_cfg()
5455 *flags2 = cmd->flags2; in ice_aq_get_input_pin_cfg()
5457 *freq = le32_to_cpu(cmd->freq); in ice_aq_get_input_pin_cfg()
5459 *phase_delay = le32_to_cpu(cmd->phase_delay); in ice_aq_get_input_pin_cfg()
5466 * ice_aq_set_output_pin_cfg - set output pin config
5486 cmd->output_idx = output_idx; in ice_aq_set_output_pin_cfg()
5487 cmd->flags = flags; in ice_aq_set_output_pin_cfg()
5488 cmd->src_sel = src_sel; in ice_aq_set_output_pin_cfg()
5489 cmd->freq = cpu_to_le32(freq); in ice_aq_set_output_pin_cfg()
5490 cmd->phase_delay = cpu_to_le32(phase_delay); in ice_aq_set_output_pin_cfg()
5496 * ice_aq_get_output_pin_cfg - get output pin config
5517 cmd->output_idx = output_idx; in ice_aq_get_output_pin_cfg()
5522 *flags = cmd->flags; in ice_aq_get_output_pin_cfg()
5524 *src_sel = cmd->src_sel; in ice_aq_get_output_pin_cfg()
5526 *freq = le32_to_cpu(cmd->freq); in ice_aq_get_output_pin_cfg()
5528 *src_freq = le32_to_cpu(cmd->src_freq); in ice_aq_get_output_pin_cfg()
5535 * ice_aq_get_cgu_dpll_status - get dpll status
5558 cmd->dpll_num = dpll_num; in ice_aq_get_cgu_dpll_status()
5562 *ref_state = cmd->ref_state; in ice_aq_get_cgu_dpll_status()
5563 *dpll_state = cmd->dpll_state; in ice_aq_get_cgu_dpll_status()
5564 *config = cmd->config; in ice_aq_get_cgu_dpll_status()
5565 *phase_offset = le32_to_cpu(cmd->phase_offset_h); in ice_aq_get_cgu_dpll_status()
5567 *phase_offset += le32_to_cpu(cmd->phase_offset_l); in ice_aq_get_cgu_dpll_status()
5569 *eec_mode = cmd->eec_mode; in ice_aq_get_cgu_dpll_status()
5576 * ice_aq_set_cgu_dpll_config - set dpll config
5595 cmd->dpll_num = dpll_num; in ice_aq_set_cgu_dpll_config()
5596 cmd->ref_state = ref_state; in ice_aq_set_cgu_dpll_config()
5597 cmd->config = config; in ice_aq_set_cgu_dpll_config()
5598 cmd->eec_mode = eec_mode; in ice_aq_set_cgu_dpll_config()
5604 * ice_aq_set_cgu_ref_prio - set input reference priority
5622 cmd->dpll_num = dpll_num; in ice_aq_set_cgu_ref_prio()
5623 cmd->ref_idx = ref_idx; in ice_aq_set_cgu_ref_prio()
5624 cmd->ref_priority = ref_priority; in ice_aq_set_cgu_ref_prio()
5630 * ice_aq_get_cgu_ref_prio - get input reference priority
5649 cmd->dpll_num = dpll_num; in ice_aq_get_cgu_ref_prio()
5650 cmd->ref_idx = ref_idx; in ice_aq_get_cgu_ref_prio()
5654 *ref_prio = cmd->ref_priority; in ice_aq_get_cgu_ref_prio()
5660 * ice_aq_get_cgu_info - get cgu info
5682 *cgu_id = le32_to_cpu(cmd->cgu_id); in ice_aq_get_cgu_info()
5683 *cgu_cfg_ver = le32_to_cpu(cmd->cgu_cfg_ver); in ice_aq_get_cgu_info()
5684 *cgu_fw_ver = le32_to_cpu(cmd->cgu_fw_ver); in ice_aq_get_cgu_info()
5691 * ice_aq_set_phy_rec_clk_out - set RCLK phy out
5710 cmd->phy_output = phy_output; in ice_aq_set_phy_rec_clk_out()
5711 cmd->port_num = ICE_AQC_SET_PHY_REC_CLK_OUT_CURR_PORT; in ice_aq_set_phy_rec_clk_out()
5712 cmd->flags = enable & ICE_AQC_SET_PHY_REC_CLK_OUT_OUT_EN; in ice_aq_set_phy_rec_clk_out()
5713 cmd->freq = cpu_to_le32(*freq); in ice_aq_set_phy_rec_clk_out()
5717 *freq = le32_to_cpu(cmd->freq); in ice_aq_set_phy_rec_clk_out()
5723 * ice_aq_get_phy_rec_clk_out - get phy recovered signal info
5743 cmd->phy_output = *phy_output; in ice_aq_get_phy_rec_clk_out()
5747 *phy_output = cmd->phy_output; in ice_aq_get_phy_rec_clk_out()
5749 *port_num = cmd->port_num; in ice_aq_get_phy_rec_clk_out()
5751 *flags = cmd->flags; in ice_aq_get_phy_rec_clk_out()
5753 *node_handle = le16_to_cpu(cmd->node_handle); in ice_aq_get_phy_rec_clk_out()
5777 cmd->sensor = ICE_INTERNAL_TEMP_SENSOR; in ice_aq_get_sensor_reading()
5778 cmd->format = ICE_INTERNAL_TEMP_SENSOR_FORMAT; in ice_aq_get_sensor_reading()
5789 * ice_replay_pre_init - replay pre initialization
5796 struct ice_switch_info *sw = hw->switch_info; in ice_replay_pre_init()
5806 list_replace_init(&sw->recp_list[i].filt_rules, in ice_replay_pre_init()
5807 &sw->recp_list[i].filt_replay_rules); in ice_replay_pre_init()
5814 * ice_replay_vsi - replay VSI configuration
5826 return -EINVAL; in ice_replay_vsi()
5828 /* Replay pre-initialization if there is any */ in ice_replay_vsi()
5846 * ice_replay_post - post replay configuration cleanup
5859 * ice_stat_update40 - read 40 bit stat from the chip and update stat values
5870 u64 new_data = rd64(hw, reg) & (BIT_ULL(40) - 1); in ice_stat_update40()
5886 *cur_stat += new_data - *prev_stat; in ice_stat_update40()
5888 /* to manage the potential roll-over */ in ice_stat_update40()
5889 *cur_stat += (new_data + BIT_ULL(40)) - *prev_stat; in ice_stat_update40()
5896 * ice_stat_update32 - read 32 bit stat from the chip and update stat values
5925 *cur_stat += new_data - *prev_stat; in ice_stat_update32()
5927 /* to manage the potential roll-over */ in ice_stat_update32()
5928 *cur_stat += (new_data + BIT_ULL(32)) - *prev_stat; in ice_stat_update32()
5935 * ice_sched_query_elem - query element information from HW
5951 buf->node_teid = cpu_to_le32(node_teid); in ice_sched_query_elem()
5963 * @bus_addr: 7-bit I2C bus address
5965 * @params: I2C parameters: bit [7] - Repeated start,
5967 * bit [4] - I2C address type,
5968 * bits [3:0] - data size to read (0-16 bytes)
5988 return -EINVAL; in ice_aq_read_i2c()
5992 cmd->i2c_bus_addr = cpu_to_le16(bus_addr); in ice_aq_read_i2c()
5993 cmd->topo_addr = topo_addr; in ice_aq_read_i2c()
5994 cmd->i2c_params = params; in ice_aq_read_i2c()
5995 cmd->i2c_addr = addr; in ice_aq_read_i2c()
6004 *data = resp->i2c_data[i]; in ice_aq_read_i2c()
6016 * @bus_addr: 7-bit I2C bus address
6018 * @params: I2C parameters: bit [4] - I2C address type, bits [3:0] - data size to write (0-7 bytes)
6025 * * 0 - Successful write to the i2c device
6026 * * -EINVAL - Data size greater than 4 bytes
6027 * * -EIO - FW error
6045 return -EINVAL; in ice_aq_write_i2c()
6047 cmd->i2c_bus_addr = cpu_to_le16(bus_addr); in ice_aq_write_i2c()
6048 cmd->topo_addr = topo_addr; in ice_aq_write_i2c()
6049 cmd->i2c_params = params; in ice_aq_write_i2c()
6050 cmd->i2c_addr = addr; in ice_aq_write_i2c()
6052 memcpy(cmd->i2c_data, data, data_size); in ice_aq_write_i2c()
6058 * ice_get_pca9575_handle - find and return the PCA9575 controller
6063 * When found - the value will be cached in the hw structure and following calls
6066 * Return: 0 on success, -ENXIO when there's no PCA9575 present.
6076 if (hw->io_expander_handle) { in ice_get_pca9575_handle()
6077 *pca9575_handle = hw->io_expander_handle; in ice_get_pca9575_handle()
6085 if (hw->device_id == ICE_DEV_ID_E810C_SFP) in ice_get_pca9575_handle()
6087 else if (hw->device_id == ICE_DEV_ID_E810C_QSFP) in ice_get_pca9575_handle()
6090 return -ENXIO; in ice_get_pca9575_handle()
6095 cmd->addr.topo_params.node_type_ctx = in ice_get_pca9575_handle()
6097 cmd->addr.topo_params.index = idx; in ice_get_pca9575_handle()
6101 return -ENXIO; in ice_get_pca9575_handle()
6104 if (cmd->node_part_num != ICE_AQC_GET_LINK_TOPO_NODE_NR_PCA9575) in ice_get_pca9575_handle()
6105 return -ENXIO; in ice_get_pca9575_handle()
6108 hw->io_expander_handle = in ice_get_pca9575_handle()
6109 le16_to_cpu(cmd->addr.handle); in ice_get_pca9575_handle()
6110 *pca9575_handle = hw->io_expander_handle; in ice_get_pca9575_handle()
6116 * ice_read_pca9575_reg - read the register from the PCA9575 controller
6165 cmd->gpio_ctrl_handle = cpu_to_le16(gpio_ctrl_handle); in ice_aq_set_gpio()
6166 cmd->gpio_num = pin_idx; in ice_aq_set_gpio()
6167 cmd->gpio_val = value ? 1 : 0; in ice_aq_set_gpio()
6193 cmd->gpio_ctrl_handle = cpu_to_le16(gpio_ctrl_handle); in ice_aq_get_gpio()
6194 cmd->gpio_num = pin_idx; in ice_aq_get_gpio()
6200 *value = !!cmd->gpio_val; in ice_aq_get_gpio()
6215 if (hw->api_maj_ver == maj) { in ice_is_fw_api_min_ver()
6216 if (hw->api_min_ver > min) in ice_is_fw_api_min_ver()
6218 if (hw->api_min_ver == min && hw->api_patch >= patch) in ice_is_fw_api_min_ver()
6220 } else if (hw->api_maj_ver > maj) { in ice_is_fw_api_min_ver()
6252 struct ice_hw *hw = pi->hw; in ice_get_link_default_override()
6263 tlv_start = tlv + pi->lport * ICE_SR_PFA_LINK_OVERRIDE_WORDS + in ice_get_link_default_override()
6272 ldo->options = FIELD_GET(ICE_LINK_OVERRIDE_OPT_M, buf); in ice_get_link_default_override()
6273 ldo->phy_config = (buf & ICE_LINK_OVERRIDE_PHY_CFG_M) >> in ice_get_link_default_override()
6283 ldo->fec_options = buf & ICE_LINK_OVERRIDE_FEC_OPT_M; in ice_get_link_default_override()
6294 ldo->phy_type_low |= ((u64)buf << (i * 16)); in ice_get_link_default_override()
6307 ldo->phy_type_high |= ((u64)buf << (i * 16)); in ice_get_link_default_override()
6314 * ice_is_phy_caps_an_enabled - check if PHY capabilities autoneg is enabled
6319 if (caps->caps & ICE_AQC_PHY_AN_MODE || in ice_is_phy_caps_an_enabled()
6320 caps->low_power_ctrl_an & (ICE_AQC_PHY_AN_EN_CLAUSE28 | in ice_is_phy_caps_an_enabled()
6329 * ice_is_fw_health_report_supported - checks if firmware supports health events
6343 * ice_aq_set_health_status_cfg - Configure FW health events
6348 * PF. The supported event types are: PF-specific, all PFs, and global.
6361 cmd->event_source = event_source; in ice_aq_set_health_status_cfg()
6367 * ice_aq_set_lldp_mib - Set the LLDP MIB
6370 * @buf: pointer to the caller-supplied buffer to store the MIB block
6386 return -EINVAL; in ice_aq_set_lldp_mib()
6393 cmd->type = mib_type; in ice_aq_set_lldp_mib()
6394 cmd->length = cpu_to_le16(buf_size); in ice_aq_set_lldp_mib()
6400 * ice_fw_supports_lldp_fltr_ctrl - check NVM version supports lldp_fltr_ctrl
6405 if (hw->mac_type != ICE_MAC_E810) in ice_fw_supports_lldp_fltr_ctrl()
6414 * ice_lldp_fltr_add_remove - add or remove a LLDP Rx switch filter
6419 * Return: 0 on success, -EOPNOTSUPP if the operation cannot be performed
6428 if (vsi->type != ICE_VSI_PF || !ice_fw_supports_lldp_fltr_ctrl(hw)) in ice_lldp_fltr_add_remove()
6429 return -EOPNOTSUPP; in ice_lldp_fltr_add_remove()
6436 cmd->cmd_flags = ICE_AQC_LLDP_FILTER_ACTION_ADD; in ice_lldp_fltr_add_remove()
6438 cmd->cmd_flags = ICE_AQC_LLDP_FILTER_ACTION_DELETE; in ice_lldp_fltr_add_remove()
6440 cmd->vsi_num = cpu_to_le16(vsi->vsi_num); in ice_lldp_fltr_add_remove()
6446 * ice_lldp_execute_pending_mib - execute LLDP pending MIB request
6477 * by [fls(speed) - 1]
6495 * ice_get_link_speed - get integer speed from table
6496 * @index: array index from fls(aq speed) - 1
6509 * ice_get_dest_cgu - get destination CGU dev for given HW
6524 if (hw->mac_type == ICE_MAC_GENERIC_3K_E825 && ice_is_dual(hw) && in ice_get_dest_cgu()
6531 * ice_read_cgu_reg - Read a CGU register
6563 * ice_write_cgu_reg - Write a CGU register