Lines Matching +full:ns +full:- +full:config
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2018 Intel Corporation. */
5 #include <linux/posix-clock.h>
16 * At 40Gb, 25Gb, or no link, the period is 1.6ns.
17 * At 10Gb or 5Gb link, the period is multiplied by 2. (3.2ns)
18 * At 1Gb link, the period is multiplied by 20. (32ns)
39 CANT_DO_PINS = -1,
52 end = -2,
66 led_end = -2,
145 * i40e_ptp_extts0_work - workqueue task function
154 struct i40e_hw *hw = &pf->hw; in i40e_ptp_extts0_work()
169 event.index = hw->pf_id; in i40e_ptp_extts0_work()
172 ptp_clock_event(pf->ptp_clock, &event); in i40e_ptp_extts0_work()
176 * i40e_is_ptp_pin_dev - check if device supports PTP pins
183 return hw->device_id == I40E_DEV_ID_25G_SFP28 && in i40e_is_ptp_pin_dev()
184 hw->subsystem_device_id == I40E_SUBDEV_ID_25G_PTP_PIN; in i40e_is_ptp_pin_dev()
188 * i40e_can_set_pins - check possibility of manipulating the pins
198 if (!i40e_is_ptp_pin_dev(&pf->hw)) { in i40e_can_set_pins()
199 dev_warn(&pf->pdev->dev, in i40e_can_set_pins()
204 if (!pf->ptp_pins) { in i40e_can_set_pins()
205 dev_warn(&pf->pdev->dev, in i40e_can_set_pins()
210 if (pf->hw.pf_id) { in i40e_can_set_pins()
211 dev_warn(&pf->pdev->dev, in i40e_can_set_pins()
220 * i40_ptp_reset_timing_events - Reset PTP timing events
229 spin_lock_bh(&pf->ptp_rx_lock); in i40_ptp_reset_timing_events()
232 rd32(&pf->hw, I40E_PRTTSYN_RXTIME_L(i)); in i40_ptp_reset_timing_events()
233 rd32(&pf->hw, I40E_PRTTSYN_RXTIME_H(i)); in i40_ptp_reset_timing_events()
234 pf->latch_events[i] = 0; in i40_ptp_reset_timing_events()
237 rd32(&pf->hw, I40E_PRTTSYN_TXTIME_L); in i40_ptp_reset_timing_events()
238 rd32(&pf->hw, I40E_PRTTSYN_TXTIME_H); in i40_ptp_reset_timing_events()
240 pf->tx_hwtstamp_timeouts = 0; in i40_ptp_reset_timing_events()
241 pf->tx_hwtstamp_skipped = 0; in i40_ptp_reset_timing_events()
242 pf->rx_hwtstamp_cleared = 0; in i40_ptp_reset_timing_events()
243 pf->latch_event_flags = 0; in i40_ptp_reset_timing_events()
244 spin_unlock_bh(&pf->ptp_rx_lock); in i40_ptp_reset_timing_events()
248 * i40e_ptp_verify - check pins
266 return -EOPNOTSUPP; in i40e_ptp_verify()
272 * i40e_ptp_read - Read the PHC time from the device
284 struct i40e_hw *hw = &pf->hw; in i40e_ptp_read()
286 u64 ns; in i40e_ptp_read() local
294 ns = (((u64)hi) << 32) | lo; in i40e_ptp_read()
296 *ts = ns_to_timespec64(ns); in i40e_ptp_read()
300 * i40e_ptp_write - Write the PHC time to the device
310 struct i40e_hw *hw = &pf->hw; in i40e_ptp_write()
311 u64 ns = timespec64_to_ns(ts); in i40e_ptp_write() local
316 wr32(hw, I40E_PRTTSYN_TIME_L, ns & 0xFFFFFFFF); in i40e_ptp_write()
317 wr32(hw, I40E_PRTTSYN_TIME_H, ns >> 32); in i40e_ptp_write()
321 * i40e_ptp_convert_to_hwtstamp - Convert device clock to system time
326 * the upper level timestamping functions. Since the timestamp is simply a 64-
334 hwtstamps->hwtstamp = ns_to_ktime(timestamp); in i40e_ptp_convert_to_hwtstamp()
338 * i40e_ptp_adjfine - Adjust the PHC frequency
350 struct i40e_hw *hw = &pf->hw; in i40e_ptp_adjfine()
354 base_adj = I40E_PTP_40GB_INCVAL * READ_ONCE(pf->ptp_adj_mult); in i40e_ptp_adjfine()
365 * i40e_ptp_set_1pps_signal_hw - configure 1PPS PTP signal for pins
372 struct i40e_hw *hw = &pf->hw; in i40e_ptp_set_1pps_signal_hw()
374 u64 ns; in i40e_ptp_set_1pps_signal_hw() local
383 ns = timespec64_to_ns(&now); in i40e_ptp_set_1pps_signal_hw()
386 wr32(hw, I40E_PRTTSYN_TGT_L(1), ns & 0xFFFFFFFF); in i40e_ptp_set_1pps_signal_hw()
388 wr32(hw, I40E_PRTTSYN_TGT_H(1), ns >> 32); in i40e_ptp_set_1pps_signal_hw()
396 * i40e_ptp_adjtime - Adjust the PHC time
405 struct i40e_hw *hw = &pf->hw; in i40e_ptp_adjtime()
407 mutex_lock(&pf->tmreg_lock); in i40e_ptp_adjtime()
409 if (delta > -999999900LL && delta < 999999900LL) { in i40e_ptp_adjtime()
416 tohw = -delta; in i40e_ptp_adjtime()
435 mutex_unlock(&pf->tmreg_lock); in i40e_ptp_adjtime()
441 * i40e_ptp_gettimex - Get the time of the PHC
446 * Read the device clock and return the correct value on ns, after converting it
454 mutex_lock(&pf->tmreg_lock); in i40e_ptp_gettimex()
456 mutex_unlock(&pf->tmreg_lock); in i40e_ptp_gettimex()
462 * i40e_ptp_settime - Set the time of the PHC
467 * to ns happens in the write function.
474 mutex_lock(&pf->tmreg_lock); in i40e_ptp_settime()
476 mutex_unlock(&pf->tmreg_lock); in i40e_ptp_settime()
482 * i40e_pps_configure - configure PPS events
503 * i40e_pin_state - determine PIN state
527 * i40e_ptp_enable_pin - enable PINs.
544 if (pf->hw.pf_id) in i40e_ptp_enable_pin()
548 pins.sdp3_2 = pf->ptp_pins->sdp3_2; in i40e_ptp_enable_pin()
549 pins.sdp3_3 = pf->ptp_pins->sdp3_3; in i40e_ptp_enable_pin()
550 pins.gpio_4 = pf->ptp_pins->gpio_4; in i40e_ptp_enable_pin()
552 /* To turn on the pin - find the corresponding one based on in i40e_ptp_enable_pin()
553 * the given index. To turn the function off - find in i40e_ptp_enable_pin()
559 pin_index = ptp_find_pin(pf->ptp_clock, func, chan); in i40e_ptp_enable_pin()
561 return -EBUSY; in i40e_ptp_enable_pin()
574 return -EINVAL; in i40e_ptp_enable_pin()
584 return i40e_ptp_set_pins(pf, &pins) ? -EINVAL : 0; in i40e_ptp_enable_pin()
588 * i40e_ptp_feature_enable - Enable external clock pins
605 switch (rq->type) { in i40e_ptp_feature_enable()
608 chan = rq->extts.index; in i40e_ptp_feature_enable()
612 chan = rq->perout.index; in i40e_ptp_feature_enable()
617 return -EOPNOTSUPP; in i40e_ptp_feature_enable()
624 * i40e_ptp_get_rx_events - Read I40E_PRTTSYN_STAT_1 and latch events
637 struct i40e_hw *hw = &pf->hw; in i40e_ptp_get_rx_events()
642 new_latch_events = prttsyn_stat & ~pf->latch_event_flags; in i40e_ptp_get_rx_events()
655 pf->latch_events[i] = jiffies; in i40e_ptp_get_rx_events()
659 pf->latch_event_flags = prttsyn_stat; in i40e_ptp_get_rx_events()
665 * i40e_ptp_rx_hang - Detect error case when Rx timestamp registers are hung
675 struct i40e_hw *hw = &pf->hw; in i40e_ptp_rx_hang()
683 if (!test_bit(I40E_FLAG_PTP_ENA, pf->flags) || !pf->ptp_rx) in i40e_ptp_rx_hang()
686 spin_lock_bh(&pf->ptp_rx_lock); in i40e_ptp_rx_hang()
698 if ((pf->latch_event_flags & BIT(i)) && in i40e_ptp_rx_hang()
699 time_is_before_jiffies(pf->latch_events[i] + HZ)) { in i40e_ptp_rx_hang()
701 pf->latch_event_flags &= ~BIT(i); in i40e_ptp_rx_hang()
706 spin_unlock_bh(&pf->ptp_rx_lock); in i40e_ptp_rx_hang()
715 dev_dbg(&pf->pdev->dev, in i40e_ptp_rx_hang()
720 pf->rx_hwtstamp_cleared += cleared; in i40e_ptp_rx_hang()
724 * i40e_ptp_tx_hang - Detect error case when Tx timestamp register is hung
736 if (!test_bit(I40E_FLAG_PTP_ENA, pf->flags) || !pf->ptp_tx) in i40e_ptp_tx_hang()
740 if (!test_bit(__I40E_PTP_TX_IN_PROGRESS, pf->state)) in i40e_ptp_tx_hang()
747 if (time_is_before_jiffies(pf->ptp_tx_start + HZ)) { in i40e_ptp_tx_hang()
748 skb = pf->ptp_tx_skb; in i40e_ptp_tx_hang()
749 pf->ptp_tx_skb = NULL; in i40e_ptp_tx_hang()
750 clear_bit_unlock(__I40E_PTP_TX_IN_PROGRESS, pf->state); in i40e_ptp_tx_hang()
754 pf->tx_hwtstamp_timeouts++; in i40e_ptp_tx_hang()
759 * i40e_ptp_tx_hwtstamp - Utility function which returns the Tx timestamp
769 struct sk_buff *skb = pf->ptp_tx_skb; in i40e_ptp_tx_hwtstamp()
770 struct i40e_hw *hw = &pf->hw; in i40e_ptp_tx_hwtstamp()
772 u64 ns; in i40e_ptp_tx_hwtstamp() local
774 if (!test_bit(I40E_FLAG_PTP_ENA, pf->flags) || !pf->ptp_tx) in i40e_ptp_tx_hwtstamp()
778 if (!pf->ptp_tx_skb) in i40e_ptp_tx_hwtstamp()
784 ns = (((u64)hi) << 32) | lo; in i40e_ptp_tx_hwtstamp()
785 i40e_ptp_convert_to_hwtstamp(&shhwtstamps, ns); in i40e_ptp_tx_hwtstamp()
792 pf->ptp_tx_skb = NULL; in i40e_ptp_tx_hwtstamp()
793 clear_bit_unlock(__I40E_PTP_TX_IN_PROGRESS, pf->state); in i40e_ptp_tx_hwtstamp()
801 * i40e_ptp_rx_hwtstamp - Utility function which checks for an Rx timestamp
809 * one exists. The RXTIME registers are in ns, so we must convert the result
816 u64 ns; in i40e_ptp_rx_hwtstamp() local
821 if (!test_bit(I40E_FLAG_PTP_ENA, pf->flags) || !pf->ptp_rx) in i40e_ptp_rx_hwtstamp()
824 hw = &pf->hw; in i40e_ptp_rx_hwtstamp()
826 spin_lock_bh(&pf->ptp_rx_lock); in i40e_ptp_rx_hwtstamp()
833 spin_unlock_bh(&pf->ptp_rx_lock); in i40e_ptp_rx_hwtstamp()
838 pf->latch_event_flags &= ~BIT(index); in i40e_ptp_rx_hwtstamp()
843 spin_unlock_bh(&pf->ptp_rx_lock); in i40e_ptp_rx_hwtstamp()
845 ns = (((u64)hi) << 32) | lo; in i40e_ptp_rx_hwtstamp()
847 i40e_ptp_convert_to_hwtstamp(skb_hwtstamps(skb), ns); in i40e_ptp_rx_hwtstamp()
851 * i40e_ptp_set_increment - Utility function to update clock increment rate
861 struct i40e_hw *hw = &pf->hw; in i40e_ptp_set_increment()
865 hw_link_info = &hw->phy.link_info; in i40e_ptp_set_increment()
867 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL); in i40e_ptp_set_increment()
869 switch (hw_link_info->link_speed) { in i40e_ptp_set_increment()
884 dev_warn(&pf->pdev->dev, in i40e_ptp_set_increment()
910 WRITE_ONCE(pf->ptp_adj_mult, mult); in i40e_ptp_set_increment()
915 * i40e_ptp_hwtstamp_get - interface to read the HW timestamping
917 * @config: Timestamping configuration structure
924 struct kernel_hwtstamp_config *config) in i40e_ptp_hwtstamp_get() argument
927 struct i40e_pf *pf = np->vsi->back; in i40e_ptp_hwtstamp_get()
929 if (!test_bit(I40E_FLAG_PTP_ENA, pf->flags)) in i40e_ptp_hwtstamp_get()
930 return -EOPNOTSUPP; in i40e_ptp_hwtstamp_get()
932 *config = pf->tstamp_config; in i40e_ptp_hwtstamp_get()
938 * i40e_ptp_free_pins - free memory used by PTP pins
945 if (i40e_is_ptp_pin_dev(&pf->hw)) { in i40e_ptp_free_pins()
946 kfree(pf->ptp_pins); in i40e_ptp_free_pins()
947 kfree(pf->ptp_caps.pin_config); in i40e_ptp_free_pins()
948 pf->ptp_pins = NULL; in i40e_ptp_free_pins()
953 * i40e_ptp_set_pin_hw - Set HW GPIO pin
990 * i40e_ptp_set_led_hw - Set HW GPIO led
1017 * i40e_ptp_init_leds_hw - init LEDs
1035 * i40e_ptp_set_pins_hw - Set HW GPIO pins
1042 const struct i40e_ptp_pins_settings *pins = pf->ptp_pins; in i40e_ptp_set_pins_hw()
1043 struct i40e_hw *hw = &pf->hw; in i40e_ptp_set_pins_hw()
1050 i40e_ptp_set_pin_hw(hw, I40E_SDP3_2, pins->sdp3_2); in i40e_ptp_set_pins_hw()
1051 i40e_ptp_set_pin_hw(hw, I40E_SDP3_3, pins->sdp3_3); in i40e_ptp_set_pins_hw()
1052 i40e_ptp_set_pin_hw(hw, I40E_GPIO_4, pins->gpio_4); in i40e_ptp_set_pins_hw()
1054 i40e_ptp_set_led_hw(hw, I40E_LED2_0, pins->led2_0); in i40e_ptp_set_pins_hw()
1055 i40e_ptp_set_led_hw(hw, I40E_LED2_1, pins->led2_1); in i40e_ptp_set_pins_hw()
1056 i40e_ptp_set_led_hw(hw, I40E_LED3_0, pins->led3_0); in i40e_ptp_set_pins_hw()
1057 i40e_ptp_set_led_hw(hw, I40E_LED3_1, pins->led3_1); in i40e_ptp_set_pins_hw()
1059 dev_info(&pf->pdev->dev, in i40e_ptp_set_pins_hw()
1061 i40e_ptp_gpio_pin_state2str[pins->sdp3_2], in i40e_ptp_set_pins_hw()
1062 i40e_ptp_gpio_pin_state2str[pins->sdp3_3], in i40e_ptp_set_pins_hw()
1063 i40e_ptp_gpio_pin_state2str[pins->gpio_4]); in i40e_ptp_set_pins_hw()
1067 * i40e_ptp_set_pins - set PTP pins in HW
1081 return -EOPNOTSUPP; in i40e_ptp_set_pins()
1085 if (pins->sdp3_2 == invalid) in i40e_ptp_set_pins()
1086 pins->sdp3_2 = pf->ptp_pins->sdp3_2; in i40e_ptp_set_pins()
1087 if (pins->sdp3_3 == invalid) in i40e_ptp_set_pins()
1088 pins->sdp3_3 = pf->ptp_pins->sdp3_3; in i40e_ptp_set_pins()
1089 if (pins->gpio_4 == invalid) in i40e_ptp_set_pins()
1090 pins->gpio_4 = pf->ptp_pins->gpio_4; in i40e_ptp_set_pins()
1092 if (pins->sdp3_2 == i40e_ptp_pin_led_allowed_states[i].sdp3_2 && in i40e_ptp_set_pins()
1093 pins->sdp3_3 == i40e_ptp_pin_led_allowed_states[i].sdp3_3 && in i40e_ptp_set_pins()
1094 pins->gpio_4 == i40e_ptp_pin_led_allowed_states[i].gpio_4) { in i40e_ptp_set_pins()
1095 pins->led2_0 = in i40e_ptp_set_pins()
1097 pins->led2_1 = in i40e_ptp_set_pins()
1099 pins->led3_0 = in i40e_ptp_set_pins()
1101 pins->led3_1 = in i40e_ptp_set_pins()
1108 dev_warn(&pf->pdev->dev, in i40e_ptp_set_pins()
1110 i40e_ptp_gpio_pin_state2str[pins->sdp3_2], in i40e_ptp_set_pins()
1111 i40e_ptp_gpio_pin_state2str[pins->sdp3_3], in i40e_ptp_set_pins()
1112 i40e_ptp_gpio_pin_state2str[pins->gpio_4]); in i40e_ptp_set_pins()
1114 return -EPERM; in i40e_ptp_set_pins()
1116 memcpy(pf->ptp_pins, pins, sizeof(*pins)); in i40e_ptp_set_pins()
1124 * i40e_ptp_alloc_pins - allocate PTP pins structure
1131 if (!i40e_is_ptp_pin_dev(&pf->hw)) in i40e_ptp_alloc_pins()
1134 pf->ptp_pins = in i40e_ptp_alloc_pins()
1137 if (!pf->ptp_pins) { in i40e_ptp_alloc_pins()
1138 dev_warn(&pf->pdev->dev, "Cannot allocate memory for PTP pins structure.\n"); in i40e_ptp_alloc_pins()
1139 return -ENOMEM; in i40e_ptp_alloc_pins()
1142 pf->ptp_pins->sdp3_2 = off; in i40e_ptp_alloc_pins()
1143 pf->ptp_pins->sdp3_3 = off; in i40e_ptp_alloc_pins()
1144 pf->ptp_pins->gpio_4 = off; in i40e_ptp_alloc_pins()
1145 pf->ptp_pins->led2_0 = high; in i40e_ptp_alloc_pins()
1146 pf->ptp_pins->led2_1 = high; in i40e_ptp_alloc_pins()
1147 pf->ptp_pins->led3_0 = high; in i40e_ptp_alloc_pins()
1148 pf->ptp_pins->led3_1 = high; in i40e_ptp_alloc_pins()
1151 if (pf->hw.pf_id) in i40e_ptp_alloc_pins()
1154 i40e_ptp_init_leds_hw(&pf->hw); in i40e_ptp_alloc_pins()
1161 * i40e_ptp_set_timestamp_mode - setup hardware for requested timestamp mode
1163 * @config: hwtstamp settings requested or saved
1169 * Note: modifies config in place, and may update the requested mode to be
1173 struct kernel_hwtstamp_config *config) in i40e_ptp_set_timestamp_mode() argument
1175 struct i40e_hw *hw = &pf->hw; in i40e_ptp_set_timestamp_mode()
1191 INIT_WORK(&pf->ptp_extts0_work, i40e_ptp_extts0_work); in i40e_ptp_set_timestamp_mode()
1193 switch (config->tx_type) { in i40e_ptp_set_timestamp_mode()
1195 pf->ptp_tx = false; in i40e_ptp_set_timestamp_mode()
1198 pf->ptp_tx = true; in i40e_ptp_set_timestamp_mode()
1201 return -ERANGE; in i40e_ptp_set_timestamp_mode()
1204 switch (config->rx_filter) { in i40e_ptp_set_timestamp_mode()
1206 pf->ptp_rx = false; in i40e_ptp_set_timestamp_mode()
1217 if (!test_bit(I40E_HW_CAP_PTP_L4, pf->hw.caps)) in i40e_ptp_set_timestamp_mode()
1218 return -ERANGE; in i40e_ptp_set_timestamp_mode()
1219 pf->ptp_rx = true; in i40e_ptp_set_timestamp_mode()
1223 config->rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT; in i40e_ptp_set_timestamp_mode()
1231 if (!test_bit(I40E_HW_CAP_PTP_L4, pf->hw.caps)) in i40e_ptp_set_timestamp_mode()
1232 return -ERANGE; in i40e_ptp_set_timestamp_mode()
1237 pf->ptp_rx = true; in i40e_ptp_set_timestamp_mode()
1240 if (test_bit(I40E_HW_CAP_PTP_L4, pf->hw.caps)) { in i40e_ptp_set_timestamp_mode()
1242 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT; in i40e_ptp_set_timestamp_mode()
1244 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT; in i40e_ptp_set_timestamp_mode()
1250 return -ERANGE; in i40e_ptp_set_timestamp_mode()
1253 /* Clear out all 1588-related registers to clear and unlatch them. */ in i40e_ptp_set_timestamp_mode()
1254 spin_lock_bh(&pf->ptp_rx_lock); in i40e_ptp_set_timestamp_mode()
1261 pf->latch_event_flags = 0; in i40e_ptp_set_timestamp_mode()
1262 spin_unlock_bh(&pf->ptp_rx_lock); in i40e_ptp_set_timestamp_mode()
1266 if (pf->ptp_tx) in i40e_ptp_set_timestamp_mode()
1273 if (pf->ptp_tx) in i40e_ptp_set_timestamp_mode()
1283 * ignore Rx timestamps via the pf->ptp_rx flag. in i40e_ptp_set_timestamp_mode()
1296 * i40e_ptp_hwtstamp_set - interface to control the HW timestamping
1298 * @config: Timestamping configuration structure
1311 struct kernel_hwtstamp_config *config, in i40e_ptp_hwtstamp_set() argument
1315 struct i40e_pf *pf = np->vsi->back; in i40e_ptp_hwtstamp_set()
1318 if (!test_bit(I40E_FLAG_PTP_ENA, pf->flags)) in i40e_ptp_hwtstamp_set()
1319 return -EOPNOTSUPP; in i40e_ptp_hwtstamp_set()
1321 err = i40e_ptp_set_timestamp_mode(pf, config); in i40e_ptp_hwtstamp_set()
1326 pf->tstamp_config = *config; in i40e_ptp_hwtstamp_set()
1332 * i40e_init_pin_config - initialize pins.
1342 pf->ptp_caps.n_pins = 3; in i40e_init_pin_config()
1343 pf->ptp_caps.n_ext_ts = 2; in i40e_init_pin_config()
1344 pf->ptp_caps.pps = 1; in i40e_init_pin_config()
1345 pf->ptp_caps.n_per_out = 2; in i40e_init_pin_config()
1347 pf->ptp_caps.pin_config = kcalloc(pf->ptp_caps.n_pins, in i40e_init_pin_config()
1348 sizeof(*pf->ptp_caps.pin_config), in i40e_init_pin_config()
1350 if (!pf->ptp_caps.pin_config) in i40e_init_pin_config()
1351 return -ENOMEM; in i40e_init_pin_config()
1353 for (i = 0; i < pf->ptp_caps.n_pins; i++) { in i40e_init_pin_config()
1354 snprintf(pf->ptp_caps.pin_config[i].name, in i40e_init_pin_config()
1355 sizeof(pf->ptp_caps.pin_config[i].name), in i40e_init_pin_config()
1357 pf->ptp_caps.pin_config[i].index = sdp_desc[i].index; in i40e_init_pin_config()
1358 pf->ptp_caps.pin_config[i].func = PTP_PF_NONE; in i40e_init_pin_config()
1359 pf->ptp_caps.pin_config[i].chan = sdp_desc[i].chan; in i40e_init_pin_config()
1362 pf->ptp_caps.verify = i40e_ptp_verify; in i40e_init_pin_config()
1363 pf->ptp_caps.enable = i40e_ptp_feature_enable; in i40e_init_pin_config()
1365 pf->ptp_caps.pps = 1; in i40e_init_pin_config()
1371 * i40e_ptp_create_clock - Create PTP clock device for userspace
1383 if (!IS_ERR_OR_NULL(pf->ptp_clock)) in i40e_ptp_create_clock()
1386 strscpy(pf->ptp_caps.name, i40e_driver_name, in i40e_ptp_create_clock()
1387 sizeof(pf->ptp_caps.name) - 1); in i40e_ptp_create_clock()
1388 pf->ptp_caps.owner = THIS_MODULE; in i40e_ptp_create_clock()
1389 pf->ptp_caps.max_adj = 999999999; in i40e_ptp_create_clock()
1390 pf->ptp_caps.adjfine = i40e_ptp_adjfine; in i40e_ptp_create_clock()
1391 pf->ptp_caps.adjtime = i40e_ptp_adjtime; in i40e_ptp_create_clock()
1392 pf->ptp_caps.gettimex64 = i40e_ptp_gettimex; in i40e_ptp_create_clock()
1393 pf->ptp_caps.settime64 = i40e_ptp_settime; in i40e_ptp_create_clock()
1394 if (i40e_is_ptp_pin_dev(&pf->hw)) { in i40e_ptp_create_clock()
1402 pf->ptp_clock = ptp_clock_register(&pf->ptp_caps, &pf->pdev->dev); in i40e_ptp_create_clock()
1403 if (IS_ERR(pf->ptp_clock)) in i40e_ptp_create_clock()
1404 return PTR_ERR(pf->ptp_clock); in i40e_ptp_create_clock()
1410 pf->tstamp_config.rx_filter = HWTSTAMP_FILTER_NONE; in i40e_ptp_create_clock()
1411 pf->tstamp_config.tx_type = HWTSTAMP_TX_OFF; in i40e_ptp_create_clock()
1414 ktime_get_real_ts64(&pf->ptp_prev_hw_time); in i40e_ptp_create_clock()
1415 pf->ptp_reset_start = ktime_get(); in i40e_ptp_create_clock()
1421 * i40e_ptp_save_hw_time - Save the current PTP time as ptp_prev_hw_time
1424 * Read the current PTP time and save it into pf->ptp_prev_hw_time. This should
1432 if (!test_bit(I40E_FLAG_PTP_ENA, pf->flags)) in i40e_ptp_save_hw_time()
1435 i40e_ptp_gettimex(&pf->ptp_caps, &pf->ptp_prev_hw_time, NULL); in i40e_ptp_save_hw_time()
1437 pf->ptp_reset_start = ktime_get(); in i40e_ptp_save_hw_time()
1441 * i40e_ptp_restore_hw_time - Restore the ptp_prev_hw_time + delta to PTP regs
1445 * hardware time as pf->ptp_prev_hw_time. To be as accurate as possible,
1454 ktime_t delta = ktime_sub(ktime_get(), pf->ptp_reset_start); in i40e_ptp_restore_hw_time()
1457 timespec64_add_ns(&pf->ptp_prev_hw_time, ktime_to_ns(delta)); in i40e_ptp_restore_hw_time()
1460 i40e_ptp_settime(&pf->ptp_caps, &pf->ptp_prev_hw_time); in i40e_ptp_restore_hw_time()
1464 * i40e_ptp_init - Initialize the 1588 support after device probe or reset
1472 * pf->ptp_prev_hw_time to the current system time. During resets, it is
1479 struct net_device *netdev = vsi->netdev; in i40e_ptp_init()
1480 struct i40e_hw *hw = &pf->hw; in i40e_ptp_init()
1489 if (hw->pf_id != pf_id) { in i40e_ptp_init()
1490 clear_bit(I40E_FLAG_PTP_ENA, pf->flags); in i40e_ptp_init()
1491 dev_info(&pf->pdev->dev, "%s: PTP not supported on %s\n", in i40e_ptp_init()
1493 netdev->name); in i40e_ptp_init()
1497 mutex_init(&pf->tmreg_lock); in i40e_ptp_init()
1498 spin_lock_init(&pf->ptp_rx_lock); in i40e_ptp_init()
1503 pf->ptp_clock = NULL; in i40e_ptp_init()
1504 dev_err(&pf->pdev->dev, "%s: ptp_clock_register failed\n", in i40e_ptp_init()
1506 } else if (pf->ptp_clock) { in i40e_ptp_init()
1509 if (pf->hw.debug_mask & I40E_DEBUG_LAN) in i40e_ptp_init()
1510 dev_info(&pf->pdev->dev, "PHC enabled\n"); in i40e_ptp_init()
1511 set_bit(I40E_FLAG_PTP_ENA, pf->flags); in i40e_ptp_init()
1525 i40e_ptp_set_timestamp_mode(pf, &pf->tstamp_config); in i40e_ptp_init()
1535 * i40e_ptp_stop - Disable the driver/hardware support and unregister the PHC
1544 struct i40e_hw *hw = &pf->hw; in i40e_ptp_stop()
1547 clear_bit(I40E_FLAG_PTP_ENA, pf->flags); in i40e_ptp_stop()
1548 pf->ptp_tx = false; in i40e_ptp_stop()
1549 pf->ptp_rx = false; in i40e_ptp_stop()
1551 if (pf->ptp_tx_skb) { in i40e_ptp_stop()
1552 struct sk_buff *skb = pf->ptp_tx_skb; in i40e_ptp_stop()
1554 pf->ptp_tx_skb = NULL; in i40e_ptp_stop()
1555 clear_bit_unlock(__I40E_PTP_TX_IN_PROGRESS, pf->state); in i40e_ptp_stop()
1559 if (pf->ptp_clock) { in i40e_ptp_stop()
1560 ptp_clock_unregister(pf->ptp_clock); in i40e_ptp_stop()
1561 pf->ptp_clock = NULL; in i40e_ptp_stop()
1562 dev_info(&pf->pdev->dev, "%s: removed PHC on %s\n", __func__, in i40e_ptp_stop()
1563 main_vsi->netdev->name); in i40e_ptp_stop()
1566 if (i40e_is_ptp_pin_dev(&pf->hw)) { in i40e_ptp_stop()