Lines Matching full:pf

141 static int i40e_ptp_set_pins(struct i40e_pf *pf,
152 struct i40e_pf *pf = container_of(work, struct i40e_pf, in i40e_ptp_extts0_work() local
154 struct i40e_hw *hw = &pf->hw; in i40e_ptp_extts0_work()
172 ptp_clock_event(pf->ptp_clock, &event); in i40e_ptp_extts0_work()
189 * @pf: board private structure
192 * Return CAN_SET_PINS if pins can be set on a specific PF or
196 static enum i40e_can_set_pins i40e_can_set_pins(struct i40e_pf *pf) in i40e_can_set_pins() argument
198 if (!i40e_is_ptp_pin_dev(&pf->hw)) { in i40e_can_set_pins()
199 dev_warn(&pf->pdev->dev, in i40e_can_set_pins()
204 if (!pf->ptp_pins) { in i40e_can_set_pins()
205 dev_warn(&pf->pdev->dev, in i40e_can_set_pins()
210 if (pf->hw.pf_id) { in i40e_can_set_pins()
211 dev_warn(&pf->pdev->dev, in i40e_can_set_pins()
221 * @pf: Board private structure
223 * This function resets timing events for pf.
225 static void i40_ptp_reset_timing_events(struct i40e_pf *pf) in i40_ptp_reset_timing_events() argument
229 spin_lock_bh(&pf->ptp_rx_lock); in i40_ptp_reset_timing_events()
232 rd32(&pf->hw, I40E_PRTTSYN_RXTIME_L(i)); in i40_ptp_reset_timing_events()
233 rd32(&pf->hw, I40E_PRTTSYN_RXTIME_H(i)); in i40_ptp_reset_timing_events()
234 pf->latch_events[i] = 0; in i40_ptp_reset_timing_events()
237 rd32(&pf->hw, I40E_PRTTSYN_TXTIME_L); in i40_ptp_reset_timing_events()
238 rd32(&pf->hw, I40E_PRTTSYN_TXTIME_H); in i40_ptp_reset_timing_events()
240 pf->tx_hwtstamp_timeouts = 0; in i40_ptp_reset_timing_events()
241 pf->tx_hwtstamp_skipped = 0; in i40_ptp_reset_timing_events()
242 pf->rx_hwtstamp_cleared = 0; in i40_ptp_reset_timing_events()
243 pf->latch_event_flags = 0; in i40_ptp_reset_timing_events()
244 spin_unlock_bh(&pf->ptp_rx_lock); in i40_ptp_reset_timing_events()
273 * @pf: Board private structure
281 static void i40e_ptp_read(struct i40e_pf *pf, struct timespec64 *ts, in i40e_ptp_read() argument
284 struct i40e_hw *hw = &pf->hw; in i40e_ptp_read()
301 * @pf: Board private structure
308 static void i40e_ptp_write(struct i40e_pf *pf, const struct timespec64 *ts) in i40e_ptp_write() argument
310 struct i40e_hw *hw = &pf->hw; in i40e_ptp_write()
349 struct i40e_pf *pf = container_of(ptp, struct i40e_pf, ptp_caps); in i40e_ptp_adjfine() local
350 struct i40e_hw *hw = &pf->hw; in i40e_ptp_adjfine()
354 base_adj = I40E_PTP_40GB_INCVAL * READ_ONCE(pf->ptp_adj_mult); in i40e_ptp_adjfine()
366 * @pf: the PF private data structure
370 static void i40e_ptp_set_1pps_signal_hw(struct i40e_pf *pf) in i40e_ptp_set_1pps_signal_hw() argument
372 struct i40e_hw *hw = &pf->hw; in i40e_ptp_set_1pps_signal_hw()
380 i40e_ptp_read(pf, &now, NULL); in i40e_ptp_set_1pps_signal_hw()
404 struct i40e_pf *pf = container_of(ptp, struct i40e_pf, ptp_caps); in i40e_ptp_adjtime() local
405 struct i40e_hw *hw = &pf->hw; in i40e_ptp_adjtime()
407 mutex_lock(&pf->tmreg_lock); in i40e_ptp_adjtime()
429 i40e_ptp_read(pf, &now, NULL); in i40e_ptp_adjtime()
431 i40e_ptp_write(pf, (const struct timespec64 *)&now); in i40e_ptp_adjtime()
432 i40e_ptp_set_1pps_signal_hw(pf); in i40e_ptp_adjtime()
435 mutex_unlock(&pf->tmreg_lock); in i40e_ptp_adjtime()
452 struct i40e_pf *pf = container_of(ptp, struct i40e_pf, ptp_caps); in i40e_ptp_gettimex() local
454 mutex_lock(&pf->tmreg_lock); in i40e_ptp_gettimex()
455 i40e_ptp_read(pf, ts, sts); in i40e_ptp_gettimex()
456 mutex_unlock(&pf->tmreg_lock); in i40e_ptp_gettimex()
472 struct i40e_pf *pf = container_of(ptp, struct i40e_pf, ptp_caps); in i40e_ptp_settime() local
474 mutex_lock(&pf->tmreg_lock); in i40e_ptp_settime()
475 i40e_ptp_write(pf, ts); in i40e_ptp_settime()
476 mutex_unlock(&pf->tmreg_lock); in i40e_ptp_settime()
494 struct i40e_pf *pf = container_of(ptp, struct i40e_pf, ptp_caps); in i40e_pps_configure() local
497 i40e_ptp_set_1pps_signal_hw(pf); in i40e_pps_configure()
528 * @pf: private board structure
536 static int i40e_ptp_enable_pin(struct i40e_pf *pf, unsigned int chan, in i40e_ptp_enable_pin() argument
544 if (pf->hw.pf_id) in i40e_ptp_enable_pin()
548 pins.sdp3_2 = pf->ptp_pins->sdp3_2; in i40e_ptp_enable_pin()
549 pins.sdp3_3 = pf->ptp_pins->sdp3_3; in i40e_ptp_enable_pin()
550 pins.gpio_4 = pf->ptp_pins->gpio_4; in i40e_ptp_enable_pin()
559 pin_index = ptp_find_pin(pf->ptp_clock, func, chan); in i40e_ptp_enable_pin()
584 return i40e_ptp_set_pins(pf, &pins) ? -EINVAL : 0; in i40e_ptp_enable_pin()
599 struct i40e_pf *pf = container_of(ptp, struct i40e_pf, ptp_caps); in i40e_ptp_feature_enable() local
620 return i40e_ptp_enable_pin(pf, chan, func, on); in i40e_ptp_feature_enable()
625 * @pf: the PF data structure
635 static u32 i40e_ptp_get_rx_events(struct i40e_pf *pf) in i40e_ptp_get_rx_events() argument
637 struct i40e_hw *hw = &pf->hw; in i40e_ptp_get_rx_events()
642 new_latch_events = prttsyn_stat & ~pf->latch_event_flags; in i40e_ptp_get_rx_events()
655 pf->latch_events[i] = jiffies; in i40e_ptp_get_rx_events()
659 pf->latch_event_flags = prttsyn_stat; in i40e_ptp_get_rx_events()
666 * @pf: The PF private data structure
673 void i40e_ptp_rx_hang(struct i40e_pf *pf) in i40e_ptp_rx_hang() argument
675 struct i40e_hw *hw = &pf->hw; in i40e_ptp_rx_hang()
683 if (!test_bit(I40E_FLAG_PTP_ENA, pf->flags) || !pf->ptp_rx) in i40e_ptp_rx_hang()
686 spin_lock_bh(&pf->ptp_rx_lock); in i40e_ptp_rx_hang()
689 i40e_ptp_get_rx_events(pf); in i40e_ptp_rx_hang()
698 if ((pf->latch_event_flags & BIT(i)) && in i40e_ptp_rx_hang()
699 time_is_before_jiffies(pf->latch_events[i] + HZ)) { in i40e_ptp_rx_hang()
701 pf->latch_event_flags &= ~BIT(i); in i40e_ptp_rx_hang()
706 spin_unlock_bh(&pf->ptp_rx_lock); in i40e_ptp_rx_hang()
715 dev_dbg(&pf->pdev->dev, in i40e_ptp_rx_hang()
720 pf->rx_hwtstamp_cleared += cleared; in i40e_ptp_rx_hang()
725 * @pf: The PF private data structure
732 void i40e_ptp_tx_hang(struct i40e_pf *pf) in i40e_ptp_tx_hang() argument
736 if (!test_bit(I40E_FLAG_PTP_ENA, pf->flags) || !pf->ptp_tx) in i40e_ptp_tx_hang()
740 if (!test_bit(__I40E_PTP_TX_IN_PROGRESS, pf->state)) in i40e_ptp_tx_hang()
747 if (time_is_before_jiffies(pf->ptp_tx_start + HZ)) { in i40e_ptp_tx_hang()
748 skb = pf->ptp_tx_skb; in i40e_ptp_tx_hang()
749 pf->ptp_tx_skb = NULL; in i40e_ptp_tx_hang()
750 clear_bit_unlock(__I40E_PTP_TX_IN_PROGRESS, pf->state); in i40e_ptp_tx_hang()
754 pf->tx_hwtstamp_timeouts++; in i40e_ptp_tx_hang()
760 * @pf: Board private structure
766 void i40e_ptp_tx_hwtstamp(struct i40e_pf *pf) in i40e_ptp_tx_hwtstamp() argument
769 struct sk_buff *skb = pf->ptp_tx_skb; in i40e_ptp_tx_hwtstamp()
770 struct i40e_hw *hw = &pf->hw; in i40e_ptp_tx_hwtstamp()
774 if (!test_bit(I40E_FLAG_PTP_ENA, pf->flags) || !pf->ptp_tx) in i40e_ptp_tx_hwtstamp()
778 if (!pf->ptp_tx_skb) in i40e_ptp_tx_hwtstamp()
792 pf->ptp_tx_skb = NULL; in i40e_ptp_tx_hwtstamp()
793 clear_bit_unlock(__I40E_PTP_TX_IN_PROGRESS, pf->state); in i40e_ptp_tx_hwtstamp()
802 * @pf: Board private structure
812 void i40e_ptp_rx_hwtstamp(struct i40e_pf *pf, struct sk_buff *skb, u8 index) in i40e_ptp_rx_hwtstamp() argument
821 if (!test_bit(I40E_FLAG_PTP_ENA, pf->flags) || !pf->ptp_rx) in i40e_ptp_rx_hwtstamp()
824 hw = &pf->hw; in i40e_ptp_rx_hwtstamp()
826 spin_lock_bh(&pf->ptp_rx_lock); in i40e_ptp_rx_hwtstamp()
829 prttsyn_stat = i40e_ptp_get_rx_events(pf); in i40e_ptp_rx_hwtstamp()
833 spin_unlock_bh(&pf->ptp_rx_lock); in i40e_ptp_rx_hwtstamp()
838 pf->latch_event_flags &= ~BIT(index); in i40e_ptp_rx_hwtstamp()
843 spin_unlock_bh(&pf->ptp_rx_lock); in i40e_ptp_rx_hwtstamp()
852 * @pf: Board private structure
858 void i40e_ptp_set_increment(struct i40e_pf *pf) in i40e_ptp_set_increment() argument
861 struct i40e_hw *hw = &pf->hw; in i40e_ptp_set_increment()
867 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL); in i40e_ptp_set_increment()
884 dev_warn(&pf->pdev->dev, in i40e_ptp_set_increment()
910 WRITE_ONCE(pf->ptp_adj_mult, mult); in i40e_ptp_set_increment()
927 struct i40e_pf *pf = np->vsi->back; in i40e_ptp_hwtstamp_get() local
929 if (!test_bit(I40E_FLAG_PTP_ENA, pf->flags)) in i40e_ptp_hwtstamp_get()
932 *config = pf->tstamp_config; in i40e_ptp_hwtstamp_get()
939 * @pf: Board private structure
943 static void i40e_ptp_free_pins(struct i40e_pf *pf) in i40e_ptp_free_pins() argument
945 if (i40e_is_ptp_pin_dev(&pf->hw)) { in i40e_ptp_free_pins()
946 kfree(pf->ptp_pins); in i40e_ptp_free_pins()
947 kfree(pf->ptp_caps.pin_config); in i40e_ptp_free_pins()
948 pf->ptp_pins = NULL; in i40e_ptp_free_pins()
1036 * @pf: Board private structure
1040 static void i40e_ptp_set_pins_hw(struct i40e_pf *pf) in i40e_ptp_set_pins_hw() argument
1042 const struct i40e_ptp_pins_settings *pins = pf->ptp_pins; in i40e_ptp_set_pins_hw()
1043 struct i40e_hw *hw = &pf->hw; in i40e_ptp_set_pins_hw()
1059 dev_info(&pf->pdev->dev, in i40e_ptp_set_pins_hw()
1068 * @pf: Board private structure
1071 * Validate and set PTP pins in HW for specific PF.
1074 static int i40e_ptp_set_pins(struct i40e_pf *pf, in i40e_ptp_set_pins() argument
1077 enum i40e_can_set_pins pin_caps = i40e_can_set_pins(pf); in i40e_ptp_set_pins()
1086 pins->sdp3_2 = pf->ptp_pins->sdp3_2; in i40e_ptp_set_pins()
1088 pins->sdp3_3 = pf->ptp_pins->sdp3_3; in i40e_ptp_set_pins()
1090 pins->gpio_4 = pf->ptp_pins->gpio_4; in i40e_ptp_set_pins()
1108 dev_warn(&pf->pdev->dev, in i40e_ptp_set_pins()
1116 memcpy(pf->ptp_pins, pins, sizeof(*pins)); in i40e_ptp_set_pins()
1117 i40e_ptp_set_pins_hw(pf); in i40e_ptp_set_pins()
1118 i40_ptp_reset_timing_events(pf); in i40e_ptp_set_pins()
1125 * @pf: Board private structure
1129 int i40e_ptp_alloc_pins(struct i40e_pf *pf) in i40e_ptp_alloc_pins() argument
1131 if (!i40e_is_ptp_pin_dev(&pf->hw)) in i40e_ptp_alloc_pins()
1134 pf->ptp_pins = in i40e_ptp_alloc_pins()
1137 if (!pf->ptp_pins) { in i40e_ptp_alloc_pins()
1138 dev_warn(&pf->pdev->dev, "Cannot allocate memory for PTP pins structure.\n"); in i40e_ptp_alloc_pins()
1142 pf->ptp_pins->sdp3_2 = off; in i40e_ptp_alloc_pins()
1143 pf->ptp_pins->sdp3_3 = off; in i40e_ptp_alloc_pins()
1144 pf->ptp_pins->gpio_4 = off; in i40e_ptp_alloc_pins()
1145 pf->ptp_pins->led2_0 = high; in i40e_ptp_alloc_pins()
1146 pf->ptp_pins->led2_1 = high; in i40e_ptp_alloc_pins()
1147 pf->ptp_pins->led3_0 = high; in i40e_ptp_alloc_pins()
1148 pf->ptp_pins->led3_1 = high; in i40e_ptp_alloc_pins()
1151 if (pf->hw.pf_id) in i40e_ptp_alloc_pins()
1154 i40e_ptp_init_leds_hw(&pf->hw); in i40e_ptp_alloc_pins()
1155 i40e_ptp_set_pins_hw(pf); in i40e_ptp_alloc_pins()
1162 * @pf: Board private structure
1172 static int i40e_ptp_set_timestamp_mode(struct i40e_pf *pf, in i40e_ptp_set_timestamp_mode() argument
1175 struct i40e_hw *hw = &pf->hw; in i40e_ptp_set_timestamp_mode()
1191 INIT_WORK(&pf->ptp_extts0_work, i40e_ptp_extts0_work); in i40e_ptp_set_timestamp_mode()
1195 pf->ptp_tx = false; in i40e_ptp_set_timestamp_mode()
1198 pf->ptp_tx = true; in i40e_ptp_set_timestamp_mode()
1206 pf->ptp_rx = false; in i40e_ptp_set_timestamp_mode()
1217 if (!test_bit(I40E_HW_CAP_PTP_L4, pf->hw.caps)) in i40e_ptp_set_timestamp_mode()
1219 pf->ptp_rx = true; in i40e_ptp_set_timestamp_mode()
1231 if (!test_bit(I40E_HW_CAP_PTP_L4, pf->hw.caps)) in i40e_ptp_set_timestamp_mode()
1237 pf->ptp_rx = true; in i40e_ptp_set_timestamp_mode()
1240 if (test_bit(I40E_HW_CAP_PTP_L4, pf->hw.caps)) { in i40e_ptp_set_timestamp_mode()
1254 spin_lock_bh(&pf->ptp_rx_lock); in i40e_ptp_set_timestamp_mode()
1261 pf->latch_event_flags = 0; in i40e_ptp_set_timestamp_mode()
1262 spin_unlock_bh(&pf->ptp_rx_lock); in i40e_ptp_set_timestamp_mode()
1266 if (pf->ptp_tx) in i40e_ptp_set_timestamp_mode()
1273 if (pf->ptp_tx) in i40e_ptp_set_timestamp_mode()
1283 * ignore Rx timestamps via the pf->ptp_rx flag. in i40e_ptp_set_timestamp_mode()
1315 struct i40e_pf *pf = np->vsi->back; in i40e_ptp_hwtstamp_set() local
1318 if (!test_bit(I40E_FLAG_PTP_ENA, pf->flags)) in i40e_ptp_hwtstamp_set()
1321 err = i40e_ptp_set_timestamp_mode(pf, config); in i40e_ptp_hwtstamp_set()
1326 pf->tstamp_config = *config; in i40e_ptp_hwtstamp_set()
1333 * @pf: private board structure
1338 static int i40e_init_pin_config(struct i40e_pf *pf) in i40e_init_pin_config() argument
1342 pf->ptp_caps.n_pins = 3; in i40e_init_pin_config()
1343 pf->ptp_caps.n_ext_ts = 2; in i40e_init_pin_config()
1344 pf->ptp_caps.pps = 1; in i40e_init_pin_config()
1345 pf->ptp_caps.n_per_out = 2; in i40e_init_pin_config()
1347 pf->ptp_caps.pin_config = kcalloc(pf->ptp_caps.n_pins, in i40e_init_pin_config()
1348 sizeof(*pf->ptp_caps.pin_config), in i40e_init_pin_config()
1350 if (!pf->ptp_caps.pin_config) in i40e_init_pin_config()
1353 for (i = 0; i < pf->ptp_caps.n_pins; i++) { in i40e_init_pin_config()
1354 snprintf(pf->ptp_caps.pin_config[i].name, in i40e_init_pin_config()
1355 sizeof(pf->ptp_caps.pin_config[i].name), in i40e_init_pin_config()
1357 pf->ptp_caps.pin_config[i].index = sdp_desc[i].index; in i40e_init_pin_config()
1358 pf->ptp_caps.pin_config[i].func = PTP_PF_NONE; in i40e_init_pin_config()
1359 pf->ptp_caps.pin_config[i].chan = sdp_desc[i].chan; in i40e_init_pin_config()
1362 pf->ptp_caps.verify = i40e_ptp_verify; in i40e_init_pin_config()
1363 pf->ptp_caps.enable = i40e_ptp_feature_enable; in i40e_init_pin_config()
1365 pf->ptp_caps.pps = 1; in i40e_init_pin_config()
1372 * @pf: Board private structure
1380 static long i40e_ptp_create_clock(struct i40e_pf *pf) in i40e_ptp_create_clock() argument
1383 if (!IS_ERR_OR_NULL(pf->ptp_clock)) in i40e_ptp_create_clock()
1386 strscpy(pf->ptp_caps.name, i40e_driver_name, in i40e_ptp_create_clock()
1387 sizeof(pf->ptp_caps.name) - 1); in i40e_ptp_create_clock()
1388 pf->ptp_caps.owner = THIS_MODULE; in i40e_ptp_create_clock()
1389 pf->ptp_caps.max_adj = 999999999; in i40e_ptp_create_clock()
1390 pf->ptp_caps.adjfine = i40e_ptp_adjfine; in i40e_ptp_create_clock()
1391 pf->ptp_caps.adjtime = i40e_ptp_adjtime; in i40e_ptp_create_clock()
1392 pf->ptp_caps.gettimex64 = i40e_ptp_gettimex; in i40e_ptp_create_clock()
1393 pf->ptp_caps.settime64 = i40e_ptp_settime; in i40e_ptp_create_clock()
1394 if (i40e_is_ptp_pin_dev(&pf->hw)) { in i40e_ptp_create_clock()
1395 int err = i40e_init_pin_config(pf); in i40e_ptp_create_clock()
1402 pf->ptp_clock = ptp_clock_register(&pf->ptp_caps, &pf->pdev->dev); in i40e_ptp_create_clock()
1403 if (IS_ERR(pf->ptp_clock)) in i40e_ptp_create_clock()
1404 return PTR_ERR(pf->ptp_clock); in i40e_ptp_create_clock()
1410 pf->tstamp_config.rx_filter = HWTSTAMP_FILTER_NONE; in i40e_ptp_create_clock()
1411 pf->tstamp_config.tx_type = HWTSTAMP_TX_OFF; in i40e_ptp_create_clock()
1414 ktime_get_real_ts64(&pf->ptp_prev_hw_time); in i40e_ptp_create_clock()
1415 pf->ptp_reset_start = ktime_get(); in i40e_ptp_create_clock()
1422 * @pf: Board private structure
1424 * Read the current PTP time and save it into pf->ptp_prev_hw_time. This should
1429 void i40e_ptp_save_hw_time(struct i40e_pf *pf) in i40e_ptp_save_hw_time() argument
1432 if (!test_bit(I40E_FLAG_PTP_ENA, pf->flags)) in i40e_ptp_save_hw_time()
1435 i40e_ptp_gettimex(&pf->ptp_caps, &pf->ptp_prev_hw_time, NULL); in i40e_ptp_save_hw_time()
1437 pf->ptp_reset_start = ktime_get(); in i40e_ptp_save_hw_time()
1442 * @pf: Board private structure
1445 * hardware time as pf->ptp_prev_hw_time. To be as accurate as possible,
1452 void i40e_ptp_restore_hw_time(struct i40e_pf *pf) in i40e_ptp_restore_hw_time() argument
1454 ktime_t delta = ktime_sub(ktime_get(), pf->ptp_reset_start); in i40e_ptp_restore_hw_time()
1457 timespec64_add_ns(&pf->ptp_prev_hw_time, ktime_to_ns(delta)); in i40e_ptp_restore_hw_time()
1460 i40e_ptp_settime(&pf->ptp_caps, &pf->ptp_prev_hw_time); in i40e_ptp_restore_hw_time()
1465 * @pf: Board private structure
1472 * pf->ptp_prev_hw_time to the current system time. During resets, it is
1476 void i40e_ptp_init(struct i40e_pf *pf) in i40e_ptp_init() argument
1478 struct i40e_vsi *vsi = i40e_pf_get_main_vsi(pf); in i40e_ptp_init()
1480 struct i40e_hw *hw = &pf->hw; in i40e_ptp_init()
1484 /* Only one PF is assigned to control 1588 logic per port. Do not in i40e_ptp_init()
1490 clear_bit(I40E_FLAG_PTP_ENA, pf->flags); in i40e_ptp_init()
1491 dev_info(&pf->pdev->dev, "%s: PTP not supported on %s\n", in i40e_ptp_init()
1497 mutex_init(&pf->tmreg_lock); in i40e_ptp_init()
1498 spin_lock_init(&pf->ptp_rx_lock); in i40e_ptp_init()
1501 err = i40e_ptp_create_clock(pf); in i40e_ptp_init()
1503 pf->ptp_clock = NULL; in i40e_ptp_init()
1504 dev_err(&pf->pdev->dev, "%s: ptp_clock_register failed\n", in i40e_ptp_init()
1506 } else if (pf->ptp_clock) { in i40e_ptp_init()
1509 if (pf->hw.debug_mask & I40E_DEBUG_LAN) in i40e_ptp_init()
1510 dev_info(&pf->pdev->dev, "PHC enabled\n"); in i40e_ptp_init()
1511 set_bit(I40E_FLAG_PTP_ENA, pf->flags); in i40e_ptp_init()
1522 i40e_ptp_set_increment(pf); in i40e_ptp_init()
1525 i40e_ptp_set_timestamp_mode(pf, &pf->tstamp_config); in i40e_ptp_init()
1528 i40e_ptp_restore_hw_time(pf); in i40e_ptp_init()
1531 i40e_ptp_set_1pps_signal_hw(pf); in i40e_ptp_init()
1536 * @pf: Board private structure
1541 void i40e_ptp_stop(struct i40e_pf *pf) in i40e_ptp_stop() argument
1543 struct i40e_vsi *main_vsi = i40e_pf_get_main_vsi(pf); in i40e_ptp_stop()
1544 struct i40e_hw *hw = &pf->hw; in i40e_ptp_stop()
1547 clear_bit(I40E_FLAG_PTP_ENA, pf->flags); in i40e_ptp_stop()
1548 pf->ptp_tx = false; in i40e_ptp_stop()
1549 pf->ptp_rx = false; in i40e_ptp_stop()
1551 if (pf->ptp_tx_skb) { in i40e_ptp_stop()
1552 struct sk_buff *skb = pf->ptp_tx_skb; in i40e_ptp_stop()
1554 pf->ptp_tx_skb = NULL; in i40e_ptp_stop()
1555 clear_bit_unlock(__I40E_PTP_TX_IN_PROGRESS, pf->state); in i40e_ptp_stop()
1559 if (pf->ptp_clock) { in i40e_ptp_stop()
1560 ptp_clock_unregister(pf->ptp_clock); in i40e_ptp_stop()
1561 pf->ptp_clock = NULL; in i40e_ptp_stop()
1562 dev_info(&pf->pdev->dev, "%s: removed PHC on %s\n", __func__, in i40e_ptp_stop()
1566 if (i40e_is_ptp_pin_dev(&pf->hw)) { in i40e_ptp_stop()
1581 i40e_ptp_free_pins(pf); in i40e_ptp_stop()