Lines Matching +full:x +full:- +full:mask
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2018 Intel Corporation. */
11 * @mask: bits to be touched
14 u32 reg, u32 mask) in i40e_diag_reg_pattern_test() argument
25 wr32(hw, reg, (pat & mask)); in i40e_diag_reg_pattern_test()
27 if ((val & mask) != (pat & mask)) { in i40e_diag_reg_pattern_test()
29 "%s: reg pattern test failed - reg 0x%08x pat 0x%08x val 0x%08x\n", in i40e_diag_reg_pattern_test()
31 return -EIO; in i40e_diag_reg_pattern_test()
39 "%s: reg restore test failed - reg 0x%08x orig_val 0x%08x val 0x%08x\n", in i40e_diag_reg_pattern_test()
41 return -EIO; in i40e_diag_reg_pattern_test()
48 /* offset mask elements stride */
50 I40E_QTX_CTL(1) - I40E_QTX_CTL(0)},
52 I40E_PFINT_ITR0(1) - I40E_PFINT_ITR0(0)},
54 I40E_PFINT_ITRN(0, 1) - I40E_PFINT_ITRN(0, 0)},
56 I40E_PFINT_ITRN(1, 1) - I40E_PFINT_ITRN(1, 0)},
58 I40E_PFINT_ITRN(2, 1) - I40E_PFINT_ITRN(2, 0)},
62 I40E_PFINT_LNKLSTN(1) - I40E_PFINT_LNKLSTN(0)},
64 I40E_QINT_TQCTL(1) - I40E_QINT_TQCTL(0)},
66 I40E_QINT_RQCTL(1) - I40E_QINT_RQCTL(0)},
80 u32 reg, mask; in i40e_diag_reg_test() local
90 hw->func_caps.num_tx_qp != 0) in i40e_diag_reg_test()
91 elements = hw->func_caps.num_tx_qp; in i40e_diag_reg_test()
97 hw->func_caps.num_msix_vectors != 0) in i40e_diag_reg_test()
98 elements = hw->func_caps.num_msix_vectors - 1; in i40e_diag_reg_test()
101 mask = i40e_reg_list[i].mask; in i40e_diag_reg_test()
105 ret_code = i40e_diag_reg_pattern_test(hw, reg, mask); in i40e_diag_reg_test()
130 return -EIO; in i40e_diag_eeprom_test()