Lines Matching +full:timeout +full:- +full:pwr +full:- +full:ms
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
36 #define E1000_ICH_FWSM_PCIM2PCI 0x01000000 /* ME PCIm-to-PCI active */
93 /* bit24: RXDCTL thresholds granularity: 0 - cache lines, 1 - descriptors */
106 #define E1000_PCH2_RAR_ENTRIES 5 /* RAR[0], SHRA[0-3] */
107 #define E1000_PCH_LPT_RAR_ENTRIES 12 /* RAR[0], SHRA[0-10] */
144 /* Half-duplex collision counts */
172 #define I218_ULP_CONFIG1_IND 0x0004 /* Pwr up from ULP indication */
192 /* Strapping Option Register - RO */
203 #define HV_OEM_BITS_RESTART_AN 0x0400 /* Restart Auto-negotiation */
226 #define SW_FLAG_TIMEOUT 1000 /* SW Semaphore flag timeout in ms */