Lines Matching +full:scaled +full:- +full:output +full:- +full:hz
1 // SPDX-License-Identifier: GPL-2.0
94 * fec_ptp_read - read raw cycle counter (to be used by time counter)
107 tempval = readl(fep->hwp + FEC_ATIME_CTRL); in fec_ptp_read()
109 writel(tempval, fep->hwp + FEC_ATIME_CTRL); in fec_ptp_read()
111 if (fep->quirks & FEC_QUIRK_BUG_CAPTURE) in fec_ptp_read()
114 return readl(fep->hwp + FEC_ATIME); in fec_ptp_read()
120 * @enable: enable the channel pps output
131 spin_lock_irqsave(&fep->tmreg_lock, flags); in fec_ptp_enable_pps()
133 if (fep->pps_enable == enable) { in fec_ptp_enable_pps()
134 spin_unlock_irqrestore(&fep->tmreg_lock, flags); in fec_ptp_enable_pps()
139 /* clear capture or output compare interrupt status if have. in fec_ptp_enable_pps()
141 writel(FEC_T_TF_MASK, fep->hwp + FEC_TCSR(fep->pps_channel)); in fec_ptp_enable_pps()
147 val = readl(fep->hwp + FEC_TCSR(fep->pps_channel)); in fec_ptp_enable_pps()
150 writel(val, fep->hwp + FEC_TCSR(fep->pps_channel)); in fec_ptp_enable_pps()
151 val = readl(fep->hwp + FEC_TCSR(fep->pps_channel)); in fec_ptp_enable_pps()
155 timecounter_read(&fep->tc); in fec_ptp_enable_pps()
160 * NSEC_PER_SEC - ts.tv_nsec. Add the remaining nanoseconds in fec_ptp_enable_pps()
163 tempval = fec_ptp_read(&fep->cc); in fec_ptp_enable_pps()
165 ns = timecounter_cyc2time(&fep->tc, tempval); in fec_ptp_enable_pps()
171 val = NSEC_PER_SEC - (u32)ts.tv_nsec + tempval; in fec_ptp_enable_pps()
175 * - ts.tv_nsec is close to be zero(For example 20ns); Since the timer in fec_ptp_enable_pps()
180 * of next second. The current setting is 31-bit timer and wrap in fec_ptp_enable_pps()
186 /* We add (2 * NSEC_PER_SEC - (u32)ts.tv_nsec) to current in fec_ptp_enable_pps()
187 * ptp counter, which maybe cause 32-bit wrap. Since the in fec_ptp_enable_pps()
188 * (NSEC_PER_SEC - (u32)ts.tv_nsec) is less than 2 second. in fec_ptp_enable_pps()
190 * is bigger than fep->cc.mask would be a error. in fec_ptp_enable_pps()
192 val &= fep->cc.mask; in fec_ptp_enable_pps()
193 writel(val, fep->hwp + FEC_TCCR(fep->pps_channel)); in fec_ptp_enable_pps()
196 fep->next_counter = (val + fep->reload_period) & fep->cc.mask; in fec_ptp_enable_pps()
199 val = readl(fep->hwp + FEC_ATIME_CTRL); in fec_ptp_enable_pps()
201 writel(val, fep->hwp + FEC_ATIME_CTRL); in fec_ptp_enable_pps()
204 val = readl(fep->hwp + FEC_TCSR(fep->pps_channel)); in fec_ptp_enable_pps()
209 writel(val, fep->hwp + FEC_TCSR(fep->pps_channel)); in fec_ptp_enable_pps()
214 writel(fep->next_counter, fep->hwp + FEC_TCCR(fep->pps_channel)); in fec_ptp_enable_pps()
215 fep->next_counter = (fep->next_counter + fep->reload_period) & fep->cc.mask; in fec_ptp_enable_pps()
217 writel(0, fep->hwp + FEC_TCSR(fep->pps_channel)); in fec_ptp_enable_pps()
220 fep->pps_enable = enable; in fec_ptp_enable_pps()
221 spin_unlock_irqrestore(&fep->tmreg_lock, flags); in fec_ptp_enable_pps()
232 spin_lock_irqsave(&fep->tmreg_lock, flags); in fec_ptp_pps_perout()
235 timecounter_read(&fep->tc); in fec_ptp_pps_perout()
238 ptp_hc = fec_ptp_read(&fep->cc); in fec_ptp_pps_perout()
241 curr_time = timecounter_cyc2time(&fep->tc, ptp_hc); in fec_ptp_pps_perout()
247 if (fep->perout_stime < curr_time + 100 * NSEC_PER_MSEC) { in fec_ptp_pps_perout()
248 dev_err(&fep->pdev->dev, "Current time is too close to the start time!\n"); in fec_ptp_pps_perout()
249 spin_unlock_irqrestore(&fep->tmreg_lock, flags); in fec_ptp_pps_perout()
250 return -1; in fec_ptp_pps_perout()
253 compare_val = fep->perout_stime - curr_time + ptp_hc; in fec_ptp_pps_perout()
254 compare_val &= fep->cc.mask; in fec_ptp_pps_perout()
256 writel(compare_val, fep->hwp + FEC_TCCR(fep->pps_channel)); in fec_ptp_pps_perout()
257 fep->next_counter = (compare_val + fep->reload_period) & fep->cc.mask; in fec_ptp_pps_perout()
260 temp_val = readl(fep->hwp + FEC_ATIME_CTRL); in fec_ptp_pps_perout()
262 writel(temp_val, fep->hwp + FEC_ATIME_CTRL); in fec_ptp_pps_perout()
265 temp_val = readl(fep->hwp + FEC_TCSR(fep->pps_channel)); in fec_ptp_pps_perout()
270 writel(temp_val, fep->hwp + FEC_TCSR(fep->pps_channel)); in fec_ptp_pps_perout()
275 writel(fep->next_counter, fep->hwp + FEC_TCCR(fep->pps_channel)); in fec_ptp_pps_perout()
276 fep->next_counter = (fep->next_counter + fep->reload_period) & fep->cc.mask; in fec_ptp_pps_perout()
277 spin_unlock_irqrestore(&fep->tmreg_lock, flags); in fec_ptp_pps_perout()
293 * fec_ptp_start_cyclecounter - create the cycle counter from hw
306 inc = 1000000000 / fep->cycle_speed; in fec_ptp_start_cyclecounter()
309 spin_lock_irqsave(&fep->tmreg_lock, flags); in fec_ptp_start_cyclecounter()
312 writel(inc << FEC_T_INC_OFFSET, fep->hwp + FEC_ATIME_INC); in fec_ptp_start_cyclecounter()
314 /* use 31-bit timer counter */ in fec_ptp_start_cyclecounter()
315 writel(FEC_COUNTER_PERIOD, fep->hwp + FEC_ATIME_EVT_PERIOD); in fec_ptp_start_cyclecounter()
318 fep->hwp + FEC_ATIME_CTRL); in fec_ptp_start_cyclecounter()
320 memset(&fep->cc, 0, sizeof(fep->cc)); in fec_ptp_start_cyclecounter()
321 fep->cc.read = fec_ptp_read; in fec_ptp_start_cyclecounter()
322 fep->cc.mask = CLOCKSOURCE_MASK(31); in fec_ptp_start_cyclecounter()
323 fep->cc.shift = 31; in fec_ptp_start_cyclecounter()
324 fep->cc.mult = FEC_CC_MULT; in fec_ptp_start_cyclecounter()
327 timecounter_init(&fep->tc, &fep->cc, 0); in fec_ptp_start_cyclecounter()
329 spin_unlock_irqrestore(&fep->tmreg_lock, flags); in fec_ptp_start_cyclecounter()
333 * fec_ptp_adjfine - adjust ptp cycle frequency
335 * @scaled_ppm: scaled parts per million adjustment from base
340 * Scaled parts per million is ppm with a 16-bit binary fractional field.
362 ppb = -ppb; in fec_ptp_adjfine()
367 * Try to find the corr_inc between 1 to fep->ptp_inc to in fec_ptp_adjfine()
371 rhs = (u64)ppb * (u64)fep->ptp_inc; in fec_ptp_adjfine()
372 for (i = 1; i <= fep->ptp_inc; i++) { in fec_ptp_adjfine()
380 /* Not found? Set it to high value - double speed in fec_ptp_adjfine()
383 if (i > fep->ptp_inc) { in fec_ptp_adjfine()
384 corr_inc = fep->ptp_inc; in fec_ptp_adjfine()
389 corr_ns = fep->ptp_inc - corr_inc; in fec_ptp_adjfine()
391 corr_ns = fep->ptp_inc + corr_inc; in fec_ptp_adjfine()
393 spin_lock_irqsave(&fep->tmreg_lock, flags); in fec_ptp_adjfine()
395 tmp = readl(fep->hwp + FEC_ATIME_INC) & FEC_T_INC_MASK; in fec_ptp_adjfine()
397 writel(tmp, fep->hwp + FEC_ATIME_INC); in fec_ptp_adjfine()
398 corr_period = corr_period > 1 ? corr_period - 1 : corr_period; in fec_ptp_adjfine()
399 writel(corr_period, fep->hwp + FEC_ATIME_CORR); in fec_ptp_adjfine()
401 timecounter_read(&fep->tc); in fec_ptp_adjfine()
403 spin_unlock_irqrestore(&fep->tmreg_lock, flags); in fec_ptp_adjfine()
421 spin_lock_irqsave(&fep->tmreg_lock, flags); in fec_ptp_adjtime()
422 timecounter_adjtime(&fep->tc, delta); in fec_ptp_adjtime()
423 spin_unlock_irqrestore(&fep->tmreg_lock, flags); in fec_ptp_adjtime()
443 mutex_lock(&fep->ptp_clk_mutex); in fec_ptp_gettime()
445 if (!fep->ptp_clk_on) { in fec_ptp_gettime()
446 mutex_unlock(&fep->ptp_clk_mutex); in fec_ptp_gettime()
447 return -EINVAL; in fec_ptp_gettime()
449 spin_lock_irqsave(&fep->tmreg_lock, flags); in fec_ptp_gettime()
450 ns = timecounter_read(&fep->tc); in fec_ptp_gettime()
451 spin_unlock_irqrestore(&fep->tmreg_lock, flags); in fec_ptp_gettime()
452 mutex_unlock(&fep->ptp_clk_mutex); in fec_ptp_gettime()
477 mutex_lock(&fep->ptp_clk_mutex); in fec_ptp_settime()
479 if (!fep->ptp_clk_on) { in fec_ptp_settime()
480 mutex_unlock(&fep->ptp_clk_mutex); in fec_ptp_settime()
481 return -EINVAL; in fec_ptp_settime()
488 counter = ns & fep->cc.mask; in fec_ptp_settime()
490 spin_lock_irqsave(&fep->tmreg_lock, flags); in fec_ptp_settime()
491 writel(counter, fep->hwp + FEC_ATIME); in fec_ptp_settime()
492 timecounter_init(&fep->tc, &fep->cc, ns); in fec_ptp_settime()
493 spin_unlock_irqrestore(&fep->tmreg_lock, flags); in fec_ptp_settime()
494 mutex_unlock(&fep->ptp_clk_mutex); in fec_ptp_settime()
502 spin_lock_irqsave(&fep->tmreg_lock, flags); in fec_ptp_pps_disable()
503 writel(0, fep->hwp + FEC_TCSR(channel)); in fec_ptp_pps_disable()
504 spin_unlock_irqrestore(&fep->tmreg_lock, flags); in fec_ptp_pps_disable()
527 if (rq->type == PTP_CLK_REQ_PPS) { in fec_ptp_enable()
528 fep->pps_channel = DEFAULT_PPS_CHANNEL; in fec_ptp_enable()
529 fep->reload_period = PPS_OUPUT_RELOAD_PERIOD; in fec_ptp_enable()
534 } else if (rq->type == PTP_CLK_REQ_PEROUT) { in fec_ptp_enable()
536 if (rq->perout.flags) in fec_ptp_enable()
537 return -EOPNOTSUPP; in fec_ptp_enable()
539 if (rq->perout.index != DEFAULT_PPS_CHANNEL) in fec_ptp_enable()
540 return -EOPNOTSUPP; in fec_ptp_enable()
542 fep->pps_channel = DEFAULT_PPS_CHANNEL; in fec_ptp_enable()
543 period.tv_sec = rq->perout.period.sec; in fec_ptp_enable()
544 period.tv_nsec = rq->perout.period.nsec; in fec_ptp_enable()
551 dev_err(&fep->pdev->dev, "The period must equal to or less than 4s!\n"); in fec_ptp_enable()
552 return -EOPNOTSUPP; in fec_ptp_enable()
555 fep->reload_period = div_u64(period_ns, 2); in fec_ptp_enable()
556 if (on && fep->reload_period) { in fec_ptp_enable()
558 start_time.tv_sec = rq->perout.start.sec; in fec_ptp_enable()
559 start_time.tv_nsec = rq->perout.start.nsec; in fec_ptp_enable()
560 fep->perout_stime = timespec64_to_ns(&start_time); in fec_ptp_enable()
562 mutex_lock(&fep->ptp_clk_mutex); in fec_ptp_enable()
563 if (!fep->ptp_clk_on) { in fec_ptp_enable()
564 dev_err(&fep->pdev->dev, "Error: PTP clock is closed!\n"); in fec_ptp_enable()
565 mutex_unlock(&fep->ptp_clk_mutex); in fec_ptp_enable()
566 return -EOPNOTSUPP; in fec_ptp_enable()
568 spin_lock_irqsave(&fep->tmreg_lock, flags); in fec_ptp_enable()
570 curr_time = timecounter_read(&fep->tc); in fec_ptp_enable()
571 spin_unlock_irqrestore(&fep->tmreg_lock, flags); in fec_ptp_enable()
572 mutex_unlock(&fep->ptp_clk_mutex); in fec_ptp_enable()
575 delta = fep->perout_stime - curr_time; in fec_ptp_enable()
577 if (fep->perout_stime <= curr_time) { in fec_ptp_enable()
578 dev_err(&fep->pdev->dev, "Start time must larger than current time!\n"); in fec_ptp_enable()
579 return -EINVAL; in fec_ptp_enable()
582 /* Because the timer counter of FEC only has 31-bits, correspondingly, in fec_ptp_enable()
589 timeout = ns_to_ktime(delta - NSEC_PER_SEC); in fec_ptp_enable()
590 hrtimer_start(&fep->perout_timer, timeout, HRTIMER_MODE_REL); in fec_ptp_enable()
595 fec_ptp_pps_disable(fep, fep->pps_channel); in fec_ptp_enable()
600 return -EOPNOTSUPP; in fec_ptp_enable()
609 switch (config->tx_type) { in fec_ptp_set()
611 fep->hwts_tx_en = 0; in fec_ptp_set()
614 fep->hwts_tx_en = 1; in fec_ptp_set()
617 return -ERANGE; in fec_ptp_set()
620 switch (config->rx_filter) { in fec_ptp_set()
622 fep->hwts_rx_en = 0; in fec_ptp_set()
626 fep->hwts_rx_en = 1; in fec_ptp_set()
627 config->rx_filter = HWTSTAMP_FILTER_ALL; in fec_ptp_set()
638 config->flags = 0; in fec_ptp_get()
639 config->tx_type = fep->hwts_tx_en ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF; in fec_ptp_get()
640 config->rx_filter = (fep->hwts_rx_en ? in fec_ptp_get()
645 * fec_time_keep - call timecounter_read every second to avoid timer overrun
654 mutex_lock(&fep->ptp_clk_mutex); in fec_time_keep()
655 if (fep->ptp_clk_on) { in fec_time_keep()
656 spin_lock_irqsave(&fep->tmreg_lock, flags); in fec_time_keep()
657 timecounter_read(&fep->tc); in fec_time_keep()
658 spin_unlock_irqrestore(&fep->tmreg_lock, flags); in fec_time_keep()
660 mutex_unlock(&fep->ptp_clk_mutex); in fec_time_keep()
662 schedule_delayed_work(&fep->time_keep, HZ); in fec_time_keep()
671 u8 channel = fep->pps_channel; in fec_pps_interrupt()
674 val = readl(fep->hwp + FEC_TCSR(channel)); in fec_pps_interrupt()
679 writel(fep->next_counter, fep->hwp + FEC_TCCR(channel)); in fec_pps_interrupt()
681 writel(val, fep->hwp + FEC_TCSR(channel)); in fec_pps_interrupt()
682 } while (readl(fep->hwp + FEC_TCSR(channel)) & FEC_T_TF_MASK); in fec_pps_interrupt()
685 fep->next_counter = (fep->next_counter + fep->reload_period) & in fec_pps_interrupt()
686 fep->cc.mask; in fec_pps_interrupt()
689 ptp_clock_event(fep->ptp_clock, &event); in fec_pps_interrupt()
713 fep->ptp_caps.owner = THIS_MODULE; in fec_ptp_init()
714 strscpy(fep->ptp_caps.name, "fec ptp", sizeof(fep->ptp_caps.name)); in fec_ptp_init()
716 fep->ptp_caps.max_adj = 250000000; in fec_ptp_init()
717 fep->ptp_caps.n_alarm = 0; in fec_ptp_init()
718 fep->ptp_caps.n_ext_ts = 0; in fec_ptp_init()
719 fep->ptp_caps.n_per_out = 1; in fec_ptp_init()
720 fep->ptp_caps.n_pins = 0; in fec_ptp_init()
721 fep->ptp_caps.pps = 1; in fec_ptp_init()
722 fep->ptp_caps.adjfine = fec_ptp_adjfine; in fec_ptp_init()
723 fep->ptp_caps.adjtime = fec_ptp_adjtime; in fec_ptp_init()
724 fep->ptp_caps.gettime64 = fec_ptp_gettime; in fec_ptp_init()
725 fep->ptp_caps.settime64 = fec_ptp_settime; in fec_ptp_init()
726 fep->ptp_caps.enable = fec_ptp_enable; in fec_ptp_init()
728 fep->cycle_speed = clk_get_rate(fep->clk_ptp); in fec_ptp_init()
729 if (!fep->cycle_speed) { in fec_ptp_init()
730 fep->cycle_speed = NSEC_PER_SEC; in fec_ptp_init()
731 dev_err(&fep->pdev->dev, "clk_ptp clock rate is zero\n"); in fec_ptp_init()
733 fep->ptp_inc = NSEC_PER_SEC / fep->cycle_speed; in fec_ptp_init()
735 spin_lock_init(&fep->tmreg_lock); in fec_ptp_init()
739 INIT_DELAYED_WORK(&fep->time_keep, fec_time_keep); in fec_ptp_init()
741 hrtimer_init(&fep->perout_timer, CLOCK_REALTIME, HRTIMER_MODE_REL); in fec_ptp_init()
742 fep->perout_timer.function = fec_ptp_pps_perout_handler; in fec_ptp_init()
751 ret = devm_request_irq(&pdev->dev, irq, fec_pps_interrupt, in fec_ptp_init()
752 0, pdev->name, ndev); in fec_ptp_init()
754 dev_warn(&pdev->dev, "request for pps irq failed(%d)\n", in fec_ptp_init()
758 fep->ptp_clock = ptp_clock_register(&fep->ptp_caps, &pdev->dev); in fec_ptp_init()
759 if (IS_ERR(fep->ptp_clock)) { in fec_ptp_init()
760 fep->ptp_clock = NULL; in fec_ptp_init()
761 dev_err(&pdev->dev, "ptp_clock_register failed\n"); in fec_ptp_init()
764 schedule_delayed_work(&fep->time_keep, HZ); in fec_ptp_init()
772 spin_lock_irqsave(&fep->tmreg_lock, flags); in fec_ptp_save_state()
774 fep->ptp_saved_state.pps_enable = fep->pps_enable; in fec_ptp_save_state()
776 fep->ptp_saved_state.ns_phc = timecounter_read(&fep->tc); in fec_ptp_save_state()
777 fep->ptp_saved_state.ns_sys = ktime_get_ns(); in fec_ptp_save_state()
779 fep->ptp_saved_state.at_corr = readl(fep->hwp + FEC_ATIME_CORR); in fec_ptp_save_state()
780 atime_inc_corr = readl(fep->hwp + FEC_ATIME_INC) & FEC_T_INC_CORR_MASK; in fec_ptp_save_state()
781 fep->ptp_saved_state.at_inc_corr = (u8)(atime_inc_corr >> FEC_T_INC_CORR_OFFSET); in fec_ptp_save_state()
783 spin_unlock_irqrestore(&fep->tmreg_lock, flags); in fec_ptp_save_state()
789 u32 atime_inc = readl(fep->hwp + FEC_ATIME_INC) & FEC_T_INC_MASK; in fec_ptp_restore_state()
794 spin_lock_irqsave(&fep->tmreg_lock, flags); in fec_ptp_restore_state()
797 fep->pps_enable = 0; in fec_ptp_restore_state()
799 writel(fep->ptp_saved_state.at_corr, fep->hwp + FEC_ATIME_CORR); in fec_ptp_restore_state()
800 atime_inc |= ((u32)fep->ptp_saved_state.at_inc_corr) << FEC_T_INC_CORR_OFFSET; in fec_ptp_restore_state()
801 writel(atime_inc, fep->hwp + FEC_ATIME_INC); in fec_ptp_restore_state()
803 ns = ktime_get_ns() - fep->ptp_saved_state.ns_sys + fep->ptp_saved_state.ns_phc; in fec_ptp_restore_state()
804 counter = ns & fep->cc.mask; in fec_ptp_restore_state()
805 writel(counter, fep->hwp + FEC_ATIME); in fec_ptp_restore_state()
806 timecounter_init(&fep->tc, &fep->cc, ns); in fec_ptp_restore_state()
808 spin_unlock_irqrestore(&fep->tmreg_lock, flags); in fec_ptp_restore_state()
811 if (fep->ptp_saved_state.pps_enable) { in fec_ptp_restore_state()
812 /* Re-enable PPS */ in fec_ptp_restore_state()
822 if (fep->pps_enable) in fec_ptp_stop()
825 cancel_delayed_work_sync(&fep->time_keep); in fec_ptp_stop()
826 hrtimer_cancel(&fep->perout_timer); in fec_ptp_stop()
827 if (fep->ptp_clock) in fec_ptp_stop()
828 ptp_clock_unregister(fep->ptp_clock); in fec_ptp_stop()