Lines Matching +full:bd +full:- +full:address
1 // SPDX-License-Identifier: GPL-2.0+
17 * Copyright (c) 2001-2005 Greg Ungerer (gerg@snapgear.com)
20 * Copyright (c) 2004-2006 Macq Electronique SA.
22 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
194 { .compatible = "fsl,imx25-fec", .data = &fec_imx25_info, },
195 { .compatible = "fsl,imx27-fec", .data = &fec_imx27_info, },
196 { .compatible = "fsl,imx28-fec", .data = &fec_imx28_info, },
197 { .compatible = "fsl,imx6q-fec", .data = &fec_imx6q_info, },
198 { .compatible = "fsl,mvf600-fec", .data = &fec_mvf600_info, },
199 { .compatible = "fsl,imx6sx-fec", .data = &fec_imx6x_info, },
200 { .compatible = "fsl,imx6ul-fec", .data = &fec_imx6ul_info, },
201 { .compatible = "fsl,imx8mq-fec", .data = &fec_imx8mq_info, },
202 { .compatible = "fsl,imx8qm-fec", .data = &fec_imx8qm_info, },
203 { .compatible = "fsl,s32v234-fec", .data = &fec_s32v234_info, },
210 MODULE_PARM_DESC(macaddr, "FEC Ethernet MAC address");
214 * Some hardware gets it MAC address out of local flash memory.
215 * if this is non-zero then assume it is the address to get MAC from.
237 #define PKT_MAXBUF_SIZE (round_down(2048 - 64, 64))
308 ((addr >= txq->tso_hdrs_dma) && \
309 (addr < txq->tso_hdrs_dma + txq->bd.ring_size * TSO_HEADER_SIZE))
314 struct bufdesc_prop *bd) in fec_enet_get_nextdesc() argument
316 return (bdp >= bd->last) ? bd->base in fec_enet_get_nextdesc()
317 : (struct bufdesc *)(((void *)bdp) + bd->dsize); in fec_enet_get_nextdesc()
321 struct bufdesc_prop *bd) in fec_enet_get_prevdesc() argument
323 return (bdp <= bd->base) ? bd->last in fec_enet_get_prevdesc()
324 : (struct bufdesc *)(((void *)bdp) - bd->dsize); in fec_enet_get_prevdesc()
328 struct bufdesc_prop *bd) in fec_enet_get_bd_index() argument
330 return ((const char *)bdp - (const char *)bd->base) >> bd->dsize_log2; in fec_enet_get_bd_index()
337 entries = (((const char *)txq->dirty_tx - in fec_enet_get_free_txdesc_num()
338 (const char *)txq->bd.cur) >> txq->bd.dsize_log2) - 1; in fec_enet_get_free_txdesc_num()
340 return entries >= 0 ? entries : entries + txq->bd.ring_size; in fec_enet_get_free_txdesc_num()
362 txq = fep->tx_queue[0]; in fec_dump()
363 bdp = txq->bd.base; in fec_dump()
368 bdp == txq->bd.cur ? 'S' : ' ', in fec_dump()
369 bdp == txq->dirty_tx ? 'H' : ' ', in fec_dump()
370 fec16_to_cpu(bdp->cbd_sc), in fec_dump()
371 fec32_to_cpu(bdp->cbd_bufaddr), in fec_dump()
372 fec16_to_cpu(bdp->cbd_datlen), in fec_dump()
373 txq->tx_buf[index].buf_p); in fec_dump()
374 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_dump()
376 } while (bdp != txq->bd.base); in fec_dump()
381 * a band-aid with a manual flush in fec_enet_rx_queue.
419 fec_dma_free(dev, this->size, this->vaddr, this->dma_handle); in fec_dmam_release()
436 dr->vaddr = vaddr; in fec_dmam_alloc()
437 dr->dma_handle = *handle; in fec_dmam_alloc()
438 dr->size = size; in fec_dmam_alloc()
445 return skb->protocol == htons(ETH_P_IP) && ip_hdr(skb)->version == 4; in is_ipv4_pkt()
452 if (skb->ip_summed != CHECKSUM_PARTIAL) in fec_enet_clear_csum()
456 return -1; in fec_enet_clear_csum()
459 ip_hdr(skb)->check = 0; in fec_enet_clear_csum()
460 *(__sum16 *)(skb->head + skb->csum_start + skb->csum_offset) = 0; in fec_enet_clear_csum()
469 struct bpf_prog *xdp_prog = READ_ONCE(fep->xdp_prog); in fec_enet_create_page_pool()
474 .nid = dev_to_node(&fep->pdev->dev), in fec_enet_create_page_pool()
475 .dev = &fep->pdev->dev, in fec_enet_create_page_pool()
482 rxq->page_pool = page_pool_create(&pp_params); in fec_enet_create_page_pool()
483 if (IS_ERR(rxq->page_pool)) { in fec_enet_create_page_pool()
484 err = PTR_ERR(rxq->page_pool); in fec_enet_create_page_pool()
485 rxq->page_pool = NULL; in fec_enet_create_page_pool()
489 err = xdp_rxq_info_reg(&rxq->xdp_rxq, fep->netdev, rxq->id, 0); in fec_enet_create_page_pool()
493 err = xdp_rxq_info_reg_mem_model(&rxq->xdp_rxq, MEM_TYPE_PAGE_POOL, in fec_enet_create_page_pool()
494 rxq->page_pool); in fec_enet_create_page_pool()
501 xdp_rxq_info_unreg(&rxq->xdp_rxq); in fec_enet_create_page_pool()
503 page_pool_destroy(rxq->page_pool); in fec_enet_create_page_pool()
504 rxq->page_pool = NULL; in fec_enet_create_page_pool()
514 struct bufdesc *bdp = txq->bd.cur; in fec_enet_txq_submit_frag_skb()
516 int nr_frags = skb_shinfo(skb)->nr_frags; in fec_enet_txq_submit_frag_skb()
527 this_frag = &skb_shinfo(skb)->frags[frag]; in fec_enet_txq_submit_frag_skb()
528 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_txq_submit_frag_skb()
531 status = fec16_to_cpu(bdp->cbd_sc); in fec_enet_txq_submit_frag_skb()
534 frag_len = skb_frag_size(&skb_shinfo(skb)->frags[frag]); in fec_enet_txq_submit_frag_skb()
536 /* Handle the last BD specially */ in fec_enet_txq_submit_frag_skb()
537 if (frag == nr_frags - 1) { in fec_enet_txq_submit_frag_skb()
539 if (fep->bufdesc_ex) { in fec_enet_txq_submit_frag_skb()
541 if (unlikely(skb_shinfo(skb)->tx_flags & in fec_enet_txq_submit_frag_skb()
542 SKBTX_HW_TSTAMP && fep->hwts_tx_en)) in fec_enet_txq_submit_frag_skb()
547 if (fep->bufdesc_ex) { in fec_enet_txq_submit_frag_skb()
548 if (fep->quirks & FEC_QUIRK_HAS_AVB) in fec_enet_txq_submit_frag_skb()
549 estatus |= FEC_TX_BD_FTYPE(txq->bd.qid); in fec_enet_txq_submit_frag_skb()
550 if (skb->ip_summed == CHECKSUM_PARTIAL) in fec_enet_txq_submit_frag_skb()
553 ebdp->cbd_bdu = 0; in fec_enet_txq_submit_frag_skb()
554 ebdp->cbd_esc = cpu_to_fec32(estatus); in fec_enet_txq_submit_frag_skb()
559 index = fec_enet_get_bd_index(bdp, &txq->bd); in fec_enet_txq_submit_frag_skb()
560 if (((unsigned long) bufaddr) & fep->tx_align || in fec_enet_txq_submit_frag_skb()
561 fep->quirks & FEC_QUIRK_SWAP_FRAME) { in fec_enet_txq_submit_frag_skb()
562 memcpy(txq->tx_bounce[index], bufaddr, frag_len); in fec_enet_txq_submit_frag_skb()
563 bufaddr = txq->tx_bounce[index]; in fec_enet_txq_submit_frag_skb()
565 if (fep->quirks & FEC_QUIRK_SWAP_FRAME) in fec_enet_txq_submit_frag_skb()
569 addr = dma_map_single(&fep->pdev->dev, bufaddr, frag_len, in fec_enet_txq_submit_frag_skb()
571 if (dma_mapping_error(&fep->pdev->dev, addr)) { in fec_enet_txq_submit_frag_skb()
577 bdp->cbd_bufaddr = cpu_to_fec32(addr); in fec_enet_txq_submit_frag_skb()
578 bdp->cbd_datlen = cpu_to_fec16(frag_len); in fec_enet_txq_submit_frag_skb()
583 bdp->cbd_sc = cpu_to_fec16(status); in fec_enet_txq_submit_frag_skb()
588 bdp = txq->bd.cur; in fec_enet_txq_submit_frag_skb()
590 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_txq_submit_frag_skb()
591 dma_unmap_single(&fep->pdev->dev, fec32_to_cpu(bdp->cbd_bufaddr), in fec_enet_txq_submit_frag_skb()
592 fec16_to_cpu(bdp->cbd_datlen), DMA_TO_DEVICE); in fec_enet_txq_submit_frag_skb()
594 return ERR_PTR(-ENOMEM); in fec_enet_txq_submit_frag_skb()
601 int nr_frags = skb_shinfo(skb)->nr_frags; in fec_enet_txq_submit_skb()
615 netdev_err(ndev, "NOT enough BD for SG!\n"); in fec_enet_txq_submit_skb()
619 /* Protocol checksum off-load for TCP and UDP. */ in fec_enet_txq_submit_skb()
626 bdp = txq->bd.cur; in fec_enet_txq_submit_skb()
628 status = fec16_to_cpu(bdp->cbd_sc); in fec_enet_txq_submit_skb()
632 bufaddr = skb->data; in fec_enet_txq_submit_skb()
635 index = fec_enet_get_bd_index(bdp, &txq->bd); in fec_enet_txq_submit_skb()
636 if (((unsigned long) bufaddr) & fep->tx_align || in fec_enet_txq_submit_skb()
637 fep->quirks & FEC_QUIRK_SWAP_FRAME) { in fec_enet_txq_submit_skb()
638 memcpy(txq->tx_bounce[index], skb->data, buflen); in fec_enet_txq_submit_skb()
639 bufaddr = txq->tx_bounce[index]; in fec_enet_txq_submit_skb()
641 if (fep->quirks & FEC_QUIRK_SWAP_FRAME) in fec_enet_txq_submit_skb()
646 addr = dma_map_single(&fep->pdev->dev, bufaddr, buflen, DMA_TO_DEVICE); in fec_enet_txq_submit_skb()
647 if (dma_mapping_error(&fep->pdev->dev, addr)) { in fec_enet_txq_submit_skb()
657 dma_unmap_single(&fep->pdev->dev, addr, in fec_enet_txq_submit_skb()
664 if (fep->bufdesc_ex) { in fec_enet_txq_submit_skb()
666 if (unlikely(skb_shinfo(skb)->tx_flags & in fec_enet_txq_submit_skb()
667 SKBTX_HW_TSTAMP && fep->hwts_tx_en)) in fec_enet_txq_submit_skb()
671 bdp->cbd_bufaddr = cpu_to_fec32(addr); in fec_enet_txq_submit_skb()
672 bdp->cbd_datlen = cpu_to_fec16(buflen); in fec_enet_txq_submit_skb()
674 if (fep->bufdesc_ex) { in fec_enet_txq_submit_skb()
678 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP && in fec_enet_txq_submit_skb()
679 fep->hwts_tx_en)) in fec_enet_txq_submit_skb()
680 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; in fec_enet_txq_submit_skb()
682 if (fep->quirks & FEC_QUIRK_HAS_AVB) in fec_enet_txq_submit_skb()
683 estatus |= FEC_TX_BD_FTYPE(txq->bd.qid); in fec_enet_txq_submit_skb()
685 if (skb->ip_summed == CHECKSUM_PARTIAL) in fec_enet_txq_submit_skb()
688 ebdp->cbd_bdu = 0; in fec_enet_txq_submit_skb()
689 ebdp->cbd_esc = cpu_to_fec32(estatus); in fec_enet_txq_submit_skb()
692 index = fec_enet_get_bd_index(last_bdp, &txq->bd); in fec_enet_txq_submit_skb()
694 txq->tx_buf[index].buf_p = skb; in fec_enet_txq_submit_skb()
702 * it's the last BD of the frame, and to put the CRC on the end. in fec_enet_txq_submit_skb()
705 bdp->cbd_sc = cpu_to_fec16(status); in fec_enet_txq_submit_skb()
707 /* If this was the last BD in the ring, start at the beginning again. */ in fec_enet_txq_submit_skb()
708 bdp = fec_enet_get_nextdesc(last_bdp, &txq->bd); in fec_enet_txq_submit_skb()
712 /* Make sure the update to bdp is performed before txq->bd.cur. */ in fec_enet_txq_submit_skb()
714 txq->bd.cur = bdp; in fec_enet_txq_submit_skb()
717 writel(0, txq->bd.reg_desc_active); in fec_enet_txq_submit_skb()
734 status = fec16_to_cpu(bdp->cbd_sc); in fec_enet_txq_put_data_tso()
739 if (((unsigned long) data) & fep->tx_align || in fec_enet_txq_put_data_tso()
740 fep->quirks & FEC_QUIRK_SWAP_FRAME) { in fec_enet_txq_put_data_tso()
741 memcpy(txq->tx_bounce[index], data, size); in fec_enet_txq_put_data_tso()
742 data = txq->tx_bounce[index]; in fec_enet_txq_put_data_tso()
744 if (fep->quirks & FEC_QUIRK_SWAP_FRAME) in fec_enet_txq_put_data_tso()
748 addr = dma_map_single(&fep->pdev->dev, data, size, DMA_TO_DEVICE); in fec_enet_txq_put_data_tso()
749 if (dma_mapping_error(&fep->pdev->dev, addr)) { in fec_enet_txq_put_data_tso()
756 bdp->cbd_datlen = cpu_to_fec16(size); in fec_enet_txq_put_data_tso()
757 bdp->cbd_bufaddr = cpu_to_fec32(addr); in fec_enet_txq_put_data_tso()
759 if (fep->bufdesc_ex) { in fec_enet_txq_put_data_tso()
760 if (fep->quirks & FEC_QUIRK_HAS_AVB) in fec_enet_txq_put_data_tso()
761 estatus |= FEC_TX_BD_FTYPE(txq->bd.qid); in fec_enet_txq_put_data_tso()
762 if (skb->ip_summed == CHECKSUM_PARTIAL) in fec_enet_txq_put_data_tso()
764 ebdp->cbd_bdu = 0; in fec_enet_txq_put_data_tso()
765 ebdp->cbd_esc = cpu_to_fec32(estatus); in fec_enet_txq_put_data_tso()
768 /* Handle the last BD specially */ in fec_enet_txq_put_data_tso()
773 if (fep->bufdesc_ex) in fec_enet_txq_put_data_tso()
774 ebdp->cbd_esc |= cpu_to_fec32(BD_ENET_TX_INT); in fec_enet_txq_put_data_tso()
777 bdp->cbd_sc = cpu_to_fec16(status); in fec_enet_txq_put_data_tso()
795 status = fec16_to_cpu(bdp->cbd_sc); in fec_enet_txq_put_hdr_tso()
799 bufaddr = txq->tso_hdrs + index * TSO_HEADER_SIZE; in fec_enet_txq_put_hdr_tso()
800 dmabuf = txq->tso_hdrs_dma + index * TSO_HEADER_SIZE; in fec_enet_txq_put_hdr_tso()
801 if (((unsigned long)bufaddr) & fep->tx_align || in fec_enet_txq_put_hdr_tso()
802 fep->quirks & FEC_QUIRK_SWAP_FRAME) { in fec_enet_txq_put_hdr_tso()
803 memcpy(txq->tx_bounce[index], skb->data, hdr_len); in fec_enet_txq_put_hdr_tso()
804 bufaddr = txq->tx_bounce[index]; in fec_enet_txq_put_hdr_tso()
806 if (fep->quirks & FEC_QUIRK_SWAP_FRAME) in fec_enet_txq_put_hdr_tso()
809 dmabuf = dma_map_single(&fep->pdev->dev, bufaddr, in fec_enet_txq_put_hdr_tso()
811 if (dma_mapping_error(&fep->pdev->dev, dmabuf)) { in fec_enet_txq_put_hdr_tso()
819 bdp->cbd_bufaddr = cpu_to_fec32(dmabuf); in fec_enet_txq_put_hdr_tso()
820 bdp->cbd_datlen = cpu_to_fec16(hdr_len); in fec_enet_txq_put_hdr_tso()
822 if (fep->bufdesc_ex) { in fec_enet_txq_put_hdr_tso()
823 if (fep->quirks & FEC_QUIRK_HAS_AVB) in fec_enet_txq_put_hdr_tso()
824 estatus |= FEC_TX_BD_FTYPE(txq->bd.qid); in fec_enet_txq_put_hdr_tso()
825 if (skb->ip_summed == CHECKSUM_PARTIAL) in fec_enet_txq_put_hdr_tso()
827 ebdp->cbd_bdu = 0; in fec_enet_txq_put_hdr_tso()
828 ebdp->cbd_esc = cpu_to_fec32(estatus); in fec_enet_txq_put_hdr_tso()
831 bdp->cbd_sc = cpu_to_fec16(status); in fec_enet_txq_put_hdr_tso()
842 struct bufdesc *bdp = txq->bd.cur; in fec_enet_txq_submit_tso()
850 netdev_err(ndev, "NOT enough BD for TSO!\n"); in fec_enet_txq_submit_tso()
854 /* Protocol checksum off-load for TCP and UDP. */ in fec_enet_txq_submit_tso()
863 total_len = skb->len - hdr_len; in fec_enet_txq_submit_tso()
867 index = fec_enet_get_bd_index(bdp, &txq->bd); in fec_enet_txq_submit_tso()
868 data_left = min_t(int, skb_shinfo(skb)->gso_size, total_len); in fec_enet_txq_submit_tso()
869 total_len -= data_left; in fec_enet_txq_submit_tso()
872 hdr = txq->tso_hdrs + index * TSO_HEADER_SIZE; in fec_enet_txq_submit_tso()
882 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_txq_submit_tso()
883 index = fec_enet_get_bd_index(bdp, &txq->bd); in fec_enet_txq_submit_tso()
892 data_left -= size; in fec_enet_txq_submit_tso()
896 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_txq_submit_tso()
900 txq->tx_buf[index].buf_p = skb; in fec_enet_txq_submit_tso()
903 txq->bd.cur = bdp; in fec_enet_txq_submit_tso()
906 if (!(fep->quirks & FEC_QUIRK_ERR007885) || in fec_enet_txq_submit_tso()
907 !readl(txq->bd.reg_desc_active) || in fec_enet_txq_submit_tso()
908 !readl(txq->bd.reg_desc_active) || in fec_enet_txq_submit_tso()
909 !readl(txq->bd.reg_desc_active) || in fec_enet_txq_submit_tso()
910 !readl(txq->bd.reg_desc_active)) in fec_enet_txq_submit_tso()
911 writel(0, txq->bd.reg_desc_active); in fec_enet_txq_submit_tso()
931 txq = fep->tx_queue[queue]; in fec_enet_start_xmit()
942 if (entries_free <= txq->tx_stop_threshold) in fec_enet_start_xmit()
959 for (q = 0; q < fep->num_rx_queues; q++) { in fec_enet_bd_init()
961 rxq = fep->rx_queue[q]; in fec_enet_bd_init()
962 bdp = rxq->bd.base; in fec_enet_bd_init()
964 for (i = 0; i < rxq->bd.ring_size; i++) { in fec_enet_bd_init()
966 /* Initialize the BD for every fragment in the page. */ in fec_enet_bd_init()
967 if (bdp->cbd_bufaddr) in fec_enet_bd_init()
968 bdp->cbd_sc = cpu_to_fec16(BD_ENET_RX_EMPTY); in fec_enet_bd_init()
970 bdp->cbd_sc = cpu_to_fec16(0); in fec_enet_bd_init()
971 bdp = fec_enet_get_nextdesc(bdp, &rxq->bd); in fec_enet_bd_init()
975 bdp = fec_enet_get_prevdesc(bdp, &rxq->bd); in fec_enet_bd_init()
976 bdp->cbd_sc |= cpu_to_fec16(BD_SC_WRAP); in fec_enet_bd_init()
978 rxq->bd.cur = rxq->bd.base; in fec_enet_bd_init()
981 for (q = 0; q < fep->num_tx_queues; q++) { in fec_enet_bd_init()
983 txq = fep->tx_queue[q]; in fec_enet_bd_init()
984 bdp = txq->bd.base; in fec_enet_bd_init()
985 txq->bd.cur = bdp; in fec_enet_bd_init()
987 for (i = 0; i < txq->bd.ring_size; i++) { in fec_enet_bd_init()
988 /* Initialize the BD for every fragment in the page. */ in fec_enet_bd_init()
989 bdp->cbd_sc = cpu_to_fec16(0); in fec_enet_bd_init()
990 if (txq->tx_buf[i].type == FEC_TXBUF_T_SKB) { in fec_enet_bd_init()
991 if (bdp->cbd_bufaddr && in fec_enet_bd_init()
992 !IS_TSO_HEADER(txq, fec32_to_cpu(bdp->cbd_bufaddr))) in fec_enet_bd_init()
993 dma_unmap_single(&fep->pdev->dev, in fec_enet_bd_init()
994 fec32_to_cpu(bdp->cbd_bufaddr), in fec_enet_bd_init()
995 fec16_to_cpu(bdp->cbd_datlen), in fec_enet_bd_init()
997 if (txq->tx_buf[i].buf_p) in fec_enet_bd_init()
998 dev_kfree_skb_any(txq->tx_buf[i].buf_p); in fec_enet_bd_init()
999 } else if (txq->tx_buf[i].type == FEC_TXBUF_T_XDP_NDO) { in fec_enet_bd_init()
1000 if (bdp->cbd_bufaddr) in fec_enet_bd_init()
1001 dma_unmap_single(&fep->pdev->dev, in fec_enet_bd_init()
1002 fec32_to_cpu(bdp->cbd_bufaddr), in fec_enet_bd_init()
1003 fec16_to_cpu(bdp->cbd_datlen), in fec_enet_bd_init()
1006 if (txq->tx_buf[i].buf_p) in fec_enet_bd_init()
1007 xdp_return_frame(txq->tx_buf[i].buf_p); in fec_enet_bd_init()
1009 struct page *page = txq->tx_buf[i].buf_p; in fec_enet_bd_init()
1012 page_pool_put_page(page->pp, page, 0, false); in fec_enet_bd_init()
1015 txq->tx_buf[i].buf_p = NULL; in fec_enet_bd_init()
1017 txq->tx_buf[i].type = FEC_TXBUF_T_SKB; in fec_enet_bd_init()
1018 bdp->cbd_bufaddr = cpu_to_fec32(0); in fec_enet_bd_init()
1019 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_bd_init()
1023 bdp = fec_enet_get_prevdesc(bdp, &txq->bd); in fec_enet_bd_init()
1024 bdp->cbd_sc |= cpu_to_fec16(BD_SC_WRAP); in fec_enet_bd_init()
1025 txq->dirty_tx = bdp; in fec_enet_bd_init()
1034 for (i = 0; i < fep->num_rx_queues; i++) in fec_enet_active_rxring()
1035 writel(0, fep->rx_queue[i]->bd.reg_desc_active); in fec_enet_active_rxring()
1045 for (i = 0; i < fep->num_rx_queues; i++) { in fec_enet_enable_ring()
1046 rxq = fep->rx_queue[i]; in fec_enet_enable_ring()
1047 writel(rxq->bd.dma, fep->hwp + FEC_R_DES_START(i)); in fec_enet_enable_ring()
1048 writel(PKT_MAXBUF_SIZE, fep->hwp + FEC_R_BUFF_SIZE(i)); in fec_enet_enable_ring()
1053 fep->hwp + FEC_RCMR(i)); in fec_enet_enable_ring()
1056 for (i = 0; i < fep->num_tx_queues; i++) { in fec_enet_enable_ring()
1057 txq = fep->tx_queue[i]; in fec_enet_enable_ring()
1058 writel(txq->bd.dma, fep->hwp + FEC_X_DES_START(i)); in fec_enet_enable_ring()
1063 fep->hwp + FEC_DMA_CFG(i)); in fec_enet_enable_ring()
1080 if (fep->bufdesc_ex) in fec_restart()
1087 if (fep->quirks & FEC_QUIRK_HAS_MULTI_QUEUES || in fec_restart()
1088 ((fep->quirks & FEC_QUIRK_NO_HARD_RESET) && fep->link)) { in fec_restart()
1089 writel(0, fep->hwp + FEC_ECNTRL); in fec_restart()
1091 writel(1, fep->hwp + FEC_ECNTRL); in fec_restart()
1096 * enet-mac reset will reset mac address registers too, in fec_restart()
1099 memcpy(&temp_mac, ndev->dev_addr, ETH_ALEN); in fec_restart()
1101 fep->hwp + FEC_ADDR_LOW); in fec_restart()
1103 fep->hwp + FEC_ADDR_HIGH); in fec_restart()
1106 writel((0xffffffff & ~FEC_ENET_MII), fep->hwp + FEC_IEVENT); in fec_restart()
1113 if (fep->full_duplex == DUPLEX_FULL) { in fec_restart()
1115 writel(0x04, fep->hwp + FEC_X_CNTRL); in fec_restart()
1119 writel(0x0, fep->hwp + FEC_X_CNTRL); in fec_restart()
1123 writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED); in fec_restart()
1126 if (fep->quirks & FEC_QUIRK_HAS_RACC) { in fec_restart()
1127 u32 val = readl(fep->hwp + FEC_RACC); in fec_restart()
1131 if (fep->csum_flags & FLAG_RX_CSUM_ENABLED) in fec_restart()
1136 writel(val, fep->hwp + FEC_RACC); in fec_restart()
1137 writel(PKT_MAXBUF_SIZE, fep->hwp + FEC_FTRL); in fec_restart()
1143 * differently on enet-mac. in fec_restart()
1145 if (fep->quirks & FEC_QUIRK_ENET_MAC) { in fec_restart()
1150 if (fep->phy_interface == PHY_INTERFACE_MODE_RGMII || in fec_restart()
1151 fep->phy_interface == PHY_INTERFACE_MODE_RGMII_ID || in fec_restart()
1152 fep->phy_interface == PHY_INTERFACE_MODE_RGMII_RXID || in fec_restart()
1153 fep->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID) in fec_restart()
1155 else if (fep->phy_interface == PHY_INTERFACE_MODE_RMII) in fec_restart()
1161 if (ndev->phydev) { in fec_restart()
1162 if (ndev->phydev->speed == SPEED_1000) in fec_restart()
1164 else if (ndev->phydev->speed == SPEED_100) in fec_restart()
1171 if (fep->quirks & FEC_QUIRK_USE_GASKET) { in fec_restart()
1174 writel(0, fep->hwp + FEC_MIIGSK_ENR); in fec_restart()
1175 while (readl(fep->hwp + FEC_MIIGSK_ENR) & 4) in fec_restart()
1183 cfgr = (fep->phy_interface == PHY_INTERFACE_MODE_RMII) in fec_restart()
1185 if (ndev->phydev && ndev->phydev->speed == SPEED_10) in fec_restart()
1187 writel(cfgr, fep->hwp + FEC_MIIGSK_CFGR); in fec_restart()
1189 /* re-enable the gasket */ in fec_restart()
1190 writel(2, fep->hwp + FEC_MIIGSK_ENR); in fec_restart()
1197 if ((fep->pause_flag & FEC_PAUSE_FLAG_ENABLE) || in fec_restart()
1198 ((fep->pause_flag & FEC_PAUSE_FLAG_AUTONEG) && in fec_restart()
1199 ndev->phydev && ndev->phydev->pause)) { in fec_restart()
1203 writel(FEC_ENET_RSEM_V, fep->hwp + FEC_R_FIFO_RSEM); in fec_restart()
1204 writel(FEC_ENET_RSFL_V, fep->hwp + FEC_R_FIFO_RSFL); in fec_restart()
1205 writel(FEC_ENET_RAEM_V, fep->hwp + FEC_R_FIFO_RAEM); in fec_restart()
1206 writel(FEC_ENET_RAFL_V, fep->hwp + FEC_R_FIFO_RAFL); in fec_restart()
1209 writel(FEC_ENET_OPD_V, fep->hwp + FEC_OPD); in fec_restart()
1215 writel(rcntl, fep->hwp + FEC_R_CNTRL); in fec_restart()
1220 writel(0, fep->hwp + FEC_HASH_TABLE_HIGH); in fec_restart()
1221 writel(0, fep->hwp + FEC_HASH_TABLE_LOW); in fec_restart()
1224 if (fep->quirks & FEC_QUIRK_ENET_MAC) { in fec_restart()
1228 writel(FEC_TXWMRK_STRFWD, fep->hwp + FEC_X_WMRK); in fec_restart()
1231 if (fep->bufdesc_ex) in fec_restart()
1234 if (fep->quirks & FEC_QUIRK_DELAYED_CLKS_SUPPORT && in fec_restart()
1235 fep->rgmii_txc_dly) in fec_restart()
1237 if (fep->quirks & FEC_QUIRK_DELAYED_CLKS_SUPPORT && in fec_restart()
1238 fep->rgmii_rxc_dly) in fec_restart()
1243 writel(0 << 31, fep->hwp + FEC_MIB_CTRLSTAT); in fec_restart()
1247 writel(ecntl, fep->hwp + FEC_ECNTRL); in fec_restart()
1250 if (fep->bufdesc_ex) { in fec_restart()
1256 if (fep->link) in fec_restart()
1257 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK); in fec_restart()
1259 writel(0, fep->hwp + FEC_IMASK); in fec_restart()
1262 if (fep->quirks & FEC_QUIRK_HAS_COALESCE) in fec_restart()
1273 return imx_scu_get_handle(&fep->ipc_handle); in fec_enet_ipc_handle_init()
1278 struct device_node *np = fep->pdev->dev.of_node; in fec_enet_ipg_stop_set()
1282 if (!np || !fep->ipc_handle) in fec_enet_ipg_stop_set()
1291 imx_sc_misc_set_control(fep->ipc_handle, rsrc_id, IMX_SC_C_IPG_STOP, val); in fec_enet_ipg_stop_set()
1296 struct fec_platform_data *pdata = fep->pdev->dev.platform_data; in fec_enet_stop_mode()
1297 struct fec_stop_mode_gpr *stop_gpr = &fep->stop_gpr; in fec_enet_stop_mode()
1299 if (stop_gpr->gpr) { in fec_enet_stop_mode()
1301 regmap_update_bits(stop_gpr->gpr, stop_gpr->reg, in fec_enet_stop_mode()
1302 BIT(stop_gpr->bit), in fec_enet_stop_mode()
1303 BIT(stop_gpr->bit)); in fec_enet_stop_mode()
1305 regmap_update_bits(stop_gpr->gpr, stop_gpr->reg, in fec_enet_stop_mode()
1306 BIT(stop_gpr->bit), 0); in fec_enet_stop_mode()
1307 } else if (pdata && pdata->sleep_mode_enable) { in fec_enet_stop_mode()
1308 pdata->sleep_mode_enable(enabled); in fec_enet_stop_mode()
1318 writel(0, fep->hwp + FEC_IMASK); in fec_irqs_disable()
1325 writel(0, fep->hwp + FEC_IMASK); in fec_irqs_disable_except_wakeup()
1326 writel(FEC_ENET_WAKEUP, fep->hwp + FEC_IMASK); in fec_irqs_disable_except_wakeup()
1333 u32 rmii_mode = readl(fep->hwp + FEC_R_CNTRL) & FEC_RCR_RMII; in fec_stop()
1337 if (fep->link) { in fec_stop()
1338 writel(1, fep->hwp + FEC_X_CNTRL); /* Graceful transmit stop */ in fec_stop()
1340 if (!(readl(fep->hwp + FEC_IEVENT) & FEC_ENET_GRA)) in fec_stop()
1344 if (fep->bufdesc_ex) in fec_stop()
1351 if (!(fep->wol_flag & FEC_WOL_FLAG_SLEEP_ON)) { in fec_stop()
1352 if (fep->quirks & FEC_QUIRK_HAS_MULTI_QUEUES) { in fec_stop()
1353 writel(0, fep->hwp + FEC_ECNTRL); in fec_stop()
1355 writel(FEC_ECR_RESET, fep->hwp + FEC_ECNTRL); in fec_stop()
1359 val = readl(fep->hwp + FEC_ECNTRL); in fec_stop()
1361 writel(val, fep->hwp + FEC_ECNTRL); in fec_stop()
1363 writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED); in fec_stop()
1364 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK); in fec_stop()
1367 if (fep->quirks & FEC_QUIRK_ENET_MAC && in fec_stop()
1368 !(fep->wol_flag & FEC_WOL_FLAG_SLEEP_ON)) { in fec_stop()
1369 writel(FEC_ECR_ETHEREN, fep->hwp + FEC_ECNTRL); in fec_stop()
1370 writel(rmii_mode, fep->hwp + FEC_R_CNTRL); in fec_stop()
1373 if (fep->bufdesc_ex) { in fec_stop()
1374 val = readl(fep->hwp + FEC_ECNTRL); in fec_stop()
1376 writel(val, fep->hwp + FEC_ECNTRL); in fec_stop()
1390 ndev->stats.tx_errors++; in fec_timeout()
1392 schedule_work(&fep->tx_timeout_work); in fec_timeout()
1399 struct net_device *ndev = fep->netdev; in fec_enet_timeout_work()
1403 napi_disable(&fep->napi); in fec_enet_timeout_work()
1408 napi_enable(&fep->napi); in fec_enet_timeout_work()
1420 spin_lock_irqsave(&fep->tmreg_lock, flags); in fec_enet_hwtstamp()
1421 ns = timecounter_cyc2time(&fep->tc, ts); in fec_enet_hwtstamp()
1422 spin_unlock_irqrestore(&fep->tmreg_lock, flags); in fec_enet_hwtstamp()
1425 hwtstamps->hwtstamp = ns_to_ktime(ns); in fec_enet_hwtstamp()
1445 txq = fep->tx_queue[queue_id]; in fec_enet_tx_queue()
1448 bdp = txq->dirty_tx; in fec_enet_tx_queue()
1451 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_tx_queue()
1453 while (bdp != READ_ONCE(txq->bd.cur)) { in fec_enet_tx_queue()
1454 /* Order the load of bd.cur and cbd_sc */ in fec_enet_tx_queue()
1456 status = fec16_to_cpu(READ_ONCE(bdp->cbd_sc)); in fec_enet_tx_queue()
1460 index = fec_enet_get_bd_index(bdp, &txq->bd); in fec_enet_tx_queue()
1462 if (txq->tx_buf[index].type == FEC_TXBUF_T_SKB) { in fec_enet_tx_queue()
1463 skb = txq->tx_buf[index].buf_p; in fec_enet_tx_queue()
1464 if (bdp->cbd_bufaddr && in fec_enet_tx_queue()
1465 !IS_TSO_HEADER(txq, fec32_to_cpu(bdp->cbd_bufaddr))) in fec_enet_tx_queue()
1466 dma_unmap_single(&fep->pdev->dev, in fec_enet_tx_queue()
1467 fec32_to_cpu(bdp->cbd_bufaddr), in fec_enet_tx_queue()
1468 fec16_to_cpu(bdp->cbd_datlen), in fec_enet_tx_queue()
1470 bdp->cbd_bufaddr = cpu_to_fec32(0); in fec_enet_tx_queue()
1482 if (txq->tx_buf[index].type == FEC_TXBUF_T_XDP_NDO) { in fec_enet_tx_queue()
1483 xdpf = txq->tx_buf[index].buf_p; in fec_enet_tx_queue()
1484 if (bdp->cbd_bufaddr) in fec_enet_tx_queue()
1485 dma_unmap_single(&fep->pdev->dev, in fec_enet_tx_queue()
1486 fec32_to_cpu(bdp->cbd_bufaddr), in fec_enet_tx_queue()
1487 fec16_to_cpu(bdp->cbd_datlen), in fec_enet_tx_queue()
1490 page = txq->tx_buf[index].buf_p; in fec_enet_tx_queue()
1493 bdp->cbd_bufaddr = cpu_to_fec32(0); in fec_enet_tx_queue()
1494 if (unlikely(!txq->tx_buf[index].buf_p)) { in fec_enet_tx_queue()
1495 txq->tx_buf[index].type = FEC_TXBUF_T_SKB; in fec_enet_tx_queue()
1499 frame_len = fec16_to_cpu(bdp->cbd_datlen); in fec_enet_tx_queue()
1506 ndev->stats.tx_errors++; in fec_enet_tx_queue()
1508 ndev->stats.tx_heartbeat_errors++; in fec_enet_tx_queue()
1510 ndev->stats.tx_window_errors++; in fec_enet_tx_queue()
1512 ndev->stats.tx_aborted_errors++; in fec_enet_tx_queue()
1514 ndev->stats.tx_fifo_errors++; in fec_enet_tx_queue()
1516 ndev->stats.tx_carrier_errors++; in fec_enet_tx_queue()
1518 ndev->stats.tx_packets++; in fec_enet_tx_queue()
1520 if (txq->tx_buf[index].type == FEC_TXBUF_T_SKB) in fec_enet_tx_queue()
1521 ndev->stats.tx_bytes += skb->len; in fec_enet_tx_queue()
1523 ndev->stats.tx_bytes += frame_len; in fec_enet_tx_queue()
1530 ndev->stats.collisions++; in fec_enet_tx_queue()
1532 if (txq->tx_buf[index].type == FEC_TXBUF_T_SKB) { in fec_enet_tx_queue()
1537 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS && in fec_enet_tx_queue()
1538 fep->hwts_tx_en) && fep->bufdesc_ex) { in fec_enet_tx_queue()
1542 fec_enet_hwtstamp(fep, fec32_to_cpu(ebdp->ts), &shhwtstamps); in fec_enet_tx_queue()
1548 } else if (txq->tx_buf[index].type == FEC_TXBUF_T_XDP_NDO) { in fec_enet_tx_queue()
1552 page_pool_put_page(page->pp, page, 0, true); in fec_enet_tx_queue()
1555 txq->tx_buf[index].buf_p = NULL; in fec_enet_tx_queue()
1557 txq->tx_buf[index].type = FEC_TXBUF_T_SKB; in fec_enet_tx_queue()
1564 txq->dirty_tx = bdp; in fec_enet_tx_queue()
1567 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_tx_queue()
1573 if (entries_free >= txq->tx_wake_threshold) in fec_enet_tx_queue()
1579 if (bdp != txq->bd.cur && in fec_enet_tx_queue()
1580 readl(txq->bd.reg_desc_active) == 0) in fec_enet_tx_queue()
1581 writel(0, txq->bd.reg_desc_active); in fec_enet_tx_queue()
1590 for (i = fep->num_tx_queues - 1; i >= 0; i--) in fec_enet_tx()
1600 new_page = page_pool_dev_alloc_pages(rxq->page_pool); in fec_enet_update_cbd()
1602 rxq->rx_skb_info[index].page = new_page; in fec_enet_update_cbd()
1604 rxq->rx_skb_info[index].offset = FEC_ENET_XDP_HEADROOM; in fec_enet_update_cbd()
1606 bdp->cbd_bufaddr = cpu_to_fec32(phys_addr); in fec_enet_update_cbd()
1613 unsigned int sync, len = xdp->data_end - xdp->data; in fec_enet_run_xdp()
1624 sync = xdp->data_end - xdp->data; in fec_enet_run_xdp()
1629 rxq->stats[RX_XDP_PASS]++; in fec_enet_run_xdp()
1634 rxq->stats[RX_XDP_REDIRECT]++; in fec_enet_run_xdp()
1635 err = xdp_do_redirect(fep->netdev, xdp, prog); in fec_enet_run_xdp()
1643 rxq->stats[RX_XDP_TX]++; in fec_enet_run_xdp()
1646 rxq->stats[RX_XDP_TX_ERRORS]++; in fec_enet_run_xdp()
1654 bpf_warn_invalid_xdp_action(fep->netdev, prog, act); in fec_enet_run_xdp()
1661 rxq->stats[RX_XDP_DROP]++; in fec_enet_run_xdp()
1664 page = virt_to_head_page(xdp->data); in fec_enet_run_xdp()
1665 page_pool_put_page(rxq->page_pool, page, sync, true); in fec_enet_run_xdp()
1667 trace_xdp_exception(fep->netdev, prog, act); in fec_enet_run_xdp()
1694 bool need_swap = fep->quirks & FEC_QUIRK_SWAP_FRAME; in fec_enet_rx_queue()
1695 struct bpf_prog *xdp_prog = READ_ONCE(fep->xdp_prog); in fec_enet_rx_queue()
1707 if (fep->quirks & FEC_QUIRK_HAS_RACC) { in fec_enet_rx_queue()
1720 rxq = fep->rx_queue[queue_id]; in fec_enet_rx_queue()
1725 bdp = rxq->bd.cur; in fec_enet_rx_queue()
1726 xdp_init_buff(&xdp, PAGE_SIZE, &rxq->xdp_rxq); in fec_enet_rx_queue()
1728 while (!((status = fec16_to_cpu(bdp->cbd_sc)) & BD_ENET_RX_EMPTY)) { in fec_enet_rx_queue()
1734 writel(FEC_ENET_RXF_GET(queue_id), fep->hwp + FEC_IEVENT); in fec_enet_rx_queue()
1741 ndev->stats.rx_errors++; in fec_enet_rx_queue()
1744 ndev->stats.rx_fifo_errors++; in fec_enet_rx_queue()
1750 ndev->stats.rx_length_errors++; in fec_enet_rx_queue()
1755 ndev->stats.rx_crc_errors++; in fec_enet_rx_queue()
1758 ndev->stats.rx_frame_errors++; in fec_enet_rx_queue()
1763 ndev->stats.rx_packets++; in fec_enet_rx_queue()
1764 pkt_len = fec16_to_cpu(bdp->cbd_datlen); in fec_enet_rx_queue()
1765 ndev->stats.rx_bytes += pkt_len; in fec_enet_rx_queue()
1767 index = fec_enet_get_bd_index(bdp, &rxq->bd); in fec_enet_rx_queue()
1768 page = rxq->rx_skb_info[index].page; in fec_enet_rx_queue()
1769 dma_sync_single_for_cpu(&fep->pdev->dev, in fec_enet_rx_queue()
1770 fec32_to_cpu(bdp->cbd_bufaddr), in fec_enet_rx_queue()
1780 data_start, pkt_len - sub_len, false); in fec_enet_rx_queue()
1793 page_pool_recycle_direct(rxq->page_pool, page); in fec_enet_rx_queue()
1794 ndev->stats.rx_dropped++; in fec_enet_rx_queue()
1801 skb_put(skb, pkt_len - sub_len); in fec_enet_rx_queue()
1808 data = skb->data; in fec_enet_rx_queue()
1812 if (fep->bufdesc_ex) in fec_enet_rx_queue()
1817 if ((ndev->features & NETIF_F_HW_VLAN_CTAG_RX) && in fec_enet_rx_queue()
1818 fep->bufdesc_ex && in fec_enet_rx_queue()
1819 (ebdp->cbd_esc & cpu_to_fec32(BD_ENET_RX_VLAN))) { in fec_enet_rx_queue()
1823 vlan_tag = ntohs(vlan_header->h_vlan_TCI); in fec_enet_rx_queue()
1827 memmove(skb->data + VLAN_HLEN, data, ETH_ALEN * 2); in fec_enet_rx_queue()
1831 skb->protocol = eth_type_trans(skb, ndev); in fec_enet_rx_queue()
1834 if (fep->hwts_rx_en && fep->bufdesc_ex) in fec_enet_rx_queue()
1835 fec_enet_hwtstamp(fep, fec32_to_cpu(ebdp->ts), in fec_enet_rx_queue()
1838 if (fep->bufdesc_ex && in fec_enet_rx_queue()
1839 (fep->csum_flags & FLAG_RX_CSUM_ENABLED)) { in fec_enet_rx_queue()
1840 if (!(ebdp->cbd_esc & cpu_to_fec32(FLAG_RX_CSUM_ERROR))) { in fec_enet_rx_queue()
1842 skb->ip_summed = CHECKSUM_UNNECESSARY; in fec_enet_rx_queue()
1855 napi_gro_receive(&fep->napi, skb); in fec_enet_rx_queue()
1864 if (fep->bufdesc_ex) { in fec_enet_rx_queue()
1867 ebdp->cbd_esc = cpu_to_fec32(BD_ENET_RX_INT); in fec_enet_rx_queue()
1868 ebdp->cbd_prot = 0; in fec_enet_rx_queue()
1869 ebdp->cbd_bdu = 0; in fec_enet_rx_queue()
1875 bdp->cbd_sc = cpu_to_fec16(status); in fec_enet_rx_queue()
1877 /* Update BD pointer to next entry */ in fec_enet_rx_queue()
1878 bdp = fec_enet_get_nextdesc(bdp, &rxq->bd); in fec_enet_rx_queue()
1884 writel(0, rxq->bd.reg_desc_active); in fec_enet_rx_queue()
1886 rxq->bd.cur = bdp; in fec_enet_rx_queue()
1900 for (i = fep->num_rx_queues - 1; i >= 0; i--) in fec_enet_rx()
1901 done += fec_enet_rx_queue(ndev, budget - done, i); in fec_enet_rx()
1910 int_events = readl(fep->hwp + FEC_IEVENT); in fec_enet_collect_events()
1915 writel(int_events, fep->hwp + FEC_IEVENT); in fec_enet_collect_events()
1927 if (fec_enet_collect_events(fep) && fep->link) { in fec_enet_interrupt()
1930 if (napi_schedule_prep(&fep->napi)) { in fec_enet_interrupt()
1932 writel(0, fep->hwp + FEC_IMASK); in fec_enet_interrupt()
1933 __napi_schedule(&fep->napi); in fec_enet_interrupt()
1942 struct net_device *ndev = napi->dev; in fec_enet_rx_napi()
1947 done += fec_enet_rx(ndev, budget - done); in fec_enet_rx_napi()
1953 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK); in fec_enet_rx_napi()
1959 /* ------------------------------------------------------------------------- */
1967 * try to get mac address in following order: in fec_get_mac()
1978 struct device_node *np = fep->pdev->dev.of_node; in fec_get_mac()
1983 else if (ret == -EPROBE_DEFER) in fec_get_mac()
1996 struct fec_platform_data *pdata = dev_get_platdata(&fep->pdev->dev); in fec_get_mac()
1999 iap = (unsigned char *)&pdata->mac; in fec_get_mac()
2008 cpu_to_be32(readl(fep->hwp + FEC_ADDR_LOW)); in fec_get_mac()
2010 cpu_to_be16(readl(fep->hwp + FEC_ADDR_HIGH) >> 16); in fec_get_mac()
2015 * 5) random mac address in fec_get_mac()
2018 /* Report it and use a random ethernet address instead */ in fec_get_mac()
2019 dev_err(&fep->pdev->dev, "Invalid MAC address: %pM\n", iap); in fec_get_mac()
2021 dev_info(&fep->pdev->dev, "Using random MAC address: %pM\n", in fec_get_mac()
2022 ndev->dev_addr); in fec_get_mac()
2027 eth_hw_addr_gen(ndev, iap, iap == macaddr ? fep->dev_id : 0); in fec_get_mac()
2032 /* ------------------------------------------------------------------------- */
2045 return us * (fep->clk_ref_rate / 1000) / 1000; in fec_enet_us_to_tx_cycle()
2051 struct ethtool_keee *p = &fep->eee; in fec_enet_eee_mode_set()
2055 sleep_cycle = fec_enet_us_to_tx_cycle(ndev, p->tx_lpi_timer); in fec_enet_eee_mode_set()
2062 writel(sleep_cycle, fep->hwp + FEC_LPI_SLEEP); in fec_enet_eee_mode_set()
2063 writel(wake_cycle, fep->hwp + FEC_LPI_WAKE); in fec_enet_eee_mode_set()
2071 struct phy_device *phy_dev = ndev->phydev; in fec_enet_adjust_link()
2080 fep->link = 0; in fec_enet_adjust_link()
2081 } else if (phy_dev->link) { in fec_enet_adjust_link()
2082 if (!fep->link) { in fec_enet_adjust_link()
2083 fep->link = phy_dev->link; in fec_enet_adjust_link()
2087 if (fep->full_duplex != phy_dev->duplex) { in fec_enet_adjust_link()
2088 fep->full_duplex = phy_dev->duplex; in fec_enet_adjust_link()
2092 if (phy_dev->speed != fep->speed) { in fec_enet_adjust_link()
2093 fep->speed = phy_dev->speed; in fec_enet_adjust_link()
2100 napi_disable(&fep->napi); in fec_enet_adjust_link()
2105 napi_enable(&fep->napi); in fec_enet_adjust_link()
2107 if (fep->quirks & FEC_QUIRK_HAS_EEE) in fec_enet_adjust_link()
2108 fec_enet_eee_mode_set(ndev, phy_dev->enable_tx_lpi); in fec_enet_adjust_link()
2110 if (fep->link) { in fec_enet_adjust_link()
2112 napi_disable(&fep->napi); in fec_enet_adjust_link()
2116 napi_enable(&fep->napi); in fec_enet_adjust_link()
2117 fep->link = phy_dev->link; in fec_enet_adjust_link()
2131 ret = readl_poll_timeout_atomic(fep->hwp + FEC_IEVENT, ievent, in fec_enet_mdio_wait()
2135 writel(FEC_ENET_MII, fep->hwp + FEC_IEVENT); in fec_enet_mdio_wait()
2142 struct fec_enet_private *fep = bus->priv; in fec_enet_mdio_read_c22()
2143 struct device *dev = &fep->pdev->dev; in fec_enet_mdio_read_c22()
2158 FEC_MMFR_TA, fep->hwp + FEC_MII_DATA); in fec_enet_mdio_read_c22()
2163 netdev_err(fep->netdev, "MDIO read timeout\n"); in fec_enet_mdio_read_c22()
2167 ret = FEC_MMFR_DATA(readl(fep->hwp + FEC_MII_DATA)); in fec_enet_mdio_read_c22()
2179 struct fec_enet_private *fep = bus->priv; in fec_enet_mdio_read_c45()
2180 struct device *dev = &fep->pdev->dev; in fec_enet_mdio_read_c45()
2189 /* write address */ in fec_enet_mdio_read_c45()
2193 fep->hwp + FEC_MII_DATA); in fec_enet_mdio_read_c45()
2198 netdev_err(fep->netdev, "MDIO address write timeout\n"); in fec_enet_mdio_read_c45()
2207 FEC_MMFR_TA, fep->hwp + FEC_MII_DATA); in fec_enet_mdio_read_c45()
2212 netdev_err(fep->netdev, "MDIO read timeout\n"); in fec_enet_mdio_read_c45()
2216 ret = FEC_MMFR_DATA(readl(fep->hwp + FEC_MII_DATA)); in fec_enet_mdio_read_c45()
2228 struct fec_enet_private *fep = bus->priv; in fec_enet_mdio_write_c22()
2229 struct device *dev = &fep->pdev->dev; in fec_enet_mdio_write_c22()
2244 fep->hwp + FEC_MII_DATA); in fec_enet_mdio_write_c22()
2249 netdev_err(fep->netdev, "MDIO write timeout\n"); in fec_enet_mdio_write_c22()
2260 struct fec_enet_private *fep = bus->priv; in fec_enet_mdio_write_c45()
2261 struct device *dev = &fep->pdev->dev; in fec_enet_mdio_write_c45()
2270 /* write address */ in fec_enet_mdio_write_c45()
2274 fep->hwp + FEC_MII_DATA); in fec_enet_mdio_write_c45()
2279 netdev_err(fep->netdev, "MDIO address write timeout\n"); in fec_enet_mdio_write_c45()
2287 fep->hwp + FEC_MII_DATA); in fec_enet_mdio_write_c45()
2292 netdev_err(fep->netdev, "MDIO write timeout\n"); in fec_enet_mdio_write_c45()
2304 struct phy_device *phy_dev = ndev->phydev; in fec_enet_phy_reset_after_clk_enable()
2308 } else if (fep->phy_node) { in fec_enet_phy_reset_after_clk_enable()
2316 phy_dev = of_phy_find_device(fep->phy_node); in fec_enet_phy_reset_after_clk_enable()
2318 put_device(&phy_dev->mdio.dev); in fec_enet_phy_reset_after_clk_enable()
2328 ret = clk_prepare_enable(fep->clk_enet_out); in fec_enet_clk_enable()
2332 if (fep->clk_ptp) { in fec_enet_clk_enable()
2333 mutex_lock(&fep->ptp_clk_mutex); in fec_enet_clk_enable()
2334 ret = clk_prepare_enable(fep->clk_ptp); in fec_enet_clk_enable()
2336 mutex_unlock(&fep->ptp_clk_mutex); in fec_enet_clk_enable()
2339 fep->ptp_clk_on = true; in fec_enet_clk_enable()
2341 mutex_unlock(&fep->ptp_clk_mutex); in fec_enet_clk_enable()
2344 ret = clk_prepare_enable(fep->clk_ref); in fec_enet_clk_enable()
2348 ret = clk_prepare_enable(fep->clk_2x_txclk); in fec_enet_clk_enable()
2354 clk_disable_unprepare(fep->clk_enet_out); in fec_enet_clk_enable()
2355 if (fep->clk_ptp) { in fec_enet_clk_enable()
2356 mutex_lock(&fep->ptp_clk_mutex); in fec_enet_clk_enable()
2357 clk_disable_unprepare(fep->clk_ptp); in fec_enet_clk_enable()
2358 fep->ptp_clk_on = false; in fec_enet_clk_enable()
2359 mutex_unlock(&fep->ptp_clk_mutex); in fec_enet_clk_enable()
2361 clk_disable_unprepare(fep->clk_ref); in fec_enet_clk_enable()
2362 clk_disable_unprepare(fep->clk_2x_txclk); in fec_enet_clk_enable()
2368 if (fep->clk_ref) in fec_enet_clk_enable()
2369 clk_disable_unprepare(fep->clk_ref); in fec_enet_clk_enable()
2371 if (fep->clk_ptp) { in fec_enet_clk_enable()
2372 mutex_lock(&fep->ptp_clk_mutex); in fec_enet_clk_enable()
2373 clk_disable_unprepare(fep->clk_ptp); in fec_enet_clk_enable()
2374 fep->ptp_clk_on = false; in fec_enet_clk_enable()
2375 mutex_unlock(&fep->ptp_clk_mutex); in fec_enet_clk_enable()
2378 clk_disable_unprepare(fep->clk_enet_out); in fec_enet_clk_enable()
2389 if (!of_property_read_u32(np, "tx-internal-delay-ps", &rgmii_tx_delay)) { in fec_enet_parse_rgmii_delay()
2391 dev_err(&fep->pdev->dev, "The only allowed RGMII TX delay values are: 0ps, 2000ps"); in fec_enet_parse_rgmii_delay()
2392 return -EINVAL; in fec_enet_parse_rgmii_delay()
2394 fep->rgmii_txc_dly = true; in fec_enet_parse_rgmii_delay()
2399 if (!of_property_read_u32(np, "rx-internal-delay-ps", &rgmii_rx_delay)) { in fec_enet_parse_rgmii_delay()
2401 dev_err(&fep->pdev->dev, "The only allowed RGMII RX delay values are: 0ps, 2000ps"); in fec_enet_parse_rgmii_delay()
2402 return -EINVAL; in fec_enet_parse_rgmii_delay()
2404 fep->rgmii_rxc_dly = true; in fec_enet_parse_rgmii_delay()
2418 int dev_id = fep->dev_id; in fec_enet_mii_probe()
2420 if (fep->phy_node) { in fec_enet_mii_probe()
2421 phy_dev = of_phy_connect(ndev, fep->phy_node, in fec_enet_mii_probe()
2423 fep->phy_interface); in fec_enet_mii_probe()
2426 return -ENODEV; in fec_enet_mii_probe()
2431 if (!mdiobus_is_registered_device(fep->mii_bus, phy_id)) in fec_enet_mii_probe()
2433 if (dev_id--) in fec_enet_mii_probe()
2435 strscpy(mdio_bus_id, fep->mii_bus->id, MII_BUS_ID_SIZE); in fec_enet_mii_probe()
2441 strscpy(mdio_bus_id, "fixed-0", MII_BUS_ID_SIZE); in fec_enet_mii_probe()
2448 fep->phy_interface); in fec_enet_mii_probe()
2457 if (fep->quirks & FEC_QUIRK_HAS_GBIT) { in fec_enet_mii_probe()
2468 if (fep->quirks & FEC_QUIRK_HAS_EEE) in fec_enet_mii_probe()
2471 fep->link = 0; in fec_enet_mii_probe()
2472 fep->full_duplex = 0; in fec_enet_mii_probe()
2487 int err = -ENXIO; in fec_enet_mii_init()
2496 * - fec0 supports MII & RMII modes while fec1 only supports RMII in fec_enet_mii_init()
2497 * - fec0 acts as the 1588 time master while fec1 is slave in fec_enet_mii_init()
2498 * - external phys can only be configured by fec0 in fec_enet_mii_init()
2508 if ((fep->quirks & FEC_QUIRK_SINGLE_MDIO) && fep->dev_id > 0) { in fec_enet_mii_init()
2511 fep->mii_bus = fec0_mii_bus; in fec_enet_mii_init()
2515 return -ENOENT; in fec_enet_mii_init()
2519 node = of_get_child_by_name(pdev->dev.of_node, "mdio"); in fec_enet_mii_init()
2521 of_property_read_u32(node, "clock-frequency", &bus_freq); in fec_enet_mii_init()
2523 "suppress-preamble"); in fec_enet_mii_init()
2530 * for ENET-MAC is 'ref_freq / ((MII_SPEED + 1) x 2)'. The i.MX28 in fec_enet_mii_init()
2534 mii_speed = DIV_ROUND_UP(clk_get_rate(fep->clk_ipg), bus_freq * 2); in fec_enet_mii_init()
2535 if (fep->quirks & FEC_QUIRK_ENET_MAC) in fec_enet_mii_init()
2536 mii_speed--; in fec_enet_mii_init()
2538 dev_err(&pdev->dev, in fec_enet_mii_init()
2540 clk_get_rate(fep->clk_ipg)); in fec_enet_mii_init()
2541 err = -EINVAL; in fec_enet_mii_init()
2557 holdtime = DIV_ROUND_UP(clk_get_rate(fep->clk_ipg), 100000000) - 1; in fec_enet_mii_init()
2559 fep->phy_speed = mii_speed << 1 | holdtime << 8; in fec_enet_mii_init()
2562 fep->phy_speed |= BIT(7); in fec_enet_mii_init()
2564 if (fep->quirks & FEC_QUIRK_CLEAR_SETUP_MII) { in fec_enet_mii_init()
2567 * - writing MSCR: in fec_enet_mii_init()
2568 * - mmfr[31:0]_not_zero & mscr[7:0]_is_zero & in fec_enet_mii_init()
2570 * - writing MMFR: in fec_enet_mii_init()
2571 * - mscr[7:0]_not_zero in fec_enet_mii_init()
2573 writel(0, fep->hwp + FEC_MII_DATA); in fec_enet_mii_init()
2576 writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED); in fec_enet_mii_init()
2579 writel(FEC_ENET_MII, fep->hwp + FEC_IEVENT); in fec_enet_mii_init()
2581 fep->mii_bus = mdiobus_alloc(); in fec_enet_mii_init()
2582 if (fep->mii_bus == NULL) { in fec_enet_mii_init()
2583 err = -ENOMEM; in fec_enet_mii_init()
2587 fep->mii_bus->name = "fec_enet_mii_bus"; in fec_enet_mii_init()
2588 fep->mii_bus->read = fec_enet_mdio_read_c22; in fec_enet_mii_init()
2589 fep->mii_bus->write = fec_enet_mdio_write_c22; in fec_enet_mii_init()
2590 if (fep->quirks & FEC_QUIRK_HAS_MDIO_C45) { in fec_enet_mii_init()
2591 fep->mii_bus->read_c45 = fec_enet_mdio_read_c45; in fec_enet_mii_init()
2592 fep->mii_bus->write_c45 = fec_enet_mdio_write_c45; in fec_enet_mii_init()
2594 snprintf(fep->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x", in fec_enet_mii_init()
2595 pdev->name, fep->dev_id + 1); in fec_enet_mii_init()
2596 fep->mii_bus->priv = fep; in fec_enet_mii_init()
2597 fep->mii_bus->parent = &pdev->dev; in fec_enet_mii_init()
2599 err = of_mdiobus_register(fep->mii_bus, node); in fec_enet_mii_init()
2606 phydev = mdiobus_get_phy(fep->mii_bus, addr); in fec_enet_mii_init()
2608 phydev->mac_managed_pm = true; in fec_enet_mii_init()
2614 if (fep->quirks & FEC_QUIRK_SINGLE_MDIO) in fec_enet_mii_init()
2615 fec0_mii_bus = fep->mii_bus; in fec_enet_mii_init()
2620 mdiobus_free(fep->mii_bus); in fec_enet_mii_init()
2628 if (--mii_cnt == 0) { in fec_enet_mii_remove()
2629 mdiobus_unregister(fep->mii_bus); in fec_enet_mii_remove()
2630 mdiobus_free(fep->mii_bus); in fec_enet_mii_remove()
2639 strscpy(info->driver, fep->pdev->dev.driver->name, in fec_enet_get_drvinfo()
2640 sizeof(info->driver)); in fec_enet_get_drvinfo()
2641 strscpy(info->bus_info, dev_name(&ndev->dev), sizeof(info->bus_info)); in fec_enet_get_drvinfo()
2650 r = platform_get_resource(fep->pdev, IORESOURCE_MEM, 0); in fec_enet_get_regs_len()
2735 u32 __iomem *theregs = (u32 __iomem *)fep->hwp; in fec_enet_get_regs()
2736 struct device *dev = &fep->pdev->dev; in fec_enet_get_regs()
2762 regs->version = fec_enet_register_version; in fec_enet_get_regs()
2764 memset(buf, 0, regs->len); in fec_enet_get_regs()
2770 !(fep->quirks & FEC_QUIRK_HAS_FRREG)) in fec_enet_get_regs()
2786 if (fep->bufdesc_ex) { in fec_enet_get_ts_info()
2788 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | in fec_enet_get_ts_info()
2792 if (fep->ptp_clock) in fec_enet_get_ts_info()
2793 info->phc_index = ptp_clock_index(fep->ptp_clock); in fec_enet_get_ts_info()
2795 info->tx_types = (1 << HWTSTAMP_TX_OFF) | in fec_enet_get_ts_info()
2798 info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) | in fec_enet_get_ts_info()
2813 pause->autoneg = (fep->pause_flag & FEC_PAUSE_FLAG_AUTONEG) != 0; in fec_enet_get_pauseparam()
2814 pause->tx_pause = (fep->pause_flag & FEC_PAUSE_FLAG_ENABLE) != 0; in fec_enet_get_pauseparam()
2815 pause->rx_pause = pause->tx_pause; in fec_enet_get_pauseparam()
2823 if (!ndev->phydev) in fec_enet_set_pauseparam()
2824 return -ENODEV; in fec_enet_set_pauseparam()
2826 if (pause->tx_pause != pause->rx_pause) { in fec_enet_set_pauseparam()
2829 return -EINVAL; in fec_enet_set_pauseparam()
2832 fep->pause_flag = 0; in fec_enet_set_pauseparam()
2835 fep->pause_flag |= pause->rx_pause ? FEC_PAUSE_FLAG_ENABLE : 0; in fec_enet_set_pauseparam()
2836 fep->pause_flag |= pause->autoneg ? FEC_PAUSE_FLAG_AUTONEG : 0; in fec_enet_set_pauseparam()
2838 phy_set_sym_pause(ndev->phydev, pause->rx_pause, pause->tx_pause, in fec_enet_set_pauseparam()
2839 pause->autoneg); in fec_enet_set_pauseparam()
2841 if (pause->autoneg) { in fec_enet_set_pauseparam()
2844 phy_start_aneg(ndev->phydev); in fec_enet_set_pauseparam()
2847 napi_disable(&fep->napi); in fec_enet_set_pauseparam()
2852 napi_enable(&fep->napi); in fec_enet_set_pauseparam()
2942 fep->ethtool_stats[i] = readl(fep->hwp + fec_stats[i].offset); in fec_enet_update_ethtool_stats()
2951 for (i = fep->num_rx_queues - 1; i >= 0; i--) { in fec_enet_get_xdp_stats()
2952 rxq = fep->rx_queue[i]; in fec_enet_get_xdp_stats()
2955 xdp_stats[j] += rxq->stats[j]; in fec_enet_get_xdp_stats()
2968 for (i = fep->num_rx_queues - 1; i >= 0; i--) { in fec_enet_page_pool_stats()
2969 rxq = fep->rx_queue[i]; in fec_enet_page_pool_stats()
2971 if (!rxq->page_pool) in fec_enet_page_pool_stats()
2974 page_pool_get_stats(rxq->page_pool, &stats); in fec_enet_page_pool_stats()
2989 memcpy(data, fep->ethtool_stats, FEC_STATS_SIZE); in fec_enet_get_ethtool_stats()
3032 return -EOPNOTSUPP; in fec_enet_get_sset_count()
3043 writel(FEC_MIB_CTRLSTAT_DISABLE, fep->hwp + FEC_MIB_CTRLSTAT); in fec_enet_clear_ethtool_stats()
3046 writel(0, fep->hwp + fec_stats[i].offset); in fec_enet_clear_ethtool_stats()
3048 for (i = fep->num_rx_queues - 1; i >= 0; i--) { in fec_enet_clear_ethtool_stats()
3049 rxq = fep->rx_queue[i]; in fec_enet_clear_ethtool_stats()
3051 rxq->stats[j] = 0; in fec_enet_clear_ethtool_stats()
3055 writel(0, fep->hwp + FEC_MIB_CTRLSTAT); in fec_enet_clear_ethtool_stats()
3077 return us * (fep->itr_clk_rate / 64000) / 1000; in fec_enet_us_to_itr_clock()
3087 if (!fep->rx_time_itr || !fep->rx_pkts_itr || in fec_enet_itr_coal_set()
3088 !fep->tx_time_itr || !fep->tx_pkts_itr) in fec_enet_itr_coal_set()
3098 rx_itr |= FEC_ITR_ICFT(fep->rx_pkts_itr); in fec_enet_itr_coal_set()
3099 rx_itr |= FEC_ITR_ICTT(fec_enet_us_to_itr_clock(ndev, fep->rx_time_itr)); in fec_enet_itr_coal_set()
3100 tx_itr |= FEC_ITR_ICFT(fep->tx_pkts_itr); in fec_enet_itr_coal_set()
3101 tx_itr |= FEC_ITR_ICTT(fec_enet_us_to_itr_clock(ndev, fep->tx_time_itr)); in fec_enet_itr_coal_set()
3106 writel(tx_itr, fep->hwp + FEC_TXIC0); in fec_enet_itr_coal_set()
3107 writel(rx_itr, fep->hwp + FEC_RXIC0); in fec_enet_itr_coal_set()
3108 if (fep->quirks & FEC_QUIRK_HAS_MULTI_QUEUES) { in fec_enet_itr_coal_set()
3109 writel(tx_itr, fep->hwp + FEC_TXIC1); in fec_enet_itr_coal_set()
3110 writel(rx_itr, fep->hwp + FEC_RXIC1); in fec_enet_itr_coal_set()
3111 writel(tx_itr, fep->hwp + FEC_TXIC2); in fec_enet_itr_coal_set()
3112 writel(rx_itr, fep->hwp + FEC_RXIC2); in fec_enet_itr_coal_set()
3123 if (!(fep->quirks & FEC_QUIRK_HAS_COALESCE)) in fec_enet_get_coalesce()
3124 return -EOPNOTSUPP; in fec_enet_get_coalesce()
3126 ec->rx_coalesce_usecs = fep->rx_time_itr; in fec_enet_get_coalesce()
3127 ec->rx_max_coalesced_frames = fep->rx_pkts_itr; in fec_enet_get_coalesce()
3129 ec->tx_coalesce_usecs = fep->tx_time_itr; in fec_enet_get_coalesce()
3130 ec->tx_max_coalesced_frames = fep->tx_pkts_itr; in fec_enet_get_coalesce()
3141 struct device *dev = &fep->pdev->dev; in fec_enet_set_coalesce()
3144 if (!(fep->quirks & FEC_QUIRK_HAS_COALESCE)) in fec_enet_set_coalesce()
3145 return -EOPNOTSUPP; in fec_enet_set_coalesce()
3147 if (ec->rx_max_coalesced_frames > 255) { in fec_enet_set_coalesce()
3149 return -EINVAL; in fec_enet_set_coalesce()
3152 if (ec->tx_max_coalesced_frames > 255) { in fec_enet_set_coalesce()
3154 return -EINVAL; in fec_enet_set_coalesce()
3157 cycle = fec_enet_us_to_itr_clock(ndev, ec->rx_coalesce_usecs); in fec_enet_set_coalesce()
3160 return -EINVAL; in fec_enet_set_coalesce()
3163 cycle = fec_enet_us_to_itr_clock(ndev, ec->tx_coalesce_usecs); in fec_enet_set_coalesce()
3166 return -EINVAL; in fec_enet_set_coalesce()
3169 fep->rx_time_itr = ec->rx_coalesce_usecs; in fec_enet_set_coalesce()
3170 fep->rx_pkts_itr = ec->rx_max_coalesced_frames; in fec_enet_set_coalesce()
3172 fep->tx_time_itr = ec->tx_coalesce_usecs; in fec_enet_set_coalesce()
3173 fep->tx_pkts_itr = ec->tx_max_coalesced_frames; in fec_enet_set_coalesce()
3184 struct ethtool_keee *p = &fep->eee; in fec_enet_get_eee()
3186 if (!(fep->quirks & FEC_QUIRK_HAS_EEE)) in fec_enet_get_eee()
3187 return -EOPNOTSUPP; in fec_enet_get_eee()
3190 return -ENETDOWN; in fec_enet_get_eee()
3192 edata->tx_lpi_timer = p->tx_lpi_timer; in fec_enet_get_eee()
3194 return phy_ethtool_get_eee(ndev->phydev, edata); in fec_enet_get_eee()
3201 struct ethtool_keee *p = &fep->eee; in fec_enet_set_eee()
3203 if (!(fep->quirks & FEC_QUIRK_HAS_EEE)) in fec_enet_set_eee()
3204 return -EOPNOTSUPP; in fec_enet_set_eee()
3207 return -ENETDOWN; in fec_enet_set_eee()
3209 p->tx_lpi_timer = edata->tx_lpi_timer; in fec_enet_set_eee()
3211 return phy_ethtool_set_eee(ndev->phydev, edata); in fec_enet_set_eee()
3219 if (fep->wol_flag & FEC_WOL_HAS_MAGIC_PACKET) { in fec_enet_get_wol()
3220 wol->supported = WAKE_MAGIC; in fec_enet_get_wol()
3221 wol->wolopts = fep->wol_flag & FEC_WOL_FLAG_ENABLE ? WAKE_MAGIC : 0; in fec_enet_get_wol()
3223 wol->supported = wol->wolopts = 0; in fec_enet_get_wol()
3232 if (!(fep->wol_flag & FEC_WOL_HAS_MAGIC_PACKET)) in fec_enet_set_wol()
3233 return -EINVAL; in fec_enet_set_wol()
3235 if (wol->wolopts & ~WAKE_MAGIC) in fec_enet_set_wol()
3236 return -EINVAL; in fec_enet_set_wol()
3238 device_set_wakeup_enable(&ndev->dev, wol->wolopts & WAKE_MAGIC); in fec_enet_set_wol()
3239 if (device_may_wakeup(&ndev->dev)) in fec_enet_set_wol()
3240 fep->wol_flag |= FEC_WOL_FLAG_ENABLE; in fec_enet_set_wol()
3242 fep->wol_flag &= (~FEC_WOL_FLAG_ENABLE); in fec_enet_set_wol()
3282 for (q = 0; q < fep->num_rx_queues; q++) { in fec_enet_free_buffers()
3283 rxq = fep->rx_queue[q]; in fec_enet_free_buffers()
3284 for (i = 0; i < rxq->bd.ring_size; i++) in fec_enet_free_buffers()
3285 page_pool_put_full_page(rxq->page_pool, rxq->rx_skb_info[i].page, false); in fec_enet_free_buffers()
3288 rxq->stats[i] = 0; in fec_enet_free_buffers()
3290 if (xdp_rxq_info_is_reg(&rxq->xdp_rxq)) in fec_enet_free_buffers()
3291 xdp_rxq_info_unreg(&rxq->xdp_rxq); in fec_enet_free_buffers()
3292 page_pool_destroy(rxq->page_pool); in fec_enet_free_buffers()
3293 rxq->page_pool = NULL; in fec_enet_free_buffers()
3296 for (q = 0; q < fep->num_tx_queues; q++) { in fec_enet_free_buffers()
3297 txq = fep->tx_queue[q]; in fec_enet_free_buffers()
3298 for (i = 0; i < txq->bd.ring_size; i++) { in fec_enet_free_buffers()
3299 kfree(txq->tx_bounce[i]); in fec_enet_free_buffers()
3300 txq->tx_bounce[i] = NULL; in fec_enet_free_buffers()
3302 if (!txq->tx_buf[i].buf_p) { in fec_enet_free_buffers()
3303 txq->tx_buf[i].type = FEC_TXBUF_T_SKB; in fec_enet_free_buffers()
3307 if (txq->tx_buf[i].type == FEC_TXBUF_T_SKB) { in fec_enet_free_buffers()
3308 dev_kfree_skb(txq->tx_buf[i].buf_p); in fec_enet_free_buffers()
3309 } else if (txq->tx_buf[i].type == FEC_TXBUF_T_XDP_NDO) { in fec_enet_free_buffers()
3310 xdp_return_frame(txq->tx_buf[i].buf_p); in fec_enet_free_buffers()
3312 struct page *page = txq->tx_buf[i].buf_p; in fec_enet_free_buffers()
3314 page_pool_put_page(page->pp, page, 0, false); in fec_enet_free_buffers()
3317 txq->tx_buf[i].buf_p = NULL; in fec_enet_free_buffers()
3318 txq->tx_buf[i].type = FEC_TXBUF_T_SKB; in fec_enet_free_buffers()
3329 for (i = 0; i < fep->num_tx_queues; i++) in fec_enet_free_queue()
3330 if (fep->tx_queue[i] && fep->tx_queue[i]->tso_hdrs) { in fec_enet_free_queue()
3331 txq = fep->tx_queue[i]; in fec_enet_free_queue()
3332 fec_dma_free(&fep->pdev->dev, in fec_enet_free_queue()
3333 txq->bd.ring_size * TSO_HEADER_SIZE, in fec_enet_free_queue()
3334 txq->tso_hdrs, txq->tso_hdrs_dma); in fec_enet_free_queue()
3337 for (i = 0; i < fep->num_rx_queues; i++) in fec_enet_free_queue()
3338 kfree(fep->rx_queue[i]); in fec_enet_free_queue()
3339 for (i = 0; i < fep->num_tx_queues; i++) in fec_enet_free_queue()
3340 kfree(fep->tx_queue[i]); in fec_enet_free_queue()
3350 for (i = 0; i < fep->num_tx_queues; i++) { in fec_enet_alloc_queue()
3353 ret = -ENOMEM; in fec_enet_alloc_queue()
3357 fep->tx_queue[i] = txq; in fec_enet_alloc_queue()
3358 txq->bd.ring_size = TX_RING_SIZE; in fec_enet_alloc_queue()
3359 fep->total_tx_ring_size += fep->tx_queue[i]->bd.ring_size; in fec_enet_alloc_queue()
3361 txq->tx_stop_threshold = FEC_MAX_SKB_DESCS; in fec_enet_alloc_queue()
3362 txq->tx_wake_threshold = FEC_MAX_SKB_DESCS + 2 * MAX_SKB_FRAGS; in fec_enet_alloc_queue()
3364 txq->tso_hdrs = fec_dma_alloc(&fep->pdev->dev, in fec_enet_alloc_queue()
3365 txq->bd.ring_size * TSO_HEADER_SIZE, in fec_enet_alloc_queue()
3366 &txq->tso_hdrs_dma, GFP_KERNEL); in fec_enet_alloc_queue()
3367 if (!txq->tso_hdrs) { in fec_enet_alloc_queue()
3368 ret = -ENOMEM; in fec_enet_alloc_queue()
3373 for (i = 0; i < fep->num_rx_queues; i++) { in fec_enet_alloc_queue()
3374 fep->rx_queue[i] = kzalloc(sizeof(*fep->rx_queue[i]), in fec_enet_alloc_queue()
3376 if (!fep->rx_queue[i]) { in fec_enet_alloc_queue()
3377 ret = -ENOMEM; in fec_enet_alloc_queue()
3381 fep->rx_queue[i]->bd.ring_size = RX_RING_SIZE; in fec_enet_alloc_queue()
3382 fep->total_rx_ring_size += fep->rx_queue[i]->bd.ring_size; in fec_enet_alloc_queue()
3401 rxq = fep->rx_queue[queue]; in fec_enet_alloc_rxq_buffers()
3402 bdp = rxq->bd.base; in fec_enet_alloc_rxq_buffers()
3404 err = fec_enet_create_page_pool(fep, rxq, rxq->bd.ring_size); in fec_enet_alloc_rxq_buffers()
3410 for (i = 0; i < rxq->bd.ring_size; i++) { in fec_enet_alloc_rxq_buffers()
3411 page = page_pool_dev_alloc_pages(rxq->page_pool); in fec_enet_alloc_rxq_buffers()
3416 bdp->cbd_bufaddr = cpu_to_fec32(phys_addr); in fec_enet_alloc_rxq_buffers()
3418 rxq->rx_skb_info[i].page = page; in fec_enet_alloc_rxq_buffers()
3419 rxq->rx_skb_info[i].offset = FEC_ENET_XDP_HEADROOM; in fec_enet_alloc_rxq_buffers()
3420 bdp->cbd_sc = cpu_to_fec16(BD_ENET_RX_EMPTY); in fec_enet_alloc_rxq_buffers()
3422 if (fep->bufdesc_ex) { in fec_enet_alloc_rxq_buffers()
3424 ebdp->cbd_esc = cpu_to_fec32(BD_ENET_RX_INT); in fec_enet_alloc_rxq_buffers()
3427 bdp = fec_enet_get_nextdesc(bdp, &rxq->bd); in fec_enet_alloc_rxq_buffers()
3431 bdp = fec_enet_get_prevdesc(bdp, &rxq->bd); in fec_enet_alloc_rxq_buffers()
3432 bdp->cbd_sc |= cpu_to_fec16(BD_SC_WRAP); in fec_enet_alloc_rxq_buffers()
3437 return -ENOMEM; in fec_enet_alloc_rxq_buffers()
3448 txq = fep->tx_queue[queue]; in fec_enet_alloc_txq_buffers()
3449 bdp = txq->bd.base; in fec_enet_alloc_txq_buffers()
3450 for (i = 0; i < txq->bd.ring_size; i++) { in fec_enet_alloc_txq_buffers()
3451 txq->tx_bounce[i] = kmalloc(FEC_ENET_TX_FRSIZE, GFP_KERNEL); in fec_enet_alloc_txq_buffers()
3452 if (!txq->tx_bounce[i]) in fec_enet_alloc_txq_buffers()
3455 bdp->cbd_sc = cpu_to_fec16(0); in fec_enet_alloc_txq_buffers()
3456 bdp->cbd_bufaddr = cpu_to_fec32(0); in fec_enet_alloc_txq_buffers()
3458 if (fep->bufdesc_ex) { in fec_enet_alloc_txq_buffers()
3460 ebdp->cbd_esc = cpu_to_fec32(BD_ENET_TX_INT); in fec_enet_alloc_txq_buffers()
3463 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_alloc_txq_buffers()
3467 bdp = fec_enet_get_prevdesc(bdp, &txq->bd); in fec_enet_alloc_txq_buffers()
3468 bdp->cbd_sc |= cpu_to_fec16(BD_SC_WRAP); in fec_enet_alloc_txq_buffers()
3474 return -ENOMEM; in fec_enet_alloc_txq_buffers()
3482 for (i = 0; i < fep->num_rx_queues; i++) in fec_enet_alloc_buffers()
3484 return -ENOMEM; in fec_enet_alloc_buffers()
3486 for (i = 0; i < fep->num_tx_queues; i++) in fec_enet_alloc_buffers()
3488 return -ENOMEM; in fec_enet_alloc_buffers()
3499 ret = pm_runtime_resume_and_get(&fep->pdev->dev); in fec_enet_open()
3503 pinctrl_pm_select_default_state(&fep->pdev->dev); in fec_enet_open()
3514 if (ndev->phydev && ndev->phydev->drv) in fec_enet_open()
3541 if (fep->quirks & FEC_QUIRK_ERR006687) in fec_enet_open()
3544 if (fep->quirks & FEC_QUIRK_HAS_PMQOS) in fec_enet_open()
3545 cpu_latency_qos_add_request(&fep->pm_qos_req, 0); in fec_enet_open()
3547 napi_enable(&fep->napi); in fec_enet_open()
3548 phy_start(ndev->phydev); in fec_enet_open()
3551 device_set_wakeup_enable(&ndev->dev, fep->wol_flag & in fec_enet_open()
3561 pm_runtime_mark_last_busy(&fep->pdev->dev); in fec_enet_open()
3562 pm_runtime_put_autosuspend(&fep->pdev->dev); in fec_enet_open()
3563 pinctrl_pm_select_sleep_state(&fep->pdev->dev); in fec_enet_open()
3572 phy_stop(ndev->phydev); in fec_enet_close()
3575 napi_disable(&fep->napi); in fec_enet_close()
3580 phy_disconnect(ndev->phydev); in fec_enet_close()
3582 if (fep->quirks & FEC_QUIRK_ERR006687) in fec_enet_close()
3588 if (fep->quirks & FEC_QUIRK_HAS_PMQOS) in fec_enet_close()
3589 cpu_latency_qos_remove_request(&fep->pm_qos_req); in fec_enet_close()
3591 pinctrl_pm_select_sleep_state(&fep->pdev->dev); in fec_enet_close()
3592 pm_runtime_mark_last_busy(&fep->pdev->dev); in fec_enet_close()
3593 pm_runtime_put_autosuspend(&fep->pdev->dev); in fec_enet_close()
3603 * MAC address filtering. Some of the drivers check to make sure it is
3604 * a group multicast address, and discard those that are not. I guess I
3620 if (ndev->flags & IFF_PROMISC) { in set_multicast_list()
3621 tmp = readl(fep->hwp + FEC_R_CNTRL); in set_multicast_list()
3623 writel(tmp, fep->hwp + FEC_R_CNTRL); in set_multicast_list()
3627 tmp = readl(fep->hwp + FEC_R_CNTRL); in set_multicast_list()
3629 writel(tmp, fep->hwp + FEC_R_CNTRL); in set_multicast_list()
3631 if (ndev->flags & IFF_ALLMULTI) { in set_multicast_list()
3635 writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_HIGH); in set_multicast_list()
3636 writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_LOW); in set_multicast_list()
3643 /* calculate crc32 value of mac address */ in set_multicast_list()
3644 crc = ether_crc_le(ndev->addr_len, ha->addr); in set_multicast_list()
3649 hash = (crc >> (32 - FEC_HASH_BITS)) & 0x3f; in set_multicast_list()
3652 hash_high |= 1 << (hash - 32); in set_multicast_list()
3657 writel(hash_high, fep->hwp + FEC_GRP_HASH_TABLE_HIGH); in set_multicast_list()
3658 writel(hash_low, fep->hwp + FEC_GRP_HASH_TABLE_LOW); in set_multicast_list()
3669 if (!is_valid_ether_addr(addr->sa_data)) in fec_set_mac_address()
3670 return -EADDRNOTAVAIL; in fec_set_mac_address()
3671 eth_hw_addr_set(ndev, addr->sa_data); in fec_set_mac_address()
3682 writel(ndev->dev_addr[3] | (ndev->dev_addr[2] << 8) | in fec_set_mac_address()
3683 (ndev->dev_addr[1] << 16) | (ndev->dev_addr[0] << 24), in fec_set_mac_address()
3684 fep->hwp + FEC_ADDR_LOW); in fec_set_mac_address()
3685 writel((ndev->dev_addr[5] << 16) | (ndev->dev_addr[4] << 24), in fec_set_mac_address()
3686 fep->hwp + FEC_ADDR_HIGH); in fec_set_mac_address()
3694 netdev_features_t changed = features ^ netdev->features; in fec_enet_set_netdev_features()
3696 netdev->features = features; in fec_enet_set_netdev_features()
3701 fep->csum_flags |= FLAG_RX_CSUM_ENABLED; in fec_enet_set_netdev_features()
3703 fep->csum_flags &= ~FLAG_RX_CSUM_ENABLED; in fec_enet_set_netdev_features()
3711 netdev_features_t changed = features ^ netdev->features; in fec_set_features()
3714 napi_disable(&fep->napi); in fec_set_features()
3721 napi_enable(&fep->napi); in fec_set_features()
3735 if (!(fep->quirks & FEC_QUIRK_HAS_AVB)) in fec_enet_select_queue()
3739 if (eth_type_vlan(skb->protocol)) { in fec_enet_select_queue()
3742 vlan_tag = ntohs(vhdr->h_vlan_TCI); in fec_enet_select_queue()
3745 vlan_tag = skb->vlan_tci; in fec_enet_select_queue()
3759 switch (bpf->command) { in fec_enet_bpf()
3765 if (fep->quirks & FEC_QUIRK_SWAP_FRAME) in fec_enet_bpf()
3766 return -EOPNOTSUPP; in fec_enet_bpf()
3768 if (!bpf->prog) in fec_enet_bpf()
3772 napi_disable(&fep->napi); in fec_enet_bpf()
3776 old_prog = xchg(&fep->xdp_prog, bpf->prog); in fec_enet_bpf()
3783 napi_enable(&fep->napi); in fec_enet_bpf()
3787 if (bpf->prog) in fec_enet_bpf()
3793 return -EOPNOTSUPP; in fec_enet_bpf()
3796 return -EOPNOTSUPP; in fec_enet_bpf()
3806 return (index % fep->num_tx_queues); in fec_enet_xdp_get_tx_queue()
3822 netdev_err_once(fep->netdev, "NOT enough BD for SG!\n"); in fec_enet_txq_xmit_frame()
3823 return -EBUSY; in fec_enet_txq_xmit_frame()
3827 bdp = txq->bd.cur; in fec_enet_txq_xmit_frame()
3828 status = fec16_to_cpu(bdp->cbd_sc); in fec_enet_txq_xmit_frame()
3831 index = fec_enet_get_bd_index(bdp, &txq->bd); in fec_enet_txq_xmit_frame()
3836 dma_addr = dma_map_single(&fep->pdev->dev, xdpf->data, in fec_enet_txq_xmit_frame()
3837 xdpf->len, DMA_TO_DEVICE); in fec_enet_txq_xmit_frame()
3838 if (dma_mapping_error(&fep->pdev->dev, dma_addr)) in fec_enet_txq_xmit_frame()
3839 return -ENOMEM; in fec_enet_txq_xmit_frame()
3841 frame_len = xdpf->len; in fec_enet_txq_xmit_frame()
3842 txq->tx_buf[index].buf_p = xdpf; in fec_enet_txq_xmit_frame()
3843 txq->tx_buf[index].type = FEC_TXBUF_T_XDP_NDO; in fec_enet_txq_xmit_frame()
3848 page = virt_to_page(xdpb->data); in fec_enet_txq_xmit_frame()
3850 (xdpb->data - xdpb->data_hard_start); in fec_enet_txq_xmit_frame()
3851 dma_sync_single_for_device(&fep->pdev->dev, dma_addr, in fec_enet_txq_xmit_frame()
3853 frame_len = xdpb->data_end - xdpb->data; in fec_enet_txq_xmit_frame()
3854 txq->tx_buf[index].buf_p = page; in fec_enet_txq_xmit_frame()
3855 txq->tx_buf[index].type = FEC_TXBUF_T_XDP_TX; in fec_enet_txq_xmit_frame()
3859 if (fep->bufdesc_ex) in fec_enet_txq_xmit_frame()
3862 bdp->cbd_bufaddr = cpu_to_fec32(dma_addr); in fec_enet_txq_xmit_frame()
3863 bdp->cbd_datlen = cpu_to_fec16(frame_len); in fec_enet_txq_xmit_frame()
3865 if (fep->bufdesc_ex) { in fec_enet_txq_xmit_frame()
3868 if (fep->quirks & FEC_QUIRK_HAS_AVB) in fec_enet_txq_xmit_frame()
3869 estatus |= FEC_TX_BD_FTYPE(txq->bd.qid); in fec_enet_txq_xmit_frame()
3871 ebdp->cbd_bdu = 0; in fec_enet_txq_xmit_frame()
3872 ebdp->cbd_esc = cpu_to_fec32(estatus); in fec_enet_txq_xmit_frame()
3881 * it's the last BD of the frame, and to put the CRC on the end. in fec_enet_txq_xmit_frame()
3884 bdp->cbd_sc = cpu_to_fec16(status); in fec_enet_txq_xmit_frame()
3886 /* If this was the last BD in the ring, start at the beginning again. */ in fec_enet_txq_xmit_frame()
3887 bdp = fec_enet_get_nextdesc(bdp, &txq->bd); in fec_enet_txq_xmit_frame()
3889 /* Make sure the update to bdp are performed before txq->bd.cur. */ in fec_enet_txq_xmit_frame()
3892 txq->bd.cur = bdp; in fec_enet_txq_xmit_frame()
3895 writel(0, txq->bd.reg_desc_active); in fec_enet_txq_xmit_frame()
3909 txq = fep->tx_queue[queue]; in fec_enet_xdp_tx_xmit()
3910 nq = netdev_get_tx_queue(fep->netdev, queue); in fec_enet_xdp_tx_xmit()
3937 txq = fep->tx_queue[queue]; in fec_enet_xdp_xmit()
3938 nq = netdev_get_tx_queue(fep->netdev, queue); in fec_enet_xdp_xmit()
3961 return -EINVAL; in fec_hwtstamp_get()
3963 if (!fep->bufdesc_ex) in fec_hwtstamp_get()
3964 return -EOPNOTSUPP; in fec_hwtstamp_get()
3978 return -EINVAL; in fec_hwtstamp_set()
3980 if (!fep->bufdesc_ex) in fec_hwtstamp_set()
3981 return -EOPNOTSUPP; in fec_hwtstamp_set()
4022 unsigned dsize = fep->bufdesc_ex ? sizeof(struct bufdesc_ex) : in fec_enet_init()
4029 fep->rx_align = 0xf; in fec_enet_init()
4030 fep->tx_align = 0xf; in fec_enet_init()
4032 fep->rx_align = 0x3; in fec_enet_init()
4033 fep->tx_align = 0x3; in fec_enet_init()
4035 fep->rx_pkts_itr = FEC_ITR_ICFT_DEFAULT; in fec_enet_init()
4036 fep->tx_pkts_itr = FEC_ITR_ICFT_DEFAULT; in fec_enet_init()
4037 fep->rx_time_itr = FEC_ITR_ICTT_DEFAULT; in fec_enet_init()
4038 fep->tx_time_itr = FEC_ITR_ICTT_DEFAULT; in fec_enet_init()
4041 ret = dma_set_mask_and_coherent(&fep->pdev->dev, DMA_BIT_MASK(32)); in fec_enet_init()
4043 dev_warn(&fep->pdev->dev, "No suitable DMA available\n"); in fec_enet_init()
4051 bd_size = (fep->total_tx_ring_size + fep->total_rx_ring_size) * dsize; in fec_enet_init()
4054 cbd_base = fec_dmam_alloc(&fep->pdev->dev, bd_size, &bd_dma, in fec_enet_init()
4057 ret = -ENOMEM; in fec_enet_init()
4061 /* Get the Ethernet address */ in fec_enet_init()
4067 for (i = 0; i < fep->num_rx_queues; i++) { in fec_enet_init()
4068 struct fec_enet_priv_rx_q *rxq = fep->rx_queue[i]; in fec_enet_init()
4069 unsigned size = dsize * rxq->bd.ring_size; in fec_enet_init()
4071 rxq->bd.qid = i; in fec_enet_init()
4072 rxq->bd.base = cbd_base; in fec_enet_init()
4073 rxq->bd.cur = cbd_base; in fec_enet_init()
4074 rxq->bd.dma = bd_dma; in fec_enet_init()
4075 rxq->bd.dsize = dsize; in fec_enet_init()
4076 rxq->bd.dsize_log2 = dsize_log2; in fec_enet_init()
4077 rxq->bd.reg_desc_active = fep->hwp + offset_des_active_rxq[i]; in fec_enet_init()
4080 rxq->bd.last = (struct bufdesc *)(((void *)cbd_base) - dsize); in fec_enet_init()
4083 for (i = 0; i < fep->num_tx_queues; i++) { in fec_enet_init()
4084 struct fec_enet_priv_tx_q *txq = fep->tx_queue[i]; in fec_enet_init()
4085 unsigned size = dsize * txq->bd.ring_size; in fec_enet_init()
4087 txq->bd.qid = i; in fec_enet_init()
4088 txq->bd.base = cbd_base; in fec_enet_init()
4089 txq->bd.cur = cbd_base; in fec_enet_init()
4090 txq->bd.dma = bd_dma; in fec_enet_init()
4091 txq->bd.dsize = dsize; in fec_enet_init()
4092 txq->bd.dsize_log2 = dsize_log2; in fec_enet_init()
4093 txq->bd.reg_desc_active = fep->hwp + offset_des_active_txq[i]; in fec_enet_init()
4096 txq->bd.last = (struct bufdesc *)(((void *)cbd_base) - dsize); in fec_enet_init()
4101 ndev->watchdog_timeo = TX_TIMEOUT; in fec_enet_init()
4102 ndev->netdev_ops = &fec_netdev_ops; in fec_enet_init()
4103 ndev->ethtool_ops = &fec_enet_ethtool_ops; in fec_enet_init()
4105 writel(FEC_RX_DISABLED_IMASK, fep->hwp + FEC_IMASK); in fec_enet_init()
4106 netif_napi_add(ndev, &fep->napi, fec_enet_rx_napi); in fec_enet_init()
4108 if (fep->quirks & FEC_QUIRK_HAS_VLAN) in fec_enet_init()
4110 ndev->features |= NETIF_F_HW_VLAN_CTAG_RX; in fec_enet_init()
4112 if (fep->quirks & FEC_QUIRK_HAS_CSUM) { in fec_enet_init()
4116 ndev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM in fec_enet_init()
4118 fep->csum_flags |= FLAG_RX_CSUM_ENABLED; in fec_enet_init()
4121 if (fep->quirks & FEC_QUIRK_HAS_MULTI_QUEUES) { in fec_enet_init()
4122 fep->tx_align = 0; in fec_enet_init()
4123 fep->rx_align = 0x3f; in fec_enet_init()
4126 ndev->hw_features = ndev->features; in fec_enet_init()
4128 if (!(fep->quirks & FEC_QUIRK_SWAP_FRAME)) in fec_enet_init()
4129 ndev->xdp_features = NETDEV_XDP_ACT_BASIC | in fec_enet_init()
4134 if (fep->quirks & FEC_QUIRK_MIB_CLEAR) in fec_enet_init()
4150 netif_napi_del(&fep->napi); in fec_enet_deinit()
4159 struct device_node *np = pdev->dev.of_node; in fec_reset_phy()
4165 err = of_property_read_u32(np, "phy-reset-duration", &msec); in fec_reset_phy()
4170 err = of_property_read_u32(np, "phy-reset-post-delay", &phy_post_delay); in fec_reset_phy()
4173 return -EINVAL; in fec_reset_phy()
4175 phy_reset = devm_gpiod_get_optional(&pdev->dev, "phy-reset", in fec_reset_phy()
4178 return dev_err_probe(&pdev->dev, PTR_ERR(phy_reset), in fec_reset_phy()
4179 "failed to get phy-reset-gpios\n"); in fec_reset_phy()
4216 struct device_node *np = pdev->dev.of_node; in fec_enet_get_queue_num()
4224 of_property_read_u32(np, "fsl,num-tx-queues", num_tx); in fec_enet_get_queue_num()
4226 of_property_read_u32(np, "fsl,num-rx-queues", num_rx); in fec_enet_get_queue_num()
4229 dev_warn(&pdev->dev, "Invalid num_tx(=%d), fall back to 1\n", in fec_enet_get_queue_num()
4236 dev_warn(&pdev->dev, "Invalid num_rx(=%d), fall back to 1\n", in fec_enet_get_queue_num()
4262 if (fep->quirks & FEC_QUIRK_WAKEUP_FROM_INT2) in fec_enet_get_wakeup_irq()
4263 fep->wake_irq = fep->irq[2]; in fec_enet_get_wakeup_irq()
4265 fep->wake_irq = fep->irq[0]; in fec_enet_get_wakeup_irq()
4275 gpr_np = of_parse_phandle(np, "fsl,stop-mode", 0); in fec_enet_init_stop_mode()
4279 ret = of_property_read_u32_array(np, "fsl,stop-mode", out_val, in fec_enet_init_stop_mode()
4282 dev_dbg(&fep->pdev->dev, "no stop mode property\n"); in fec_enet_init_stop_mode()
4286 fep->stop_gpr.gpr = syscon_node_to_regmap(gpr_np); in fec_enet_init_stop_mode()
4287 if (IS_ERR(fep->stop_gpr.gpr)) { in fec_enet_init_stop_mode()
4288 dev_err(&fep->pdev->dev, "could not find gpr regmap\n"); in fec_enet_init_stop_mode()
4289 ret = PTR_ERR(fep->stop_gpr.gpr); in fec_enet_init_stop_mode()
4290 fep->stop_gpr.gpr = NULL; in fec_enet_init_stop_mode()
4294 fep->stop_gpr.reg = out_val[1]; in fec_enet_init_stop_mode()
4295 fep->stop_gpr.bit = out_val[2]; in fec_enet_init_stop_mode()
4312 struct device_node *np = pdev->dev.of_node, *phy_node; in fec_probe()
4325 return -ENOMEM; in fec_probe()
4327 SET_NETDEV_DEV(ndev, &pdev->dev); in fec_probe()
4332 dev_info = device_get_match_data(&pdev->dev); in fec_probe()
4334 dev_info = (const struct fec_devinfo *)pdev->id_entry->driver_data; in fec_probe()
4336 fep->quirks = dev_info->quirks; in fec_probe()
4338 fep->netdev = ndev; in fec_probe()
4339 fep->num_rx_queues = num_rx_qs; in fec_probe()
4340 fep->num_tx_queues = num_tx_qs; in fec_probe()
4344 if (fep->quirks & FEC_QUIRK_HAS_GBIT) in fec_probe()
4345 fep->pause_flag |= FEC_PAUSE_FLAG_AUTONEG; in fec_probe()
4349 pinctrl_pm_select_default_state(&pdev->dev); in fec_probe()
4351 fep->hwp = devm_platform_ioremap_resource(pdev, 0); in fec_probe()
4352 if (IS_ERR(fep->hwp)) { in fec_probe()
4353 ret = PTR_ERR(fep->hwp); in fec_probe()
4357 fep->pdev = pdev; in fec_probe()
4358 fep->dev_id = dev_id++; in fec_probe()
4364 !of_property_read_bool(np, "fsl,err006687-workaround-present")) in fec_probe()
4365 fep->quirks |= FEC_QUIRK_ERR006687; in fec_probe()
4371 if (of_property_read_bool(np, "fsl,magic-packet")) in fec_probe()
4372 fep->wol_flag |= FEC_WOL_HAS_MAGIC_PACKET; in fec_probe()
4378 phy_node = of_parse_phandle(np, "phy-handle", 0); in fec_probe()
4382 dev_err(&pdev->dev, in fec_probe()
4383 "broken fixed-link specification\n"); in fec_probe()
4388 fep->phy_node = phy_node; in fec_probe()
4390 ret = of_get_phy_mode(pdev->dev.of_node, &interface); in fec_probe()
4392 pdata = dev_get_platdata(&pdev->dev); in fec_probe()
4394 fep->phy_interface = pdata->phy; in fec_probe()
4396 fep->phy_interface = PHY_INTERFACE_MODE_MII; in fec_probe()
4398 fep->phy_interface = interface; in fec_probe()
4405 fep->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); in fec_probe()
4406 if (IS_ERR(fep->clk_ipg)) { in fec_probe()
4407 ret = PTR_ERR(fep->clk_ipg); in fec_probe()
4411 fep->clk_ahb = devm_clk_get(&pdev->dev, "ahb"); in fec_probe()
4412 if (IS_ERR(fep->clk_ahb)) { in fec_probe()
4413 ret = PTR_ERR(fep->clk_ahb); in fec_probe()
4417 fep->itr_clk_rate = clk_get_rate(fep->clk_ahb); in fec_probe()
4420 fep->clk_enet_out = devm_clk_get_optional(&pdev->dev, "enet_out"); in fec_probe()
4421 if (IS_ERR(fep->clk_enet_out)) { in fec_probe()
4422 ret = PTR_ERR(fep->clk_enet_out); in fec_probe()
4426 fep->ptp_clk_on = false; in fec_probe()
4427 mutex_init(&fep->ptp_clk_mutex); in fec_probe()
4430 fep->clk_ref = devm_clk_get_optional(&pdev->dev, "enet_clk_ref"); in fec_probe()
4431 if (IS_ERR(fep->clk_ref)) { in fec_probe()
4432 ret = PTR_ERR(fep->clk_ref); in fec_probe()
4435 fep->clk_ref_rate = clk_get_rate(fep->clk_ref); in fec_probe()
4438 if (fep->rgmii_txc_dly || fep->rgmii_rxc_dly) { in fec_probe()
4439 fep->clk_2x_txclk = devm_clk_get(&pdev->dev, "enet_2x_txclk"); in fec_probe()
4440 if (IS_ERR(fep->clk_2x_txclk)) in fec_probe()
4441 fep->clk_2x_txclk = NULL; in fec_probe()
4444 fep->bufdesc_ex = fep->quirks & FEC_QUIRK_HAS_BUFDESC_EX; in fec_probe()
4445 fep->clk_ptp = devm_clk_get(&pdev->dev, "ptp"); in fec_probe()
4446 if (IS_ERR(fep->clk_ptp)) { in fec_probe()
4447 fep->clk_ptp = NULL; in fec_probe()
4448 fep->bufdesc_ex = false; in fec_probe()
4455 ret = clk_prepare_enable(fep->clk_ipg); in fec_probe()
4458 ret = clk_prepare_enable(fep->clk_ahb); in fec_probe()
4462 fep->reg_phy = devm_regulator_get_optional(&pdev->dev, "phy"); in fec_probe()
4463 if (!IS_ERR(fep->reg_phy)) { in fec_probe()
4464 ret = regulator_enable(fep->reg_phy); in fec_probe()
4466 dev_err(&pdev->dev, in fec_probe()
4471 if (PTR_ERR(fep->reg_phy) == -EPROBE_DEFER) { in fec_probe()
4472 ret = -EPROBE_DEFER; in fec_probe()
4475 fep->reg_phy = NULL; in fec_probe()
4478 pm_runtime_set_autosuspend_delay(&pdev->dev, FEC_MDIO_PM_TIMEOUT); in fec_probe()
4479 pm_runtime_use_autosuspend(&pdev->dev); in fec_probe()
4480 pm_runtime_get_noresume(&pdev->dev); in fec_probe()
4481 pm_runtime_set_active(&pdev->dev); in fec_probe()
4482 pm_runtime_enable(&pdev->dev); in fec_probe()
4489 if (fep->bufdesc_ex) in fec_probe()
4505 ret = devm_request_irq(&pdev->dev, irq, fec_enet_interrupt, in fec_probe()
4506 0, pdev->name, ndev); in fec_probe()
4510 fep->irq[i] = irq; in fec_probe()
4523 pinctrl_pm_select_sleep_state(&pdev->dev); in fec_probe()
4525 ndev->max_mtu = PKT_MAXBUF_SIZE - ETH_HLEN - ETH_FCS_LEN; in fec_probe()
4531 device_init_wakeup(&ndev->dev, fep->wol_flag & in fec_probe()
4534 if (fep->bufdesc_ex && fep->ptp_clock) in fec_probe()
4535 netdev_info(ndev, "registered PHC device %d\n", fep->dev_id); in fec_probe()
4537 INIT_WORK(&fep->tx_timeout_work, fec_enet_timeout_work); in fec_probe()
4539 pm_runtime_mark_last_busy(&pdev->dev); in fec_probe()
4540 pm_runtime_put_autosuspend(&pdev->dev); in fec_probe()
4552 pm_runtime_put_noidle(&pdev->dev); in fec_probe()
4553 pm_runtime_disable(&pdev->dev); in fec_probe()
4554 if (fep->reg_phy) in fec_probe()
4555 regulator_disable(fep->reg_phy); in fec_probe()
4557 clk_disable_unprepare(fep->clk_ahb); in fec_probe()
4559 clk_disable_unprepare(fep->clk_ipg); in fec_probe()
4570 dev_id--; in fec_probe()
4582 struct device_node *np = pdev->dev.of_node; in fec_drv_remove()
4585 ret = pm_runtime_get_sync(&pdev->dev); in fec_drv_remove()
4587 dev_err(&pdev->dev, in fec_drv_remove()
4591 cancel_work_sync(&fep->tx_timeout_work); in fec_drv_remove()
4595 if (fep->reg_phy) in fec_drv_remove()
4596 regulator_disable(fep->reg_phy); in fec_drv_remove()
4600 of_node_put(fep->phy_node); in fec_drv_remove()
4606 clk_disable_unprepare(fep->clk_ahb); in fec_drv_remove()
4607 clk_disable_unprepare(fep->clk_ipg); in fec_drv_remove()
4609 pm_runtime_put_noidle(&pdev->dev); in fec_drv_remove()
4610 pm_runtime_disable(&pdev->dev); in fec_drv_remove()
4624 if (fep->wol_flag & FEC_WOL_FLAG_ENABLE) in fec_suspend()
4625 fep->wol_flag |= FEC_WOL_FLAG_SLEEP_ON; in fec_suspend()
4626 phy_stop(ndev->phydev); in fec_suspend()
4627 napi_disable(&fep->napi); in fec_suspend()
4632 if (!(fep->wol_flag & FEC_WOL_FLAG_ENABLE)) { in fec_suspend()
4634 pinctrl_pm_select_sleep_state(&fep->pdev->dev); in fec_suspend()
4637 if (fep->wake_irq > 0) { in fec_suspend()
4638 disable_irq(fep->wake_irq); in fec_suspend()
4639 enable_irq_wake(fep->wake_irq); in fec_suspend()
4646 fep->rpm_active = !pm_runtime_status_suspended(dev); in fec_suspend()
4647 if (fep->rpm_active) { in fec_suspend()
4657 if (fep->reg_phy && !(fep->wol_flag & FEC_WOL_FLAG_ENABLE)) in fec_suspend()
4658 regulator_disable(fep->reg_phy); in fec_suspend()
4663 if (fep->clk_enet_out || fep->reg_phy) in fec_suspend()
4664 fep->link = 0; in fec_suspend()
4676 if (fep->reg_phy && !(fep->wol_flag & FEC_WOL_FLAG_ENABLE)) { in fec_resume()
4677 ret = regulator_enable(fep->reg_phy); in fec_resume()
4684 if (fep->rpm_active) in fec_resume()
4692 if (fep->wol_flag & FEC_WOL_FLAG_ENABLE) { in fec_resume()
4694 if (fep->wake_irq) { in fec_resume()
4695 disable_irq_wake(fep->wake_irq); in fec_resume()
4696 enable_irq(fep->wake_irq); in fec_resume()
4699 val = readl(fep->hwp + FEC_ECNTRL); in fec_resume()
4701 writel(val, fep->hwp + FEC_ECNTRL); in fec_resume()
4702 fep->wol_flag &= ~FEC_WOL_FLAG_SLEEP_ON; in fec_resume()
4704 pinctrl_pm_select_default_state(&fep->pdev->dev); in fec_resume()
4710 napi_enable(&fep->napi); in fec_resume()
4711 phy_init_hw(ndev->phydev); in fec_resume()
4712 phy_start(ndev->phydev); in fec_resume()
4719 if (fep->reg_phy) in fec_resume()
4720 regulator_disable(fep->reg_phy); in fec_resume()
4729 clk_disable_unprepare(fep->clk_ahb); in fec_runtime_suspend()
4730 clk_disable_unprepare(fep->clk_ipg); in fec_runtime_suspend()
4741 ret = clk_prepare_enable(fep->clk_ahb); in fec_runtime_resume()
4744 ret = clk_prepare_enable(fep->clk_ipg); in fec_runtime_resume()
4751 clk_disable_unprepare(fep->clk_ahb); in fec_runtime_resume()