Lines Matching +full:mac +full:- +full:wol
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2 /* Copyright 2017-2019 NXP */
44 struct enetc_hw *hw = &priv->si->hw; in enetc_get_reglen()
48 len += ARRAY_SIZE(enetc_txbdr_regs) * priv->num_tx_rings; in enetc_get_reglen()
49 len += ARRAY_SIZE(enetc_rxbdr_regs) * priv->num_rx_rings; in enetc_get_reglen()
51 if (hw->port) in enetc_get_reglen()
54 if (hw->port && !!(priv->si->hw_features & ENETC_SI_F_QBU)) in enetc_get_reglen()
66 struct enetc_hw *hw = &priv->si->hw; in enetc_get_regs()
76 for (i = 0; i < priv->num_tx_rings; i++) { in enetc_get_regs()
85 for (i = 0; i < priv->num_rx_rings; i++) { in enetc_get_regs()
94 if (!hw->port) in enetc_get_regs()
103 if (priv->si->hw_features & ENETC_SI_F_QBU) { in enetc_get_regs()
118 { ENETC_SIRUCA, "SI rx u-cast frames" },
119 { ENETC_SIRMCA, "SI rx m-cast frames" },
122 { ENETC_SITUCA, "SI tx u-cast frames" },
123 { ENETC_SITMCA, "SI tx m-cast frames" },
146 { ENETC_PM_REOCT(0), "MAC rx ethernet octets" },
147 { ENETC_PM_RALN(0), "MAC rx alignment errors" },
148 { ENETC_PM_RXPF(0), "MAC rx valid pause frames" },
149 { ENETC_PM_RFRM(0), "MAC rx valid frames" },
150 { ENETC_PM_RFCS(0), "MAC rx fcs errors" },
151 { ENETC_PM_RVLAN(0), "MAC rx VLAN frames" },
152 { ENETC_PM_RERR(0), "MAC rx frame errors" },
153 { ENETC_PM_RUCA(0), "MAC rx unicast frames" },
154 { ENETC_PM_RMCA(0), "MAC rx multicast frames" },
155 { ENETC_PM_RBCA(0), "MAC rx broadcast frames" },
156 { ENETC_PM_RDRP(0), "MAC rx dropped packets" },
157 { ENETC_PM_RPKT(0), "MAC rx packets" },
158 { ENETC_PM_RUND(0), "MAC rx undersized packets" },
159 { ENETC_PM_R64(0), "MAC rx 64 byte packets" },
160 { ENETC_PM_R127(0), "MAC rx 65-127 byte packets" },
161 { ENETC_PM_R255(0), "MAC rx 128-255 byte packets" },
162 { ENETC_PM_R511(0), "MAC rx 256-511 byte packets" },
163 { ENETC_PM_R1023(0), "MAC rx 512-1023 byte packets" },
164 { ENETC_PM_R1522(0), "MAC rx 1024-1522 byte packets" },
165 { ENETC_PM_R1523X(0), "MAC rx 1523 to max-octet packets" },
166 { ENETC_PM_ROVR(0), "MAC rx oversized packets" },
167 { ENETC_PM_RJBR(0), "MAC rx jabber packets" },
168 { ENETC_PM_RFRG(0), "MAC rx fragment packets" },
169 { ENETC_PM_RCNP(0), "MAC rx control packets" },
170 { ENETC_PM_RDRNTP(0), "MAC rx fifo drop" },
171 { ENETC_PM_TEOCT(0), "MAC tx ethernet octets" },
172 { ENETC_PM_TOCT(0), "MAC tx octets" },
173 { ENETC_PM_TCRSE(0), "MAC tx carrier sense errors" },
174 { ENETC_PM_TXPF(0), "MAC tx valid pause frames" },
175 { ENETC_PM_TFRM(0), "MAC tx frames" },
176 { ENETC_PM_TFCS(0), "MAC tx fcs errors" },
177 { ENETC_PM_TVLAN(0), "MAC tx VLAN frames" },
178 { ENETC_PM_TERR(0), "MAC tx frame errors" },
179 { ENETC_PM_TUCA(0), "MAC tx unicast frames" },
180 { ENETC_PM_TMCA(0), "MAC tx multicast frames" },
181 { ENETC_PM_TBCA(0), "MAC tx broadcast frames" },
182 { ENETC_PM_TPKT(0), "MAC tx packets" },
183 { ENETC_PM_TUND(0), "MAC tx undersized packets" },
184 { ENETC_PM_T64(0), "MAC tx 64 byte packets" },
185 { ENETC_PM_T127(0), "MAC tx 65-127 byte packets" },
186 { ENETC_PM_T255(0), "MAC tx 128-255 byte packets" },
187 { ENETC_PM_T511(0), "MAC tx 256-511 byte packets" },
188 { ENETC_PM_T1023(0), "MAC tx 512-1023 byte packets" },
189 { ENETC_PM_T1522(0), "MAC tx 1024-1522 byte packets" },
190 { ENETC_PM_T1523X(0), "MAC tx 1523 to max-octet packets" },
191 { ENETC_PM_TCNP(0), "MAC tx control packets" },
192 { ENETC_PM_TDFR(0), "MAC tx deferred packets" },
193 { ENETC_PM_TMCOL(0), "MAC tx multiple collisions" },
194 { ENETC_PM_TSCOL(0), "MAC tx single collisions" },
195 { ENETC_PM_TLCOL(0), "MAC tx late collisions" },
196 { ENETC_PM_TECOL(0), "MAC tx excessive collisions" },
197 { ENETC_UFDMF, "SI MAC nomatch u-cast discards" },
198 { ENETC_MFDMF, "SI MAC nomatch m-cast discards" },
199 { ENETC_PBFDSIR, "SI MAC nomatch b-cast discards" },
200 { ENETC_PUFDVFR, "SI VLAN nomatch u-cast discards" },
201 { ENETC_PMFDVFR, "SI VLAN nomatch m-cast discards" },
202 { ENETC_PBFDVFR, "SI VLAN nomatch b-cast discards" },
233 return -EOPNOTSUPP; in enetc_get_sset_count()
236 ARRAY_SIZE(tx_ring_stats) * priv->num_tx_rings + in enetc_get_sset_count()
237 ARRAY_SIZE(rx_ring_stats) * priv->num_rx_rings; in enetc_get_sset_count()
239 if (!enetc_si_is_pf(priv->si)) in enetc_get_sset_count()
256 for (i = 0; i < priv->num_tx_rings; i++) in enetc_get_strings()
259 for (i = 0; i < priv->num_rx_rings; i++) in enetc_get_strings()
263 if (!enetc_si_is_pf(priv->si)) in enetc_get_strings()
277 struct enetc_hw *hw = &priv->si->hw; in enetc_get_ethtool_stats()
283 for (i = 0; i < priv->num_tx_rings; i++) { in enetc_get_ethtool_stats()
284 data[o++] = priv->tx_ring[i]->stats.packets; in enetc_get_ethtool_stats()
285 data[o++] = priv->tx_ring[i]->stats.xdp_tx; in enetc_get_ethtool_stats()
286 data[o++] = priv->tx_ring[i]->stats.xdp_tx_drops; in enetc_get_ethtool_stats()
287 data[o++] = priv->tx_ring[i]->stats.win_drop; in enetc_get_ethtool_stats()
290 for (i = 0; i < priv->num_rx_rings; i++) { in enetc_get_ethtool_stats()
291 data[o++] = priv->rx_ring[i]->stats.packets; in enetc_get_ethtool_stats()
292 data[o++] = priv->rx_ring[i]->stats.rx_alloc_errs; in enetc_get_ethtool_stats()
293 data[o++] = priv->rx_ring[i]->stats.xdp_drops; in enetc_get_ethtool_stats()
294 data[o++] = priv->rx_ring[i]->stats.recycles; in enetc_get_ethtool_stats()
295 data[o++] = priv->rx_ring[i]->stats.recycle_failures; in enetc_get_ethtool_stats()
296 data[o++] = priv->rx_ring[i]->stats.xdp_redirect; in enetc_get_ethtool_stats()
297 data[o++] = priv->rx_ring[i]->stats.xdp_redirect_failures; in enetc_get_ethtool_stats()
300 if (!enetc_si_is_pf(priv->si)) in enetc_get_ethtool_stats()
307 static void enetc_pause_stats(struct enetc_hw *hw, int mac, in enetc_pause_stats() argument
310 pause_stats->tx_pause_frames = enetc_port_rd(hw, ENETC_PM_TXPF(mac)); in enetc_pause_stats()
311 pause_stats->rx_pause_frames = enetc_port_rd(hw, ENETC_PM_RXPF(mac)); in enetc_pause_stats()
318 struct enetc_hw *hw = &priv->si->hw; in enetc_get_pause_stats()
319 struct enetc_si *si = priv->si; in enetc_get_pause_stats()
321 switch (pause_stats->src) { in enetc_get_pause_stats()
326 if (si->hw_features & ENETC_SI_F_QBU) in enetc_get_pause_stats()
335 static void enetc_mac_stats(struct enetc_hw *hw, int mac, in enetc_mac_stats() argument
338 s->FramesTransmittedOK = enetc_port_rd(hw, ENETC_PM_TFRM(mac)); in enetc_mac_stats()
339 s->SingleCollisionFrames = enetc_port_rd(hw, ENETC_PM_TSCOL(mac)); in enetc_mac_stats()
340 s->MultipleCollisionFrames = enetc_port_rd(hw, ENETC_PM_TMCOL(mac)); in enetc_mac_stats()
341 s->FramesReceivedOK = enetc_port_rd(hw, ENETC_PM_RFRM(mac)); in enetc_mac_stats()
342 s->FrameCheckSequenceErrors = enetc_port_rd(hw, ENETC_PM_RFCS(mac)); in enetc_mac_stats()
343 s->AlignmentErrors = enetc_port_rd(hw, ENETC_PM_RALN(mac)); in enetc_mac_stats()
344 s->OctetsTransmittedOK = enetc_port_rd(hw, ENETC_PM_TEOCT(mac)); in enetc_mac_stats()
345 s->FramesWithDeferredXmissions = enetc_port_rd(hw, ENETC_PM_TDFR(mac)); in enetc_mac_stats()
346 s->LateCollisions = enetc_port_rd(hw, ENETC_PM_TLCOL(mac)); in enetc_mac_stats()
347 s->FramesAbortedDueToXSColls = enetc_port_rd(hw, ENETC_PM_TECOL(mac)); in enetc_mac_stats()
348 s->FramesLostDueToIntMACXmitError = enetc_port_rd(hw, ENETC_PM_TERR(mac)); in enetc_mac_stats()
349 s->CarrierSenseErrors = enetc_port_rd(hw, ENETC_PM_TCRSE(mac)); in enetc_mac_stats()
350 s->OctetsReceivedOK = enetc_port_rd(hw, ENETC_PM_REOCT(mac)); in enetc_mac_stats()
351 s->FramesLostDueToIntMACRcvError = enetc_port_rd(hw, ENETC_PM_RDRNTP(mac)); in enetc_mac_stats()
352 s->MulticastFramesXmittedOK = enetc_port_rd(hw, ENETC_PM_TMCA(mac)); in enetc_mac_stats()
353 s->BroadcastFramesXmittedOK = enetc_port_rd(hw, ENETC_PM_TBCA(mac)); in enetc_mac_stats()
354 s->MulticastFramesReceivedOK = enetc_port_rd(hw, ENETC_PM_RMCA(mac)); in enetc_mac_stats()
355 s->BroadcastFramesReceivedOK = enetc_port_rd(hw, ENETC_PM_RBCA(mac)); in enetc_mac_stats()
358 static void enetc_ctrl_stats(struct enetc_hw *hw, int mac, in enetc_ctrl_stats() argument
361 s->MACControlFramesTransmitted = enetc_port_rd(hw, ENETC_PM_TCNP(mac)); in enetc_ctrl_stats()
362 s->MACControlFramesReceived = enetc_port_rd(hw, ENETC_PM_RCNP(mac)); in enetc_ctrl_stats()
376 static void enetc_rmon_stats(struct enetc_hw *hw, int mac, in enetc_rmon_stats() argument
379 s->undersize_pkts = enetc_port_rd(hw, ENETC_PM_RUND(mac)); in enetc_rmon_stats()
380 s->oversize_pkts = enetc_port_rd(hw, ENETC_PM_ROVR(mac)); in enetc_rmon_stats()
381 s->fragments = enetc_port_rd(hw, ENETC_PM_RFRG(mac)); in enetc_rmon_stats()
382 s->jabbers = enetc_port_rd(hw, ENETC_PM_RJBR(mac)); in enetc_rmon_stats()
384 s->hist[0] = enetc_port_rd(hw, ENETC_PM_R64(mac)); in enetc_rmon_stats()
385 s->hist[1] = enetc_port_rd(hw, ENETC_PM_R127(mac)); in enetc_rmon_stats()
386 s->hist[2] = enetc_port_rd(hw, ENETC_PM_R255(mac)); in enetc_rmon_stats()
387 s->hist[3] = enetc_port_rd(hw, ENETC_PM_R511(mac)); in enetc_rmon_stats()
388 s->hist[4] = enetc_port_rd(hw, ENETC_PM_R1023(mac)); in enetc_rmon_stats()
389 s->hist[5] = enetc_port_rd(hw, ENETC_PM_R1522(mac)); in enetc_rmon_stats()
390 s->hist[6] = enetc_port_rd(hw, ENETC_PM_R1523X(mac)); in enetc_rmon_stats()
392 s->hist_tx[0] = enetc_port_rd(hw, ENETC_PM_T64(mac)); in enetc_rmon_stats()
393 s->hist_tx[1] = enetc_port_rd(hw, ENETC_PM_T127(mac)); in enetc_rmon_stats()
394 s->hist_tx[2] = enetc_port_rd(hw, ENETC_PM_T255(mac)); in enetc_rmon_stats()
395 s->hist_tx[3] = enetc_port_rd(hw, ENETC_PM_T511(mac)); in enetc_rmon_stats()
396 s->hist_tx[4] = enetc_port_rd(hw, ENETC_PM_T1023(mac)); in enetc_rmon_stats()
397 s->hist_tx[5] = enetc_port_rd(hw, ENETC_PM_T1522(mac)); in enetc_rmon_stats()
398 s->hist_tx[6] = enetc_port_rd(hw, ENETC_PM_T1523X(mac)); in enetc_rmon_stats()
405 struct enetc_hw *hw = &priv->si->hw; in enetc_get_eth_mac_stats()
406 struct enetc_si *si = priv->si; in enetc_get_eth_mac_stats()
408 switch (mac_stats->src) { in enetc_get_eth_mac_stats()
413 if (si->hw_features & ENETC_SI_F_QBU) in enetc_get_eth_mac_stats()
426 struct enetc_hw *hw = &priv->si->hw; in enetc_get_eth_ctrl_stats()
427 struct enetc_si *si = priv->si; in enetc_get_eth_ctrl_stats()
429 switch (ctrl_stats->src) { in enetc_get_eth_ctrl_stats()
434 if (si->hw_features & ENETC_SI_F_QBU) in enetc_get_eth_ctrl_stats()
448 struct enetc_hw *hw = &priv->si->hw; in enetc_get_rmon_stats()
449 struct enetc_si *si = priv->si; in enetc_get_rmon_stats()
453 switch (rmon_stats->src) { in enetc_get_rmon_stats()
458 if (si->hw_features & ENETC_SI_F_QBU) in enetc_get_rmon_stats()
486 if (rxnfc->flow_type >= ARRAY_SIZE(rsshash)) in enetc_get_rsshash()
487 return -EINVAL; in enetc_get_rsshash()
489 rxnfc->data = rsshash[rxnfc->flow_type]; in enetc_get_rsshash()
494 /* current HW spec does byte reversal on everything including MAC addresses */
500 dst[i] = src[ETH_ALEN - i - 1]; in ether_addr_copy_swap()
514 switch (fs->flow_type & 0xff) { in enetc_set_cls_entry()
516 l4ip4_h = &fs->h_u.tcp_ip4_spec; in enetc_set_cls_entry()
517 l4ip4_m = &fs->m_u.tcp_ip4_spec; in enetc_set_cls_entry()
520 l4ip4_h = &fs->h_u.udp_ip4_spec; in enetc_set_cls_entry()
521 l4ip4_m = &fs->m_u.udp_ip4_spec; in enetc_set_cls_entry()
524 l4ip4_h = &fs->h_u.sctp_ip4_spec; in enetc_set_cls_entry()
525 l4ip4_m = &fs->m_u.sctp_ip4_spec; in enetc_set_cls_entry()
527 rfse.sip_h[0] = l4ip4_h->ip4src; in enetc_set_cls_entry()
528 rfse.sip_m[0] = l4ip4_m->ip4src; in enetc_set_cls_entry()
529 rfse.dip_h[0] = l4ip4_h->ip4dst; in enetc_set_cls_entry()
530 rfse.dip_m[0] = l4ip4_m->ip4dst; in enetc_set_cls_entry()
531 rfse.sport_h = ntohs(l4ip4_h->psrc); in enetc_set_cls_entry()
532 rfse.sport_m = ntohs(l4ip4_m->psrc); in enetc_set_cls_entry()
533 rfse.dport_h = ntohs(l4ip4_h->pdst); in enetc_set_cls_entry()
534 rfse.dport_m = ntohs(l4ip4_m->pdst); in enetc_set_cls_entry()
535 if (l4ip4_m->tos) in enetc_set_cls_entry()
536 netdev_warn(si->ndev, "ToS field is not supported and was ignored\n"); in enetc_set_cls_entry()
541 l3ip4_h = &fs->h_u.usr_ip4_spec; in enetc_set_cls_entry()
542 l3ip4_m = &fs->m_u.usr_ip4_spec; in enetc_set_cls_entry()
544 rfse.sip_h[0] = l3ip4_h->ip4src; in enetc_set_cls_entry()
545 rfse.sip_m[0] = l3ip4_m->ip4src; in enetc_set_cls_entry()
546 rfse.dip_h[0] = l3ip4_h->ip4dst; in enetc_set_cls_entry()
547 rfse.dip_m[0] = l3ip4_m->ip4dst; in enetc_set_cls_entry()
548 if (l3ip4_m->tos) in enetc_set_cls_entry()
549 netdev_warn(si->ndev, "ToS field is not supported and was ignored\n"); in enetc_set_cls_entry()
554 eth_h = &fs->h_u.ether_spec; in enetc_set_cls_entry()
555 eth_m = &fs->m_u.ether_spec; in enetc_set_cls_entry()
557 ether_addr_copy_swap(rfse.smac_h, eth_h->h_source); in enetc_set_cls_entry()
558 ether_addr_copy_swap(rfse.smac_m, eth_m->h_source); in enetc_set_cls_entry()
559 ether_addr_copy_swap(rfse.dmac_h, eth_h->h_dest); in enetc_set_cls_entry()
560 ether_addr_copy_swap(rfse.dmac_m, eth_m->h_dest); in enetc_set_cls_entry()
561 rfse.ethtype_h = ntohs(eth_h->h_proto); in enetc_set_cls_entry()
562 rfse.ethtype_m = ntohs(eth_m->h_proto); in enetc_set_cls_entry()
565 return -EOPNOTSUPP; in enetc_set_cls_entry()
569 if (fs->ring_cookie != RX_CLS_FLOW_DISC) { in enetc_set_cls_entry()
571 rfse.result = fs->ring_cookie; in enetc_set_cls_entry()
574 return enetc_set_fs_entry(si, &rfse, fs->location); in enetc_set_cls_entry()
583 switch (rxnfc->cmd) { in enetc_get_rxnfc()
585 rxnfc->data = priv->num_rx_rings; in enetc_get_rxnfc()
592 rxnfc->data = priv->si->num_fs_entries; in enetc_get_rxnfc()
594 rxnfc->rule_cnt = 0; in enetc_get_rxnfc()
595 for (i = 0; i < priv->si->num_fs_entries; i++) in enetc_get_rxnfc()
596 if (priv->cls_rules[i].used) in enetc_get_rxnfc()
597 rxnfc->rule_cnt++; in enetc_get_rxnfc()
600 if (rxnfc->fs.location >= priv->si->num_fs_entries) in enetc_get_rxnfc()
601 return -EINVAL; in enetc_get_rxnfc()
604 rxnfc->fs = priv->cls_rules[rxnfc->fs.location].fs; in enetc_get_rxnfc()
608 rxnfc->data = priv->si->num_fs_entries; in enetc_get_rxnfc()
611 for (i = 0; i < priv->si->num_fs_entries; i++) { in enetc_get_rxnfc()
612 if (!priv->cls_rules[i].used) in enetc_get_rxnfc()
614 if (j == rxnfc->rule_cnt) in enetc_get_rxnfc()
615 return -EMSGSIZE; in enetc_get_rxnfc()
619 rxnfc->rule_cnt = j; in enetc_get_rxnfc()
622 return -EOPNOTSUPP; in enetc_get_rxnfc()
633 switch (rxnfc->cmd) { in enetc_set_rxnfc()
635 if (rxnfc->fs.location >= priv->si->num_fs_entries) in enetc_set_rxnfc()
636 return -EINVAL; in enetc_set_rxnfc()
638 if (rxnfc->fs.ring_cookie >= priv->num_rx_rings && in enetc_set_rxnfc()
639 rxnfc->fs.ring_cookie != RX_CLS_FLOW_DISC) in enetc_set_rxnfc()
640 return -EINVAL; in enetc_set_rxnfc()
642 err = enetc_set_cls_entry(priv->si, &rxnfc->fs, true); in enetc_set_rxnfc()
645 priv->cls_rules[rxnfc->fs.location].fs = rxnfc->fs; in enetc_set_rxnfc()
646 priv->cls_rules[rxnfc->fs.location].used = 1; in enetc_set_rxnfc()
649 if (rxnfc->fs.location >= priv->si->num_fs_entries) in enetc_set_rxnfc()
650 return -EINVAL; in enetc_set_rxnfc()
652 err = enetc_set_cls_entry(priv->si, &rxnfc->fs, false); in enetc_set_rxnfc()
655 priv->cls_rules[rxnfc->fs.location].used = 0; in enetc_set_rxnfc()
658 return -EOPNOTSUPP; in enetc_set_rxnfc()
669 return (priv->si->hw.port) ? ENETC_RSSHASH_KEY_SIZE : 0; in enetc_get_rxfh_key_size()
677 return priv->si->num_rss; in enetc_get_rxfh_indir_size()
684 struct enetc_hw *hw = &priv->si->hw; in enetc_get_rxfh()
688 rxfh->hfunc = ETH_RSS_HASH_TOP; in enetc_get_rxfh()
691 if (rxfh->key && hw->port) in enetc_get_rxfh()
693 ((u32 *)rxfh->key)[i] = enetc_port_rd(hw, in enetc_get_rxfh()
697 if (rxfh->indir) in enetc_get_rxfh()
698 err = enetc_get_rss_table(priv->si, rxfh->indir, in enetc_get_rxfh()
699 priv->si->num_rss); in enetc_get_rxfh()
718 struct enetc_hw *hw = &priv->si->hw; in enetc_set_rxfh()
722 if (rxfh->key && hw->port) in enetc_set_rxfh()
723 enetc_set_rss_key(hw, rxfh->key); in enetc_set_rxfh()
726 if (rxfh->indir) in enetc_set_rxfh()
727 err = enetc_set_rss_table(priv->si, rxfh->indir, in enetc_set_rxfh()
728 priv->si->num_rss); in enetc_set_rxfh()
740 ring->rx_pending = priv->rx_bd_count; in enetc_get_ringparam()
741 ring->tx_pending = priv->tx_bd_count; in enetc_get_ringparam()
745 struct enetc_hw *hw = &priv->si->hw; in enetc_get_ringparam()
748 if (val != priv->rx_bd_count) in enetc_get_ringparam()
753 if (val != priv->tx_bd_count) in enetc_get_ringparam()
764 struct enetc_int_vector *v = priv->int_vector[0]; in enetc_get_coalesce()
765 u64 clk_freq = priv->sysclk_freq; in enetc_get_coalesce()
767 ic->tx_coalesce_usecs = enetc_cycles_to_usecs(priv->tx_ictt, clk_freq); in enetc_get_coalesce()
768 ic->rx_coalesce_usecs = enetc_cycles_to_usecs(v->rx_ictt, clk_freq); in enetc_get_coalesce()
770 ic->tx_max_coalesced_frames = ENETC_TXIC_PKTTHR; in enetc_get_coalesce()
771 ic->rx_max_coalesced_frames = ENETC_RXIC_PKTTHR; in enetc_get_coalesce()
773 ic->use_adaptive_rx_coalesce = priv->ic_mode & ENETC_IC_RX_ADAPTIVE; in enetc_get_coalesce()
784 u64 clk_freq = priv->sysclk_freq; in enetc_set_coalesce()
789 tx_ictt = enetc_usecs_to_cycles(ic->tx_coalesce_usecs, clk_freq); in enetc_set_coalesce()
790 rx_ictt = enetc_usecs_to_cycles(ic->rx_coalesce_usecs, clk_freq); in enetc_set_coalesce()
792 if (ic->rx_max_coalesced_frames != ENETC_RXIC_PKTTHR) in enetc_set_coalesce()
793 return -EOPNOTSUPP; in enetc_set_coalesce()
795 if (ic->tx_max_coalesced_frames != ENETC_TXIC_PKTTHR) in enetc_set_coalesce()
796 return -EOPNOTSUPP; in enetc_set_coalesce()
799 if (ic->use_adaptive_rx_coalesce) { in enetc_set_coalesce()
809 changed = (ic_mode != priv->ic_mode) || (priv->tx_ictt != tx_ictt); in enetc_set_coalesce()
811 priv->ic_mode = ic_mode; in enetc_set_coalesce()
812 priv->tx_ictt = tx_ictt; in enetc_set_coalesce()
814 for (i = 0; i < priv->bdr_int_num; i++) { in enetc_set_coalesce()
815 struct enetc_int_vector *v = priv->int_vector[i]; in enetc_set_coalesce()
817 v->rx_ictt = rx_ictt; in enetc_set_coalesce()
818 v->rx_dim_en = !!(ic_mode & ENETC_IC_RX_ADAPTIVE); in enetc_set_coalesce()
839 info->phc_index = *phc_idx; in enetc_get_ts_info()
844 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE; in enetc_get_ts_info()
849 info->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE | in enetc_get_ts_info()
854 info->tx_types = (1 << HWTSTAMP_TX_OFF) | in enetc_get_ts_info()
858 info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) | in enetc_get_ts_info()
865 struct ethtool_wolinfo *wol) in enetc_get_wol() argument
867 wol->supported = 0; in enetc_get_wol()
868 wol->wolopts = 0; in enetc_get_wol()
870 if (dev->phydev) in enetc_get_wol()
871 phy_ethtool_get_wol(dev->phydev, wol); in enetc_get_wol()
875 struct ethtool_wolinfo *wol) in enetc_set_wol() argument
879 if (!dev->phydev) in enetc_set_wol()
880 return -EOPNOTSUPP; in enetc_set_wol()
882 ret = phy_ethtool_set_wol(dev->phydev, wol); in enetc_set_wol()
884 device_set_wakeup_enable(&dev->dev, wol->wolopts); in enetc_set_wol()
894 phylink_ethtool_get_pauseparam(priv->phylink, pause); in enetc_get_pauseparam()
902 return phylink_ethtool_set_pauseparam(priv->phylink, pause); in enetc_set_pauseparam()
910 if (!priv->phylink) in enetc_get_link_ksettings()
911 return -EOPNOTSUPP; in enetc_get_link_ksettings()
913 return phylink_ethtool_ksettings_get(priv->phylink, cmd); in enetc_get_link_ksettings()
921 if (!priv->phylink) in enetc_set_link_ksettings()
922 return -EOPNOTSUPP; in enetc_set_link_ksettings()
924 return phylink_ethtool_ksettings_set(priv->phylink, cmd); in enetc_set_link_ksettings()
931 struct enetc_hw *hw = &priv->si->hw; in enetc_get_mm_stats()
932 struct enetc_si *si = priv->si; in enetc_get_mm_stats()
934 if (!(si->hw_features & ENETC_SI_F_QBU)) in enetc_get_mm_stats()
937 s->MACMergeFrameAssErrorCount = enetc_port_rd(hw, ENETC_MMFAECR); in enetc_get_mm_stats()
938 s->MACMergeFrameSmdErrorCount = enetc_port_rd(hw, ENETC_MMFSECR); in enetc_get_mm_stats()
939 s->MACMergeFrameAssOkCount = enetc_port_rd(hw, ENETC_MMFAOCR); in enetc_get_mm_stats()
940 s->MACMergeFragCountRx = enetc_port_rd(hw, ENETC_MMFCRXR); in enetc_get_mm_stats()
941 s->MACMergeFragCountTx = enetc_port_rd(hw, ENETC_MMFCTXR); in enetc_get_mm_stats()
942 s->MACMergeHoldCount = enetc_port_rd(hw, ENETC_MMHCR); in enetc_get_mm_stats()
948 struct enetc_si *si = priv->si; in enetc_get_mm()
949 struct enetc_hw *hw = &si->hw; in enetc_get_mm()
952 if (!(si->hw_features & ENETC_SI_F_QBU)) in enetc_get_mm()
953 return -EOPNOTSUPP; in enetc_get_mm()
955 mutex_lock(&priv->mm_lock); in enetc_get_mm()
958 state->pmac_enabled = !!(val & ENETC_PFPMR_PMACE); in enetc_get_mm()
964 state->verify_status = ETHTOOL_MM_VERIFY_STATUS_DISABLED; in enetc_get_mm()
967 state->verify_status = ETHTOOL_MM_VERIFY_STATUS_VERIFYING; in enetc_get_mm()
970 state->verify_status = ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED; in enetc_get_mm()
973 state->verify_status = ETHTOOL_MM_VERIFY_STATUS_FAILED; in enetc_get_mm()
977 state->verify_status = ETHTOOL_MM_VERIFY_STATUS_UNKNOWN; in enetc_get_mm()
982 state->tx_min_frag_size = ethtool_mm_frag_size_add_to_min(rafs); in enetc_get_mm()
984 state->rx_min_frag_size = ethtool_mm_frag_size_add_to_min(lafs); in enetc_get_mm()
985 state->tx_enabled = !!(val & ENETC_MMCSR_LPE); /* mirror of MMCSR_ME */ in enetc_get_mm()
986 state->tx_active = state->tx_enabled && in enetc_get_mm()
987 (state->verify_status == ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED || in enetc_get_mm()
988 state->verify_status == ETHTOOL_MM_VERIFY_STATUS_DISABLED); in enetc_get_mm()
989 state->verify_enabled = !(val & ENETC_MMCSR_VDIS); in enetc_get_mm()
990 state->verify_time = ENETC_MMCSR_GET_VT(val); in enetc_get_mm()
994 state->max_verify_time = 127; in enetc_get_mm()
996 mutex_unlock(&priv->mm_lock); in enetc_get_mm()
1007 * attempts. To not sleep forever, it relies on a non-zero verify_time, in enetc_mm_wait_tx_active()
1033 /* ENETC does not have an IRQ to notify changes to the MAC Merge TX status
1039 struct enetc_hw *hw = &priv->si->hw; in enetc_mm_commit_preemptible_tcs()
1054 preemptible_tcs = priv->preemptible_tcs; in enetc_mm_commit_preemptible_tcs()
1065 u32 val = enetc_port_rd(&si->hw, ENETC_PM0_CMD_CFG); in enetc_restart_emac_rx()
1067 enetc_port_wr(&si->hw, ENETC_PM0_CMD_CFG, val & ~ENETC_PM0_RX_EN); in enetc_restart_emac_rx()
1070 enetc_port_wr(&si->hw, ENETC_PM0_CMD_CFG, val); in enetc_restart_emac_rx()
1077 struct enetc_hw *hw = &priv->si->hw; in enetc_set_mm()
1078 struct enetc_si *si = priv->si; in enetc_set_mm()
1082 if (!(si->hw_features & ENETC_SI_F_QBU)) in enetc_set_mm()
1083 return -EOPNOTSUPP; in enetc_set_mm()
1085 err = ethtool_mm_frag_size_min_to_add(cfg->tx_min_frag_size, in enetc_set_mm()
1090 mutex_lock(&priv->mm_lock); in enetc_set_mm()
1093 if (cfg->pmac_enabled) in enetc_set_mm()
1101 if (cfg->verify_enabled) in enetc_set_mm()
1106 if (cfg->tx_enabled) in enetc_set_mm()
1107 priv->active_offloads |= ENETC_F_QBU; in enetc_set_mm()
1109 priv->active_offloads &= ~ENETC_F_QBU; in enetc_set_mm()
1111 /* If link is up, enable/disable MAC Merge right away */ in enetc_set_mm()
1113 if (!!(priv->active_offloads & ENETC_F_QBU)) in enetc_set_mm()
1120 val |= ENETC_MMCSR_VT(cfg->verify_time); in enetc_set_mm()
1127 enetc_restart_emac_rx(priv->si); in enetc_set_mm()
1131 mutex_unlock(&priv->mm_lock); in enetc_set_mm()
1138 * According to 802.3 Figure 99-8 - Verify state diagram, the LINK_FAIL bit
1139 * should have been sufficient to re-trigger verification, but for ENETC it
1141 * re-trigger verification when link comes up.
1145 struct enetc_hw *hw = &priv->si->hw; in enetc_mm_link_state_update()
1148 mutex_lock(&priv->mm_lock); in enetc_mm_link_state_update()
1154 if (priv->active_offloads & ENETC_F_QBU) in enetc_mm_link_state_update()
1158 if (priv->active_offloads & ENETC_F_QBU) in enetc_mm_link_state_update()
1166 mutex_unlock(&priv->mm_lock); in enetc_mm_link_state_update()
1246 ndev->ethtool_ops = priv->si->drvdata->eth_ops; in enetc_set_ethtool_ops()