Lines Matching +full:ast2500 +full:- +full:scu
1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * (C) Copyright 2009-2011 Faraday Technology
6 * Po-Yu Chuang <ratbert@faraday-tech.com>
12 #include <linux/dma-mapping.h>
54 /* For NC-SI to register a fixed-link phy device */
102 /* AST2500/AST2600 RMII ref clock gate */
126 struct net_device *netdev = priv->netdev; in ftgmac100_reset_mac()
130 iowrite32(maccr, priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_reset_mac()
132 priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_reset_mac()
136 maccr = ioread32(priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_reset_mac()
144 return -EIO; in ftgmac100_reset_mac()
151 switch (priv->cur_speed) { in ftgmac100_reset_and_config_mac()
164 netdev_err(priv->netdev, "Unknown speed %d !\n", in ftgmac100_reset_and_config_mac()
165 priv->cur_speed); in ftgmac100_reset_and_config_mac()
170 priv->rx_pointer = 0; in ftgmac100_reset_and_config_mac()
171 priv->tx_clean_pointer = 0; in ftgmac100_reset_and_config_mac()
172 priv->tx_pointer = 0; in ftgmac100_reset_and_config_mac()
176 return -EIO; in ftgmac100_reset_and_config_mac()
186 iowrite32(maddr, priv->base + FTGMAC100_OFFSET_MAC_MADR); in ftgmac100_write_mac_addr()
187 iowrite32(laddr, priv->base + FTGMAC100_OFFSET_MAC_LADR); in ftgmac100_write_mac_addr()
197 err = of_get_ethdev_address(priv->dev->of_node, priv->netdev); in ftgmac100_initial_mac()
198 if (err == -EPROBE_DEFER) in ftgmac100_initial_mac()
201 dev_info(priv->dev, "Read MAC address %pM from device tree\n", in ftgmac100_initial_mac()
202 priv->netdev->dev_addr); in ftgmac100_initial_mac()
206 m = ioread32(priv->base + FTGMAC100_OFFSET_MAC_MADR); in ftgmac100_initial_mac()
207 l = ioread32(priv->base + FTGMAC100_OFFSET_MAC_LADR); in ftgmac100_initial_mac()
217 eth_hw_addr_set(priv->netdev, mac); in ftgmac100_initial_mac()
218 dev_info(priv->dev, "Read MAC address %pM from chip\n", mac); in ftgmac100_initial_mac()
220 eth_hw_addr_random(priv->netdev); in ftgmac100_initial_mac()
221 dev_info(priv->dev, "Generated random MAC address %pM\n", in ftgmac100_initial_mac()
222 priv->netdev->dev_addr); in ftgmac100_initial_mac()
237 ftgmac100_write_mac_addr(netdev_priv(dev), dev->dev_addr); in ftgmac100_set_mac_addr()
247 if (priv->rx_pause) in ftgmac100_config_pause()
253 if (priv->tx_pause) in ftgmac100_config_pause()
256 iowrite32(fcr, priv->base + FTGMAC100_OFFSET_FCR); in ftgmac100_config_pause()
264 reg = ioread32(priv->base + FTGMAC100_OFFSET_ISR); in ftgmac100_init_hw()
265 iowrite32(reg, priv->base + FTGMAC100_OFFSET_ISR); in ftgmac100_init_hw()
268 iowrite32(priv->rxdes_dma, priv->base + FTGMAC100_OFFSET_RXR_BADR); in ftgmac100_init_hw()
271 iowrite32(priv->txdes_dma, priv->base + FTGMAC100_OFFSET_NPTXR_BADR); in ftgmac100_init_hw()
275 priv->base + FTGMAC100_OFFSET_RBSR); in ftgmac100_init_hw()
279 priv->base + FTGMAC100_OFFSET_APTC); in ftgmac100_init_hw()
282 ftgmac100_write_mac_addr(priv, priv->netdev->dev_addr); in ftgmac100_init_hw()
285 iowrite32(priv->maht0, priv->base + FTGMAC100_OFFSET_MAHT0); in ftgmac100_init_hw()
286 iowrite32(priv->maht1, priv->base + FTGMAC100_OFFSET_MAHT1); in ftgmac100_init_hw()
300 priv->base + FTGMAC100_OFFSET_DBLAC); in ftgmac100_init_hw()
308 priv->base + FTGMAC100_OFFSET_ITC); in ftgmac100_init_hw()
311 reg = ioread32(priv->base + FTGMAC100_OFFSET_FEAR); in ftgmac100_init_hw()
314 reg = ioread32(priv->base + FTGMAC100_OFFSET_TPAFCR); in ftgmac100_init_hw()
318 iowrite32(reg, priv->base + FTGMAC100_OFFSET_TPAFCR); in ftgmac100_init_hw()
323 u32 maccr = ioread32(priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_start_hw()
339 if (priv->cur_duplex == DUPLEX_FULL) in ftgmac100_start_hw()
341 if (priv->netdev->flags & IFF_PROMISC) in ftgmac100_start_hw()
343 if (priv->netdev->flags & IFF_ALLMULTI) in ftgmac100_start_hw()
345 else if (netdev_mc_count(priv->netdev)) in ftgmac100_start_hw()
349 if (priv->netdev->features & NETIF_F_HW_VLAN_CTAG_RX) in ftgmac100_start_hw()
353 iowrite32(maccr, priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_start_hw()
358 iowrite32(0, priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_stop_hw()
365 priv->maht1 = 0; in ftgmac100_calc_mc_hash()
366 priv->maht0 = 0; in ftgmac100_calc_mc_hash()
367 netdev_for_each_mc_addr(ha, priv->netdev) { in ftgmac100_calc_mc_hash()
368 u32 crc_val = ether_crc_le(ETH_ALEN, ha->addr); in ftgmac100_calc_mc_hash()
372 priv->maht1 |= 1ul << (crc_val - 32); in ftgmac100_calc_mc_hash()
374 priv->maht0 |= 1ul << (crc_val); in ftgmac100_calc_mc_hash()
390 iowrite32(priv->maht0, priv->base + FTGMAC100_OFFSET_MAHT0); in ftgmac100_set_rx_mode()
391 iowrite32(priv->maht1, priv->base + FTGMAC100_OFFSET_MAHT1); in ftgmac100_set_rx_mode()
400 struct net_device *netdev = priv->netdev; in ftgmac100_alloc_rx_buf()
409 err = -ENOMEM; in ftgmac100_alloc_rx_buf()
410 map = priv->rx_scratch_dma; in ftgmac100_alloc_rx_buf()
412 map = dma_map_single(priv->dev, skb->data, RX_BUF_SIZE, in ftgmac100_alloc_rx_buf()
414 if (unlikely(dma_mapping_error(priv->dev, map))) { in ftgmac100_alloc_rx_buf()
418 map = priv->rx_scratch_dma; in ftgmac100_alloc_rx_buf()
420 err = -ENOMEM; in ftgmac100_alloc_rx_buf()
425 priv->rx_skbs[entry] = skb; in ftgmac100_alloc_rx_buf()
428 rxdes->rxdes3 = cpu_to_le32(map); in ftgmac100_alloc_rx_buf()
434 if (entry == (priv->rx_q_entries - 1)) in ftgmac100_alloc_rx_buf()
435 rxdes->rxdes0 = cpu_to_le32(priv->rxdes0_edorr_mask); in ftgmac100_alloc_rx_buf()
437 rxdes->rxdes0 = 0; in ftgmac100_alloc_rx_buf()
445 return (pointer + 1) & (priv->rx_q_entries - 1); in ftgmac100_next_rx_pointer()
450 struct net_device *netdev = priv->netdev; in ftgmac100_rx_packet_error()
453 netdev->stats.rx_errors++; in ftgmac100_rx_packet_error()
456 netdev->stats.rx_crc_errors++; in ftgmac100_rx_packet_error()
461 netdev->stats.rx_length_errors++; in ftgmac100_rx_packet_error()
466 struct net_device *netdev = priv->netdev; in ftgmac100_rx_packet()
474 pointer = priv->rx_pointer; in ftgmac100_rx_packet()
475 rxdes = &priv->rxdes[pointer]; in ftgmac100_rx_packet()
478 status = le32_to_cpu(rxdes->rxdes0); in ftgmac100_rx_packet()
494 csum_vlan = le32_to_cpu(rxdes->rxdes1); in ftgmac100_rx_packet()
518 skb = priv->rx_skbs[pointer]; in ftgmac100_rx_packet()
525 netdev->stats.multicast++; in ftgmac100_rx_packet()
533 if (netdev->features & NETIF_F_RXCSUM) { in ftgmac100_rx_packet()
539 skb->ip_summed = CHECKSUM_NONE; in ftgmac100_rx_packet()
541 skb->ip_summed = CHECKSUM_UNNECESSARY; in ftgmac100_rx_packet()
548 if ((netdev->features & NETIF_F_HW_VLAN_CTAG_RX) && in ftgmac100_rx_packet()
554 map = le32_to_cpu(rxdes->rxdes3); in ftgmac100_rx_packet()
561 dma_unmap_single(priv->dev, map, size, DMA_FROM_DEVICE); in ftgmac100_rx_packet()
563 dma_unmap_single(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE); in ftgmac100_rx_packet()
569 priv->rx_pointer = ftgmac100_next_rx_pointer(priv, pointer); in ftgmac100_rx_packet()
571 skb->protocol = eth_type_trans(skb, netdev); in ftgmac100_rx_packet()
573 netdev->stats.rx_packets++; in ftgmac100_rx_packet()
574 netdev->stats.rx_bytes += size; in ftgmac100_rx_packet()
577 if (skb->ip_summed == CHECKSUM_NONE) in ftgmac100_rx_packet()
580 napi_gro_receive(&priv->napi, skb); in ftgmac100_rx_packet()
587 rxdes->rxdes0 = cpu_to_le32(status & priv->rxdes0_edorr_mask); in ftgmac100_rx_packet()
588 priv->rx_pointer = ftgmac100_next_rx_pointer(priv, pointer); in ftgmac100_rx_packet()
589 netdev->stats.rx_dropped++; in ftgmac100_rx_packet()
596 if (index == (priv->tx_q_entries - 1)) in ftgmac100_base_tx_ctlstat()
597 return priv->txdes0_edotr_mask; in ftgmac100_base_tx_ctlstat()
605 return (pointer + 1) & (priv->tx_q_entries - 1); in ftgmac100_next_tx_pointer()
616 return (priv->tx_clean_pointer - priv->tx_pointer - 1) & in ftgmac100_tx_buf_avail()
617 (priv->tx_q_entries - 1); in ftgmac100_tx_buf_avail()
622 return priv->tx_pointer != priv->tx_clean_pointer; in ftgmac100_tx_buf_cleanable()
631 dma_addr_t map = le32_to_cpu(txdes->txdes3); in ftgmac100_free_tx_packet()
636 dma_unmap_single(priv->dev, map, len, DMA_TO_DEVICE); in ftgmac100_free_tx_packet()
639 dma_unmap_page(priv->dev, map, len, DMA_TO_DEVICE); in ftgmac100_free_tx_packet()
645 priv->tx_skbs[pointer] = NULL; in ftgmac100_free_tx_packet()
650 struct net_device *netdev = priv->netdev; in ftgmac100_tx_complete_packet()
656 pointer = priv->tx_clean_pointer; in ftgmac100_tx_complete_packet()
657 txdes = &priv->txdes[pointer]; in ftgmac100_tx_complete_packet()
659 ctl_stat = le32_to_cpu(txdes->txdes0); in ftgmac100_tx_complete_packet()
663 skb = priv->tx_skbs[pointer]; in ftgmac100_tx_complete_packet()
664 netdev->stats.tx_packets++; in ftgmac100_tx_complete_packet()
665 netdev->stats.tx_bytes += skb->len; in ftgmac100_tx_complete_packet()
667 txdes->txdes0 = cpu_to_le32(ctl_stat & priv->txdes0_edotr_mask); in ftgmac100_tx_complete_packet()
674 priv->tx_clean_pointer = ftgmac100_next_tx_pointer(priv, pointer); in ftgmac100_tx_complete_packet()
681 struct net_device *netdev = priv->netdev; in ftgmac100_tx_complete()
705 if (skb->protocol == cpu_to_be16(ETH_P_IP)) { in ftgmac100_prep_tx_csum()
706 u8 ip_proto = ip_hdr(skb)->protocol; in ftgmac100_prep_tx_csum()
734 netdev->stats.tx_dropped++; in ftgmac100_hard_start_xmit()
739 if (unlikely(skb->len > MAX_PKT_SIZE)) { in ftgmac100_hard_start_xmit()
748 nfrags = skb_shinfo(skb)->nr_frags; in ftgmac100_hard_start_xmit()
752 if (skb->ip_summed == CHECKSUM_PARTIAL && in ftgmac100_hard_start_xmit()
766 map = dma_map_single(priv->dev, skb->data, len, DMA_TO_DEVICE); in ftgmac100_hard_start_xmit()
767 if (dma_mapping_error(priv->dev, map)) { in ftgmac100_hard_start_xmit()
774 pointer = priv->tx_pointer; in ftgmac100_hard_start_xmit()
775 txdes = first = &priv->txdes[pointer]; in ftgmac100_hard_start_xmit()
780 priv->tx_skbs[pointer] = skb; in ftgmac100_hard_start_xmit()
787 txdes->txdes3 = cpu_to_le32(map); in ftgmac100_hard_start_xmit()
788 txdes->txdes1 = cpu_to_le32(csum_vlan); in ftgmac100_hard_start_xmit()
795 skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; in ftgmac100_hard_start_xmit()
800 map = skb_frag_dma_map(priv->dev, frag, 0, len, in ftgmac100_hard_start_xmit()
802 if (dma_mapping_error(priv->dev, map)) in ftgmac100_hard_start_xmit()
806 priv->tx_skbs[pointer] = skb; in ftgmac100_hard_start_xmit()
807 txdes = &priv->txdes[pointer]; in ftgmac100_hard_start_xmit()
811 if (i == (nfrags - 1)) in ftgmac100_hard_start_xmit()
813 txdes->txdes0 = cpu_to_le32(ctl_stat); in ftgmac100_hard_start_xmit()
814 txdes->txdes1 = 0; in ftgmac100_hard_start_xmit()
815 txdes->txdes3 = cpu_to_le32(map); in ftgmac100_hard_start_xmit()
825 first->txdes0 = cpu_to_le32(f_ctl_stat); in ftgmac100_hard_start_xmit()
833 priv->tx_pointer = pointer; in ftgmac100_hard_start_xmit()
848 iowrite32(1, priv->base + FTGMAC100_OFFSET_NPTXPD); in ftgmac100_hard_start_xmit()
857 pointer = priv->tx_pointer; in ftgmac100_hard_start_xmit()
859 first->txdes0 = cpu_to_le32(f_ctl_stat & priv->txdes0_edotr_mask); in ftgmac100_hard_start_xmit()
864 txdes = &priv->txdes[pointer]; in ftgmac100_hard_start_xmit()
865 ctl_stat = le32_to_cpu(txdes->txdes0); in ftgmac100_hard_start_xmit()
867 txdes->txdes0 = cpu_to_le32(ctl_stat & priv->txdes0_edotr_mask); in ftgmac100_hard_start_xmit()
877 netdev->stats.tx_dropped++; in ftgmac100_hard_start_xmit()
887 for (i = 0; i < priv->rx_q_entries; i++) { in ftgmac100_free_buffers()
888 struct ftgmac100_rxdes *rxdes = &priv->rxdes[i]; in ftgmac100_free_buffers()
889 struct sk_buff *skb = priv->rx_skbs[i]; in ftgmac100_free_buffers()
890 dma_addr_t map = le32_to_cpu(rxdes->rxdes3); in ftgmac100_free_buffers()
895 priv->rx_skbs[i] = NULL; in ftgmac100_free_buffers()
896 dma_unmap_single(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE); in ftgmac100_free_buffers()
901 for (i = 0; i < priv->tx_q_entries; i++) { in ftgmac100_free_buffers()
902 struct ftgmac100_txdes *txdes = &priv->txdes[i]; in ftgmac100_free_buffers()
903 struct sk_buff *skb = priv->tx_skbs[i]; in ftgmac100_free_buffers()
908 le32_to_cpu(txdes->txdes0)); in ftgmac100_free_buffers()
915 kfree(priv->rx_skbs); in ftgmac100_free_rings()
916 kfree(priv->tx_skbs); in ftgmac100_free_rings()
919 if (priv->rxdes) in ftgmac100_free_rings()
920 dma_free_coherent(priv->dev, MAX_RX_QUEUE_ENTRIES * in ftgmac100_free_rings()
922 priv->rxdes, priv->rxdes_dma); in ftgmac100_free_rings()
923 priv->rxdes = NULL; in ftgmac100_free_rings()
925 if (priv->txdes) in ftgmac100_free_rings()
926 dma_free_coherent(priv->dev, MAX_TX_QUEUE_ENTRIES * in ftgmac100_free_rings()
928 priv->txdes, priv->txdes_dma); in ftgmac100_free_rings()
929 priv->txdes = NULL; in ftgmac100_free_rings()
932 if (priv->rx_scratch) in ftgmac100_free_rings()
933 dma_free_coherent(priv->dev, RX_BUF_SIZE, in ftgmac100_free_rings()
934 priv->rx_scratch, priv->rx_scratch_dma); in ftgmac100_free_rings()
940 priv->rx_skbs = kcalloc(MAX_RX_QUEUE_ENTRIES, sizeof(void *), in ftgmac100_alloc_rings()
942 if (!priv->rx_skbs) in ftgmac100_alloc_rings()
943 return -ENOMEM; in ftgmac100_alloc_rings()
944 priv->tx_skbs = kcalloc(MAX_TX_QUEUE_ENTRIES, sizeof(void *), in ftgmac100_alloc_rings()
946 if (!priv->tx_skbs) in ftgmac100_alloc_rings()
947 return -ENOMEM; in ftgmac100_alloc_rings()
950 priv->rxdes = dma_alloc_coherent(priv->dev, in ftgmac100_alloc_rings()
952 &priv->rxdes_dma, GFP_KERNEL); in ftgmac100_alloc_rings()
953 if (!priv->rxdes) in ftgmac100_alloc_rings()
954 return -ENOMEM; in ftgmac100_alloc_rings()
955 priv->txdes = dma_alloc_coherent(priv->dev, in ftgmac100_alloc_rings()
957 &priv->txdes_dma, GFP_KERNEL); in ftgmac100_alloc_rings()
958 if (!priv->txdes) in ftgmac100_alloc_rings()
959 return -ENOMEM; in ftgmac100_alloc_rings()
962 priv->rx_scratch = dma_alloc_coherent(priv->dev, in ftgmac100_alloc_rings()
964 &priv->rx_scratch_dma, in ftgmac100_alloc_rings()
966 if (!priv->rx_scratch) in ftgmac100_alloc_rings()
967 return -ENOMEM; in ftgmac100_alloc_rings()
979 priv->rx_q_entries = priv->new_rx_q_entries; in ftgmac100_init_rings()
980 priv->tx_q_entries = priv->new_tx_q_entries; in ftgmac100_init_rings()
982 if (WARN_ON(priv->rx_q_entries < MIN_RX_QUEUE_ENTRIES)) in ftgmac100_init_rings()
986 for (i = 0; i < priv->rx_q_entries; i++) { in ftgmac100_init_rings()
987 rxdes = &priv->rxdes[i]; in ftgmac100_init_rings()
988 rxdes->rxdes0 = 0; in ftgmac100_init_rings()
989 rxdes->rxdes3 = cpu_to_le32(priv->rx_scratch_dma); in ftgmac100_init_rings()
992 rxdes->rxdes0 |= cpu_to_le32(priv->rxdes0_edorr_mask); in ftgmac100_init_rings()
994 if (WARN_ON(priv->tx_q_entries < MIN_RX_QUEUE_ENTRIES)) in ftgmac100_init_rings()
998 for (i = 0; i < priv->tx_q_entries; i++) { in ftgmac100_init_rings()
999 txdes = &priv->txdes[i]; in ftgmac100_init_rings()
1000 txdes->txdes0 = 0; in ftgmac100_init_rings()
1002 txdes->txdes0 |= cpu_to_le32(priv->txdes0_edotr_mask); in ftgmac100_init_rings()
1009 for (i = 0; i < priv->rx_q_entries; i++) { in ftgmac100_alloc_rx_buffers()
1010 struct ftgmac100_rxdes *rxdes = &priv->rxdes[i]; in ftgmac100_alloc_rx_buffers()
1013 return -ENOMEM; in ftgmac100_alloc_rx_buffers()
1020 struct net_device *netdev = bus->priv; in ftgmac100_mdiobus_read()
1025 phycr = ioread32(priv->base + FTGMAC100_OFFSET_PHYCR); in ftgmac100_mdiobus_read()
1034 iowrite32(phycr, priv->base + FTGMAC100_OFFSET_PHYCR); in ftgmac100_mdiobus_read()
1037 phycr = ioread32(priv->base + FTGMAC100_OFFSET_PHYCR); in ftgmac100_mdiobus_read()
1042 data = ioread32(priv->base + FTGMAC100_OFFSET_PHYDATA); in ftgmac100_mdiobus_read()
1050 return -EIO; in ftgmac100_mdiobus_read()
1056 struct net_device *netdev = bus->priv; in ftgmac100_mdiobus_write()
1062 phycr = ioread32(priv->base + FTGMAC100_OFFSET_PHYCR); in ftgmac100_mdiobus_write()
1073 iowrite32(data, priv->base + FTGMAC100_OFFSET_PHYDATA); in ftgmac100_mdiobus_write()
1074 iowrite32(phycr, priv->base + FTGMAC100_OFFSET_PHYCR); in ftgmac100_mdiobus_write()
1077 phycr = ioread32(priv->base + FTGMAC100_OFFSET_PHYCR); in ftgmac100_mdiobus_write()
1086 return -EIO; in ftgmac100_mdiobus_write()
1092 strscpy(info->driver, DRV_NAME, sizeof(info->driver)); in ftgmac100_get_drvinfo()
1093 strscpy(info->bus_info, dev_name(&netdev->dev), sizeof(info->bus_info)); in ftgmac100_get_drvinfo()
1105 ering->rx_max_pending = MAX_RX_QUEUE_ENTRIES; in ftgmac100_get_ringparam()
1106 ering->tx_max_pending = MAX_TX_QUEUE_ENTRIES; in ftgmac100_get_ringparam()
1107 ering->rx_pending = priv->rx_q_entries; in ftgmac100_get_ringparam()
1108 ering->tx_pending = priv->tx_q_entries; in ftgmac100_get_ringparam()
1119 if (ering->rx_pending > MAX_RX_QUEUE_ENTRIES || in ftgmac100_set_ringparam()
1120 ering->tx_pending > MAX_TX_QUEUE_ENTRIES || in ftgmac100_set_ringparam()
1121 ering->rx_pending < MIN_RX_QUEUE_ENTRIES || in ftgmac100_set_ringparam()
1122 ering->tx_pending < MIN_TX_QUEUE_ENTRIES || in ftgmac100_set_ringparam()
1123 !is_power_of_2(ering->rx_pending) || in ftgmac100_set_ringparam()
1124 !is_power_of_2(ering->tx_pending)) in ftgmac100_set_ringparam()
1125 return -EINVAL; in ftgmac100_set_ringparam()
1127 priv->new_rx_q_entries = ering->rx_pending; in ftgmac100_set_ringparam()
1128 priv->new_tx_q_entries = ering->tx_pending; in ftgmac100_set_ringparam()
1130 schedule_work(&priv->reset_task); in ftgmac100_set_ringparam()
1140 pause->autoneg = priv->aneg_pause; in ftgmac100_get_pauseparam()
1141 pause->tx_pause = priv->tx_pause; in ftgmac100_get_pauseparam()
1142 pause->rx_pause = priv->rx_pause; in ftgmac100_get_pauseparam()
1149 struct phy_device *phydev = netdev->phydev; in ftgmac100_set_pauseparam()
1151 priv->aneg_pause = pause->autoneg; in ftgmac100_set_pauseparam()
1152 priv->tx_pause = pause->tx_pause; in ftgmac100_set_pauseparam()
1153 priv->rx_pause = pause->rx_pause; in ftgmac100_set_pauseparam()
1156 phy_set_asym_pause(phydev, pause->rx_pause, pause->tx_pause); in ftgmac100_set_pauseparam()
1159 if (!(phydev && priv->aneg_pause)) in ftgmac100_set_pauseparam()
1185 status = ioread32(priv->base + FTGMAC100_OFFSET_ISR); in ftgmac100_interrupt()
1186 iowrite32(status, priv->base + FTGMAC100_OFFSET_ISR); in ftgmac100_interrupt()
1191 netdev->stats.rx_over_errors++; in ftgmac100_interrupt()
1195 netdev->stats.rx_fifo_errors++; in ftgmac100_interrupt()
1199 netdev->stats.tx_fifo_errors++; in ftgmac100_interrupt()
1201 /* AHB error -> Reset the chip */ in ftgmac100_interrupt()
1206 iowrite32(0, priv->base + FTGMAC100_OFFSET_IER); in ftgmac100_interrupt()
1207 schedule_work(&priv->reset_task); in ftgmac100_interrupt()
1214 priv->need_mac_restart = true; in ftgmac100_interrupt()
1221 iowrite32(new_mask, priv->base + FTGMAC100_OFFSET_IER); in ftgmac100_interrupt()
1224 napi_schedule_irqoff(&priv->napi); in ftgmac100_interrupt()
1231 struct ftgmac100_rxdes *rxdes = &priv->rxdes[priv->rx_pointer]; in ftgmac100_check_rx()
1234 return !!(rxdes->rxdes0 & cpu_to_le32(FTGMAC100_RXDES0_RXPKT_RDY)); in ftgmac100_check_rx()
1256 if (unlikely(priv->need_mac_restart)) { in ftgmac100_poll()
1258 priv->need_mac_restart = false; in ftgmac100_poll()
1260 /* Re-enable "bad" interrupts */ in ftgmac100_poll()
1262 priv->base + FTGMAC100_OFFSET_IER); in ftgmac100_poll()
1272 /* We are about to re-enable all interrupts. However in ftgmac100_poll()
1275 * to re-check if there's something to process in ftgmac100_poll()
1278 priv->base + FTGMAC100_OFFSET_ISR); in ftgmac100_poll()
1283 ioread32(priv->base + FTGMAC100_OFFSET_ISR); in ftgmac100_poll()
1295 priv->base + FTGMAC100_OFFSET_IER); in ftgmac100_poll()
1305 /* Re-init descriptors (adjust queue sizes) */ in ftgmac100_init_all()
1318 /* Re-enable the device */ in ftgmac100_init_all()
1319 napi_enable(&priv->napi); in ftgmac100_init_all()
1320 netif_start_queue(priv->netdev); in ftgmac100_init_all()
1323 iowrite32(FTGMAC100_INT_ALL, priv->base + FTGMAC100_OFFSET_IER); in ftgmac100_init_all()
1330 struct net_device *netdev = priv->netdev; in ftgmac100_reset()
1337 if (netdev->phydev) in ftgmac100_reset()
1338 mutex_lock(&netdev->phydev->lock); in ftgmac100_reset()
1339 if (priv->mii_bus) in ftgmac100_reset()
1340 mutex_lock(&priv->mii_bus->mdio_lock); in ftgmac100_reset()
1349 napi_disable(&priv->napi); in ftgmac100_reset()
1368 if (priv->mii_bus) in ftgmac100_reset()
1369 mutex_unlock(&priv->mii_bus->mdio_lock); in ftgmac100_reset()
1370 if (netdev->phydev) in ftgmac100_reset()
1371 mutex_unlock(&netdev->phydev->lock); in ftgmac100_reset()
1386 struct phy_device *phydev = netdev->phydev; in ftgmac100_adjust_link()
1391 if (!phydev->link) in ftgmac100_adjust_link()
1394 new_speed = phydev->speed; in ftgmac100_adjust_link()
1397 if (priv->aneg_pause) { in ftgmac100_adjust_link()
1398 rx_pause = tx_pause = phydev->pause; in ftgmac100_adjust_link()
1399 if (phydev->asym_pause) in ftgmac100_adjust_link()
1402 rx_pause = priv->rx_pause; in ftgmac100_adjust_link()
1403 tx_pause = priv->tx_pause; in ftgmac100_adjust_link()
1407 if (phydev->speed == priv->cur_speed && in ftgmac100_adjust_link()
1408 phydev->duplex == priv->cur_duplex && in ftgmac100_adjust_link()
1409 rx_pause == priv->rx_pause && in ftgmac100_adjust_link()
1410 tx_pause == priv->tx_pause) in ftgmac100_adjust_link()
1416 if (new_speed || priv->cur_speed) in ftgmac100_adjust_link()
1419 priv->cur_speed = new_speed; in ftgmac100_adjust_link()
1420 priv->cur_duplex = phydev->duplex; in ftgmac100_adjust_link()
1421 priv->rx_pause = rx_pause; in ftgmac100_adjust_link()
1422 priv->tx_pause = tx_pause; in ftgmac100_adjust_link()
1429 iowrite32(0, priv->base + FTGMAC100_OFFSET_IER); in ftgmac100_adjust_link()
1434 if (netdev->phydev) in ftgmac100_adjust_link()
1435 mutex_unlock(&netdev->phydev->lock); in ftgmac100_adjust_link()
1439 if (netdev->phydev) in ftgmac100_adjust_link()
1440 mutex_lock(&netdev->phydev->lock); in ftgmac100_adjust_link()
1447 struct platform_device *pdev = to_platform_device(priv->dev); in ftgmac100_mii_probe()
1448 struct device_node *np = pdev->dev.of_node; in ftgmac100_mii_probe()
1464 * On the Aspeed SoC there are additionally straps and SCU in ftgmac100_mii_probe()
1468 * those SoC specific bits and assume the device-tree is in ftgmac100_mii_probe()
1469 * right and the SCU has been configured properly by pinmux in ftgmac100_mii_probe()
1472 if (priv->is_aspeed && !(phy_interface_mode_is_rgmii(phy_intf))) { in ftgmac100_mii_probe()
1478 phydev = phy_find_first(priv->mii_bus); in ftgmac100_mii_probe()
1480 netdev_info(netdev, "%s: no PHY found\n", netdev->name); in ftgmac100_mii_probe()
1481 return -ENODEV; in ftgmac100_mii_probe()
1488 netdev_err(netdev, "%s: Could not attach to PHY\n", netdev->name); in ftgmac100_mii_probe()
1515 /* When using NC-SI we force the speed to 100Mbit/s full duplex, in ftgmac100_open()
1521 if (priv->use_ncsi) { in ftgmac100_open()
1522 priv->cur_duplex = DUPLEX_FULL; in ftgmac100_open()
1523 priv->cur_speed = SPEED_100; in ftgmac100_open()
1525 priv->cur_duplex = 0; in ftgmac100_open()
1526 priv->cur_speed = 0; in ftgmac100_open()
1535 netif_napi_add(netdev, &priv->napi, ftgmac100_poll); in ftgmac100_open()
1538 err = request_irq(netdev->irq, ftgmac100_interrupt, 0, netdev->name, netdev); in ftgmac100_open()
1540 netdev_err(netdev, "failed to request irq %d\n", netdev->irq); in ftgmac100_open()
1551 if (netdev->phydev) { in ftgmac100_open()
1553 phy_start(netdev->phydev); in ftgmac100_open()
1555 if (priv->use_ncsi) { in ftgmac100_open()
1556 /* If using NC-SI, set our carrier on and start the stack */ in ftgmac100_open()
1560 err = ncsi_start_dev(priv->ndev); in ftgmac100_open()
1568 phy_stop(netdev->phydev); in ftgmac100_open()
1569 napi_disable(&priv->napi); in ftgmac100_open()
1573 free_irq(netdev->irq, netdev); in ftgmac100_open()
1575 netif_napi_del(&priv->napi); in ftgmac100_open()
1577 iowrite32(0, priv->base + FTGMAC100_OFFSET_IER); in ftgmac100_open()
1595 iowrite32(0, priv->base + FTGMAC100_OFFSET_IER); in ftgmac100_stop()
1598 napi_disable(&priv->napi); in ftgmac100_stop()
1599 netif_napi_del(&priv->napi); in ftgmac100_stop()
1600 if (netdev->phydev) in ftgmac100_stop()
1601 phy_stop(netdev->phydev); in ftgmac100_stop()
1602 if (priv->use_ncsi) in ftgmac100_stop()
1603 ncsi_stop_dev(priv->ndev); in ftgmac100_stop()
1606 free_irq(netdev->irq, netdev); in ftgmac100_stop()
1618 iowrite32(0, priv->base + FTGMAC100_OFFSET_IER); in ftgmac100_tx_timeout()
1621 schedule_work(&priv->reset_task); in ftgmac100_tx_timeout()
1628 netdev_features_t changed = netdev->features ^ features; in ftgmac100_set_features()
1637 maccr = ioread32(priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_set_features()
1638 if (priv->netdev->features & NETIF_F_HW_VLAN_CTAG_RX) in ftgmac100_set_features()
1642 iowrite32(maccr, priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_set_features()
1654 ftgmac100_interrupt(netdev->irq, netdev); in ftgmac100_poll_controller()
1679 struct platform_device *pdev = to_platform_device(priv->dev); in ftgmac100_setup_mdio()
1680 struct device_node *np = pdev->dev.of_node; in ftgmac100_setup_mdio()
1686 priv->mii_bus = mdiobus_alloc(); in ftgmac100_setup_mdio()
1687 if (!priv->mii_bus) in ftgmac100_setup_mdio()
1688 return -EIO; in ftgmac100_setup_mdio()
1690 if (of_device_is_compatible(np, "aspeed,ast2400-mac") || in ftgmac100_setup_mdio()
1691 of_device_is_compatible(np, "aspeed,ast2500-mac")) { in ftgmac100_setup_mdio()
1694 /* For the AST2400 and AST2500 this driver only supports the in ftgmac100_setup_mdio()
1697 reg = ioread32(priv->base + FTGMAC100_OFFSET_REVR); in ftgmac100_setup_mdio()
1699 iowrite32(reg, priv->base + FTGMAC100_OFFSET_REVR); in ftgmac100_setup_mdio()
1702 priv->mii_bus->name = "ftgmac100_mdio"; in ftgmac100_setup_mdio()
1703 snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s-%d", in ftgmac100_setup_mdio()
1704 pdev->name, pdev->id); in ftgmac100_setup_mdio()
1705 priv->mii_bus->parent = priv->dev; in ftgmac100_setup_mdio()
1706 priv->mii_bus->priv = priv->netdev; in ftgmac100_setup_mdio()
1707 priv->mii_bus->read = ftgmac100_mdiobus_read; in ftgmac100_setup_mdio()
1708 priv->mii_bus->write = ftgmac100_mdiobus_write; in ftgmac100_setup_mdio()
1711 priv->mii_bus->irq[i] = PHY_POLL; in ftgmac100_setup_mdio()
1715 err = of_mdiobus_register(priv->mii_bus, mdio_np); in ftgmac100_setup_mdio()
1717 dev_err(priv->dev, "Cannot register MDIO bus!\n"); in ftgmac100_setup_mdio()
1726 mdiobus_free(priv->mii_bus); in ftgmac100_setup_mdio()
1734 if (!netdev->phydev) in ftgmac100_phy_disconnect()
1737 phy_disconnect(netdev->phydev); in ftgmac100_phy_disconnect()
1738 if (of_phy_is_fixed_link(priv->dev->of_node)) in ftgmac100_phy_disconnect()
1739 of_phy_deregister_fixed_link(priv->dev->of_node); in ftgmac100_phy_disconnect()
1741 if (priv->use_ncsi) in ftgmac100_phy_disconnect()
1742 fixed_phy_unregister(netdev->phydev); in ftgmac100_phy_disconnect()
1749 if (!priv->mii_bus) in ftgmac100_destroy_mdio()
1752 mdiobus_unregister(priv->mii_bus); in ftgmac100_destroy_mdio()
1753 mdiobus_free(priv->mii_bus); in ftgmac100_destroy_mdio()
1758 if (unlikely(nd->state != ncsi_dev_state_functional)) in ftgmac100_ncsi_handler()
1761 netdev_dbg(nd->dev, "NCSI interface %s\n", in ftgmac100_ncsi_handler()
1762 nd->link_up ? "up" : "down"); in ftgmac100_ncsi_handler()
1770 clk = devm_clk_get(priv->dev, NULL /* MACCLK */); in ftgmac100_setup_clk()
1773 priv->clk = clk; in ftgmac100_setup_clk()
1774 rc = clk_prepare_enable(priv->clk); in ftgmac100_setup_clk()
1782 rc = clk_set_rate(priv->clk, priv->use_ncsi ? FTGMAC_25MHZ : in ftgmac100_setup_clk()
1789 * RGMII, or the controller is not an ASPEED-based controller. in ftgmac100_setup_clk()
1791 priv->rclk = devm_clk_get_optional(priv->dev, "RCLK"); in ftgmac100_setup_clk()
1792 rc = clk_prepare_enable(priv->rclk); in ftgmac100_setup_clk()
1797 clk_disable_unprepare(priv->clk); in ftgmac100_setup_clk()
1827 return -ENXIO; in ftgmac100_probe()
1836 err = -ENOMEM; in ftgmac100_probe()
1840 SET_NETDEV_DEV(netdev, &pdev->dev); in ftgmac100_probe()
1842 netdev->ethtool_ops = &ftgmac100_ethtool_ops; in ftgmac100_probe()
1843 netdev->netdev_ops = &ftgmac100_netdev_ops; in ftgmac100_probe()
1844 netdev->watchdog_timeo = 5 * HZ; in ftgmac100_probe()
1850 priv->netdev = netdev; in ftgmac100_probe()
1851 priv->dev = &pdev->dev; in ftgmac100_probe()
1852 INIT_WORK(&priv->reset_task, ftgmac100_reset_task); in ftgmac100_probe()
1855 priv->res = request_mem_region(res->start, resource_size(res), in ftgmac100_probe()
1856 dev_name(&pdev->dev)); in ftgmac100_probe()
1857 if (!priv->res) { in ftgmac100_probe()
1858 dev_err(&pdev->dev, "Could not reserve memory region\n"); in ftgmac100_probe()
1859 err = -ENOMEM; in ftgmac100_probe()
1863 priv->base = ioremap(res->start, resource_size(res)); in ftgmac100_probe()
1864 if (!priv->base) { in ftgmac100_probe()
1865 dev_err(&pdev->dev, "Failed to ioremap ethernet registers\n"); in ftgmac100_probe()
1866 err = -EIO; in ftgmac100_probe()
1870 netdev->irq = irq; in ftgmac100_probe()
1873 priv->tx_pause = true; in ftgmac100_probe()
1874 priv->rx_pause = true; in ftgmac100_probe()
1875 priv->aneg_pause = true; in ftgmac100_probe()
1882 np = pdev->dev.of_node; in ftgmac100_probe()
1883 if (np && (of_device_is_compatible(np, "aspeed,ast2400-mac") || in ftgmac100_probe()
1884 of_device_is_compatible(np, "aspeed,ast2500-mac") || in ftgmac100_probe()
1885 of_device_is_compatible(np, "aspeed,ast2600-mac"))) { in ftgmac100_probe()
1886 priv->rxdes0_edorr_mask = BIT(30); in ftgmac100_probe()
1887 priv->txdes0_edotr_mask = BIT(30); in ftgmac100_probe()
1888 priv->is_aspeed = true; in ftgmac100_probe()
1890 priv->rxdes0_edorr_mask = BIT(15); in ftgmac100_probe()
1891 priv->txdes0_edotr_mask = BIT(15); in ftgmac100_probe()
1894 if (np && of_get_property(np, "use-ncsi", NULL)) { in ftgmac100_probe()
1896 dev_err(&pdev->dev, "NCSI stack not enabled\n"); in ftgmac100_probe()
1897 err = -EINVAL; in ftgmac100_probe()
1901 dev_info(&pdev->dev, "Using NCSI interface\n"); in ftgmac100_probe()
1902 priv->use_ncsi = true; in ftgmac100_probe()
1903 priv->ndev = ncsi_register_dev(netdev, ftgmac100_ncsi_handler); in ftgmac100_probe()
1904 if (!priv->ndev) { in ftgmac100_probe()
1905 err = -EINVAL; in ftgmac100_probe()
1911 dev_err(&pdev->dev, "failed to register fixed PHY device\n"); in ftgmac100_probe()
1918 dev_err(&pdev->dev, "Connecting PHY failed\n"); in ftgmac100_probe()
1926 dev_err(&pdev->dev, "Failed to register fixed PHY\n"); in ftgmac100_probe()
1930 phy = of_phy_get_and_connect(priv->netdev, np, in ftgmac100_probe()
1933 dev_err(&pdev->dev, "Failed to connect to fixed PHY\n"); in ftgmac100_probe()
1935 err = -EINVAL; in ftgmac100_probe()
1941 } else if (np && of_get_property(np, "phy-handle", NULL)) { in ftgmac100_probe()
1948 if (of_device_is_compatible(np, "aspeed,ast2400-mac") || in ftgmac100_probe()
1949 of_device_is_compatible(np, "aspeed,ast2500-mac")) { in ftgmac100_probe()
1955 phy = of_phy_get_and_connect(priv->netdev, np, in ftgmac100_probe()
1958 dev_err(&pdev->dev, "Failed to connect to phy\n"); in ftgmac100_probe()
1959 err = -EINVAL; in ftgmac100_probe()
1976 priv->use_ncsi = false; in ftgmac100_probe()
1983 dev_err(priv->dev, "MII probe failed!\n"); in ftgmac100_probe()
1989 if (priv->is_aspeed) { in ftgmac100_probe()
1995 if (of_device_is_compatible(np, "aspeed,ast2600-mac")) in ftgmac100_probe()
1997 priv->base + FTGMAC100_OFFSET_TM); in ftgmac100_probe()
2001 priv->rx_q_entries = priv->new_rx_q_entries = DEF_RX_QUEUE_ENTRIES; in ftgmac100_probe()
2002 priv->tx_q_entries = priv->new_tx_q_entries = DEF_TX_QUEUE_ENTRIES; in ftgmac100_probe()
2005 netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_HW_CSUM | in ftgmac100_probe()
2009 if (priv->use_ncsi) in ftgmac100_probe()
2010 netdev->hw_features |= NETIF_F_HW_VLAN_CTAG_FILTER; in ftgmac100_probe()
2013 if (np && (of_device_is_compatible(np, "aspeed,ast2400-mac"))) in ftgmac100_probe()
2014 netdev->hw_features &= ~NETIF_F_HW_CSUM; in ftgmac100_probe()
2017 if (priv->use_ncsi && of_device_is_compatible(np, "aspeed,ast2600-mac")) in ftgmac100_probe()
2018 netdev->hw_features &= ~NETIF_F_HW_CSUM; in ftgmac100_probe()
2020 if (np && of_get_property(np, "no-hw-checksum", NULL)) in ftgmac100_probe()
2021 netdev->hw_features &= ~(NETIF_F_HW_CSUM | NETIF_F_RXCSUM); in ftgmac100_probe()
2022 netdev->features |= netdev->hw_features; in ftgmac100_probe()
2027 dev_err(&pdev->dev, "Failed to register netdev\n"); in ftgmac100_probe()
2031 netdev_info(netdev, "irq %d, mapped at %p\n", netdev->irq, priv->base); in ftgmac100_probe()
2036 clk_disable_unprepare(priv->rclk); in ftgmac100_probe()
2037 clk_disable_unprepare(priv->clk); in ftgmac100_probe()
2041 if (priv->ndev) in ftgmac100_probe()
2042 ncsi_unregister_dev(priv->ndev); in ftgmac100_probe()
2045 iounmap(priv->base); in ftgmac100_probe()
2047 release_resource(priv->res); in ftgmac100_probe()
2062 if (priv->ndev) in ftgmac100_remove()
2063 ncsi_unregister_dev(priv->ndev); in ftgmac100_remove()
2066 clk_disable_unprepare(priv->rclk); in ftgmac100_remove()
2067 clk_disable_unprepare(priv->clk); in ftgmac100_remove()
2069 /* There's a small chance the reset task will have been re-queued, in ftgmac100_remove()
2072 cancel_work_sync(&priv->reset_task); in ftgmac100_remove()
2077 iounmap(priv->base); in ftgmac100_remove()
2078 release_resource(priv->res); in ftgmac100_remove()
2080 netif_napi_del(&priv->napi); in ftgmac100_remove()
2100 MODULE_AUTHOR("Po-Yu Chuang <ratbert@faraday-tech.com>");