Lines Matching +full:0 +full:x0084

12 #define ECM_TYPE 0x0000
13 #define ECM_REVISION_MASK 0x000000FF
14 #define ECM_REVISION_SHIFT 0
15 #define ECM_VERSION_MASK 0x0000FF00
17 #define ECM_QUEUE_COUNT_MASK 0x00070000
19 #define ECM_GATE_CONTROL 0x02000000
22 #define ECM_SYSTEM_TIME_LOW 0x0008
23 #define ECM_SYSTEM_TIME_HIGH 0x000C
26 #define ECM_CLOCK_RATE 0x0010
27 #define ECM_CLOCK_RATE_OFFSET_MASK 0x7FFFFFFF
28 #define ECM_CLOCK_RATE_OFFSET_SIGN 0x80000000
31 #define ECM_INT_ENABLE 0x0018
32 #define ECM_INT_ACTIVE 0x001C
33 #define ECM_INT_ACKNOWLEDGE 0x001C
34 #define ECM_INT_LINK 0x00000020
35 #define ECM_INT_TX_0 0x00000100
36 #define ECM_INT_RX_0 0x00000200
38 #define ECM_INT_ALL 0x7FFFFFFF
39 #define ECM_INT_DISABLE 0x80000000
42 #define ECM_RESET 0x0020
43 #define ECM_RESET_COMMON 0x00000001
44 #define ECM_RESET_CHANNEL 0x00000100
45 #define ECM_RESET_TXRX 0x00010000
48 #define ECM_COUNTER_LOW 0x0028
49 #define ECM_COUNTER_HIGH 0x002C
52 #define ECM_INT_DELAY 0x0030
53 #define ECM_INT_DELAY_MASK 0xF0
59 #define ECM_STATUS 0x0080
60 #define ECM_LINK_MODE_OFF 0x01000000
61 #define ECM_LINK_MODE_100 0x02000000
62 #define ECM_LINK_MODE_1000 0x04000000
63 #define ECM_NO_LINK 0x01000000
64 #define ECM_LINK_MODE_MASK 0x06000000
67 #define ECM_MD_CONTROL 0x0084
68 #define ECM_MD_STATUS 0x0084
69 #define ECM_MD_PREAMBLE 0x00000001
70 #define ECM_MD_READ 0x00000004
71 #define ECM_MD_WRITE 0x00000002
72 #define ECM_MD_ADDR_MASK 0x000000F8
74 #define ECM_MD_PHY_ADDR_MASK 0x00001F00
76 #define ECM_MD_BUSY 0x00000001
77 #define ECM_MD_DATA_MASK 0xFFFF0000
81 #define ECM_STAT 0x00B0
82 #define ECM_STAT_RX_ERR_MASK 0x000000FF
83 #define ECM_STAT_RX_ERR_SHIFT 0
84 #define ECM_STAT_INV_FRM_MASK 0x0000FF00
86 #define ECM_STAT_FWD_RX_ERR_MASK 0x00FF0000
90 #define TSNEP_MAC_SIZE 0x4000
91 #define TSNEP_QUEUE_SIZE 0x1000
93 			  (__n) == 0 ? \
94 			  0 : \
102 #define TSNEP_INFO 0x0100
103 #define TSNEP_INFO_TX_TIME 0x00010000
104 #define TSNEP_CONTROL 0x0108
105 #define TSNEP_CONTROL_TX_RESET 0x00000001
106 #define TSNEP_CONTROL_TX_ENABLE 0x00000002
107 #define TSNEP_CONTROL_TX_DMA_ERROR 0x00000010
108 #define TSNEP_CONTROL_TX_DESC_ERROR 0x00000020
109 #define TSNEP_CONTROL_RX_RESET 0x00000100
110 #define TSNEP_CONTROL_RX_ENABLE 0x00000200
111 #define TSNEP_CONTROL_RX_DISABLE 0x00000400
112 #define TSNEP_CONTROL_RX_DMA_ERROR 0x00001000
113 #define TSNEP_CONTROL_RX_DESC_ERROR 0x00002000
114 #define TSNEP_TX_DESC_ADDR_LOW 0x0140
115 #define TSNEP_TX_DESC_ADDR_HIGH 0x0144
116 #define TSNEP_RX_DESC_ADDR_LOW 0x0180
117 #define TSNEP_RX_DESC_ADDR_HIGH 0x0184
118 #define TSNEP_RESET_OWNER_COUNTER 0x01
119 #define TSNEP_RX_STATISTIC 0x0190
120 #define TSNEP_RX_STATISTIC_NO_DESC_MASK 0x000000FF
121 #define TSNEP_RX_STATISTIC_NO_DESC_SHIFT 0
122 #define TSNEP_RX_STATISTIC_BUFFER_TOO_SMALL_MASK 0x0000FF00
124 #define TSNEP_RX_STATISTIC_FIFO_OVERFLOW_MASK 0x00FF0000
126 #define TSNEP_RX_STATISTIC_INVALID_FRAME_MASK 0xFF000000
128 #define TSNEP_RX_STATISTIC_NO_DESC 0x0190
129 #define TSNEP_RX_STATISTIC_BUFFER_TOO_SMALL 0x0191
130 #define TSNEP_RX_STATISTIC_FIFO_OVERFLOW 0x0192
131 #define TSNEP_RX_STATISTIC_INVALID_FRAME 0x0193
132 #define TSNEP_MAC_ADDRESS_LOW 0x0800
133 #define TSNEP_MAC_ADDRESS_HIGH 0x0804
134 #define TSNEP_RX_FILTER 0x0806
135 #define TSNEP_RX_FILTER_ACCEPT_ALL_MULTICASTS 0x0001
136 #define TSNEP_RX_FILTER_ACCEPT_ALL_UNICASTS 0x0002
137 #define TSNEP_GC 0x0808
138 #define TSNEP_GC_ENABLE_A 0x00000002
139 #define TSNEP_GC_ENABLE_B 0x00000004
140 #define TSNEP_GC_DISABLE 0x00000008
141 #define TSNEP_GC_ENABLE_TIMEOUT 0x00000010
142 #define TSNEP_GC_ACTIVE_A 0x00000002
143 #define TSNEP_GC_ACTIVE_B 0x00000004
144 #define TSNEP_GC_CHANGE_AB 0x00000008
145 #define TSNEP_GC_TIMEOUT_ACTIVE 0x00000010
146 #define TSNEP_GC_TIMEOUT_SIGNAL 0x00000020
147 #define TSNEP_GC_LIST_ERROR 0x00000080
148 #define TSNEP_GC_OPEN 0x00FF0000
150 #define TSNEP_GC_NEXT_OPEN 0xFF000000
153 #define TSNEP_GC_TIME 0x080C
154 #define TSNEP_GC_CHANGE 0x0810
155 #define TSNEP_GCL_A 0x2000
156 #define TSNEP_GCL_B 0x2800
158 #define TSNEP_RX_ASSIGN 0x0840
159 #define TSNEP_RX_ASSIGN_ACTIVE 0x00000001
160 #define TSNEP_RX_ASSIGN_QUEUE_MASK 0x00000006
163 #define TSNEP_RX_ASSIGN_ETHER_TYPE 0x0880
174 #define TSNEP_GCL_MASK 0x000000FF
175 #define TSNEP_GCL_INSERT 0x20000000
176 #define TSNEP_GCL_CHANGE 0x40000000
177 #define TSNEP_GCL_LAST 0x80000000
186 #define TSNEP_DESC_OWNER_COUNTER_MASK 0xC0000000
188 #define TSNEP_DESC_LENGTH_MASK 0x00003FFF
189 #define TSNEP_DESC_INTERRUPT_FLAG 0x00040000
190 #define TSNEP_DESC_EXTENDED_WRITEBACK_FLAG 0x00080000
191 #define TSNEP_DESC_NO_LINK_FLAG 0x01000000
202 #define TSNEP_TX_DESC_OWNER_MASK 0xE0000000
203 #define TSNEP_TX_DESC_OWNER_USER_FLAG 0x20000000
204 #define TSNEP_TX_DESC_LAST_FRAGMENT_FLAG 0x00010000
205 #define TSNEP_TX_DESC_DATA_AFTER_DESC_FLAG 0x00020000
217 #define TSNEP_TX_DESC_UNDERRUN_ERROR_FLAG 0x00010000
218 #define TSNEP_TX_DESC_DMA_DELAY_FIRST_DATA_MASK 0x0000FFFC
220 #define TSNEP_TX_DESC_DMA_DELAY_LAST_DATA_MASK 0xFFFC0000
232 #define TSNEP_RX_DESC_BUFFER_SIZE_MASK 0x00003FFC