Lines Matching +full:0 +full:x5e
14 #define DM9051_ID 0x9051
16 #define DM9051_NCR 0x00
17 #define DM9051_NSR 0x01
18 #define DM9051_TCR 0x02
19 #define DM9051_RCR 0x05
20 #define DM9051_BPTR 0x08
21 #define DM9051_FCR 0x0A
22 #define DM9051_EPCR 0x0B
23 #define DM9051_EPAR 0x0C
24 #define DM9051_EPDRL 0x0D
25 #define DM9051_EPDRH 0x0E
26 #define DM9051_PAR 0x10
27 #define DM9051_MAR 0x16
28 #define DM9051_GPCR 0x1E
29 #define DM9051_GPR 0x1F
31 #define DM9051_VIDL 0x28
32 #define DM9051_VIDH 0x29
33 #define DM9051_PIDL 0x2A
34 #define DM9051_PIDH 0x2B
35 #define DM9051_SMCR 0x2F
36 #define DM9051_ATCR 0x30
37 #define DM9051_SPIBCR 0x38
38 #define DM9051_INTCR 0x39
39 #define DM9051_PPCR 0x3D
41 #define DM9051_MPCR 0x55
42 #define DM9051_LMCR 0x57
43 #define DM9051_MBNDRY 0x5E
45 #define DM9051_MRRL 0x74
46 #define DM9051_MRRH 0x75
47 #define DM9051_MWRL 0x7A
48 #define DM9051_MWRH 0x7B
49 #define DM9051_TXPLL 0x7C
50 #define DM9051_TXPLH 0x7D
51 #define DM9051_ISR 0x7E
52 #define DM9051_IMR 0x7F
54 #define DM_SPI_MRCMDX 0x70
55 #define DM_SPI_MRCMD 0x72
56 #define DM_SPI_MWCMD 0x78
58 #define DM_SPI_WR 0x80
62 /* 0x00 */
65 #define NCR_RST BIT(0)
66 /* 0x01 */
72 /* 0x02 */
74 #define TCR_TXREQ BIT(0)
75 /* 0x05 */
81 #define RCR_RXEN BIT(0)
83 /* 0x06 */
91 #define RSR_FOE BIT(0)
94 /* 0x0A */
97 #define FCR_FLCE BIT(0)
99 /* 0x0B */
104 #define EPCR_ERRE BIT(0)
105 /* 0x1E */
106 #define GPCR_GEP_CNTL BIT(0)
107 /* 0x1F */
108 #define GPR_PHY_OFF BIT(0)
109 /* 0x30 */
111 /* 0x39 */
112 #define INTCR_POL_LOW (1 << 0)
113 #define INTCR_POL_HIGH (0 << 0)
114 /* 0x3D */
116 #define PPCR_PAUSE_COUNT 0x08
117 /* 0x55 */
119 #define MPCR_RSTRX BIT(0)
120 /* 0x57 */
122 /* Value 0x81 : bit[7] = 1, bit[2] = 0, bit[1:0] = 01b */
125 #define LMCR_TYPED0 BIT(0)
127 /* 0x5E */
129 /* 0xFE */
135 #define ISR_PRS BIT(0)
139 /* 0xFF */
143 #define IMR_PRM BIT(0)
148 #define DM9051_PHY 0x40 /* PHY address 0x01 */
149 #define DM9051_PKT_RDY 0x01 /* Packet ready to receive */
153 #define DM_EEPROM_MAGIC 0x9051