2  * Copyright (c) 2005-2008 Chelsio, Inc. All rights reserved.
14  *      - Redistributions of source code must retain the above
18  *      - Redistributions in binary form must reproduce the above
88 	for (err = 0; rv->mmd_addr && !err; rv++) {  in set_phy_regs()
89 		if (rv->clear_bits == 0xffff)  in set_phy_regs()
90 			err = t3_mdio_write(phy, rv->mmd_addr, rv->reg_addr,  in set_phy_regs()
91 					    rv->set_bits);  in set_phy_regs()
93 			err = t3_mdio_change_bits(phy, rv->mmd_addr,  in set_phy_regs()
94 						  rv->reg_addr, rv->clear_bits,  in set_phy_regs()
95 						  rv->set_bits);  in set_phy_regs()
103 		phy->mdio.prtad == 0 ? F_GPIO7_OUT_VAL : F_GPIO2_OUT_VAL;  in ael100x_txon()
106 	t3_set_reg_field(phy->adapter, A_T3DBG_GPIO_EN, 0, tx_on_gpio);  in ael100x_txon()
111  * Read an 8-bit word from a device attached to the PHY's i2c bus.
136 	CH_WARN(phy->adapter, "PHY %u i2c read of dev.addr %#x.%#x timed out\n",  in ael_i2c_rd()
137 		phy->mdio.prtad, dev_addr, word_addr);  in ael_i2c_rd()
138 	return -ETIMEDOUT;  in ael_i2c_rd()
147 		err = mdio_set_flag(&phy->mdio, phy->mdio.prtad,  in ael1002_power_down()
174  * Get link status for a 10GBASE-R device.
217 		   "10GBASE-R");  in t3_ael1002_phy_prep()
243 		   "10GBASE-SR");  in t3_ael1006_phy_prep()
258 	/* see SFF-8472 for below */  in ael2xxx_get_module_type()
276 	v = ael_i2c_rd(phy, MODULE_DEV_ADDR, 10);  in ael2xxx_get_module_type()
284 		return v > 10 ? phy_modtype_twinax_long : phy_modtype_twinax;  in ael2xxx_get_module_type()
291  * Code to support the Aeluros/NetLogic 2005 10Gb PHY.
310 	if (phy->priv != edc_sr)  in ael2005_setup_sr_edc()
318 				    phy->phy_cache[i],  in ael2005_setup_sr_edc()
319 				    phy->phy_cache[i + 1]);  in ael2005_setup_sr_edc()
321 		phy->priv = edc_sr;  in ael2005_setup_sr_edc()
346 	if (phy->priv != edc_twinax)  in ael2005_setup_twinax_edc()
354 				    phy->phy_cache[i],  in ael2005_setup_twinax_edc()
355 				    phy->phy_cache[i + 1]);  in ael2005_setup_twinax_edc()
357 		phy->priv = edc_twinax;  in ael2005_setup_twinax_edc()
425 	phy->priv = edc_none;  in ael2005_reset()
435 	phy->modtype = err;  in ael2005_reset()
474 		phy->modtype = ret;  in ael2005_intr_handler()
476 			edc_needed = phy->priv;       /* on unplug retain EDC */  in ael2005_intr_handler()
483 		if (edc_needed != phy->priv) {  in ael2005_intr_handler()
514 		  SUPPORTED_IRQ, "10GBASE-R");  in t3_ael2005_phy_prep()
526 		/* set CDR offset to 10 */  in ael2020_setup_sr_edc()
529 		/* adjust 10G RX bias current */  in ael2020_setup_sr_edc()
544 	phy->priv = edc_sr;  in ael2020_setup_sr_edc()
584 	if (phy->priv != edc_twinax)  in ael2020_setup_twinax_edc()
592 				    phy->phy_cache[i],  in ael2020_setup_twinax_edc()
593 				    phy->phy_cache[i + 1]);  in ael2020_setup_twinax_edc()
597 		phy->priv = edc_twinax;  in ael2020_setup_twinax_edc()
652 		t3_link_changed(phy->adapter,  in ael2020_intr_enable()
739 	phy->priv = edc_none;  in ael2020_reset()
748 	phy->modtype = (u8)err;  in ael2020_reset()
780 		phy->modtype = (u8)ret;  in ael2020_intr_handler()
782 			edc_needed = phy->priv;       /* on unplug retain EDC */  in ael2020_intr_handler()
789 		if (edc_needed != phy->priv) {  in ael2020_intr_handler()
820 		  SUPPORTED_IRQ, "10GBASE-R");  in t3_ael2020_phy_prep()
827  * Get link status for a 10GBASE-X device.
872 		  "10GBASE-CX4");  in t3_qt2045_phy_prep()
881 		phy->mdio.prtad = 1;  in t3_qt2045_phy_prep()
895 		int prtad = phy->mdio.prtad;  in xaui_direct_get_link_status()
897 		status = t3_read_reg(phy->adapter,  in xaui_direct_get_link_status()
899 		    t3_read_reg(phy->adapter,  in xaui_direct_get_link_status()
901 		    t3_read_reg(phy->adapter,  in xaui_direct_get_link_status()
903 		    t3_read_reg(phy->adapter,  in xaui_direct_get_link_status()
934 		  "10GBASE-CX4");  in t3_xaui_direct_phy_prep()