Lines Matching +full:tx +full:- +full:pcs
1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2004-2006 Atmel Corporation
34 #define MACB_TBQP 0x001c /* TX Q Base Address */
101 #define GEM_TXPTPUNI 0x00D8 /* PTP TX Unicast address */
113 #define GEM_TX64CNT 0x0118 /* 64 byte Frames TX counter */
114 #define GEM_TX65CNT 0x011c /* 65-127 byte Frames TX counter */
115 #define GEM_TX128CNT 0x0120 /* 128-255 byte Frames TX counter */
116 #define GEM_TX256CNT 0x0124 /* 256-511 byte Frames TX counter */
117 #define GEM_TX512CNT 0x0128 /* 512-1023 byte Frames TX counter */
118 #define GEM_TX1024CNT 0x012c /* 1024-1518 byte Frames TX counter */
119 #define GEM_TX1519CNT 0x0130 /* 1519+ byte Frames TX counter */
120 #define GEM_TXURUNCNT 0x0134 /* TX under run error counter */
135 #define GEM_RX65CNT 0x016c /* 65-127 byte Frames RX Counter */
136 #define GEM_RX128CNT 0x0170 /* 128-255 byte Frames RX Counter */
137 #define GEM_RX256CNT 0x0174 /* 256-511 byte Frames RX Counter */
138 #define GEM_RX512CNT 0x0178 /* 512-1023 byte Frames RX Counter */
139 #define GEM_RX1024CNT 0x017c /* 1024-1518 byte Frames RX Counter */
153 #define GEM_TISUBN 0x01bc /* 1588 Timer Increment Sub-ns */
159 #define GEM_EFTSL 0x01e0 /* PTP Event Frame Tx Seconds Low */
160 #define GEM_EFTN 0x01e4 /* PTP Event Frame Tx Nanoseconds */
163 #define GEM_PEFTSL 0x01f0 /* PTP Peer Event Frame Tx Secs Low */
164 #define GEM_PEFTN 0x01f4 /* PTP Peer Event Frame Tx Ns */
167 #define GEM_PCSCNTRL 0x0200 /* PCS Control */
168 #define GEM_PCSSTS 0x0204 /* PCS Status */
169 #define GEM_PCSPHYTOPID 0x0208 /* PCS PHY Top ID */
170 #define GEM_PCSPHYBOTID 0x020c /* PCS PHY Bottom ID */
171 #define GEM_PCSANADV 0x0210 /* PCS AN Advertisement */
172 #define GEM_PCSANLPBASE 0x0214 /* PCS AN Link Partner Base */
173 #define GEM_PCSANEXP 0x0218 /* PCS AN Expansion */
174 #define GEM_PCSANNPTX 0x021c /* PCS AN Next Page TX */
175 #define GEM_PCSANNPLP 0x0220 /* PCS AN Next Page LP */
176 #define GEM_PCSANEXTSTS 0x023c /* PCS AN Extended Status */
187 #define GEM_USX_CONTROL 0x0A80 /* High speed PCS control register */
188 #define GEM_USX_STATUS 0x0A88 /* High speed PCS status register */
190 #define GEM_TXBDCTRL 0x04cc /* TX Buffer Descriptor control register */
211 /* Which screening type 2 EtherType register will be used (0 - 7) */
264 #define MACB_BIT_RATE_OFFSET 2 /* Discard non-VLAN frames */
336 #define GEM_TXPBMS_OFFSET 10 /* TX packet buffer memory size select */
338 #define GEM_TXCOEN_OFFSET 11 /* TX IP/TCP/UDP checksum gen offload */
346 #define GEM_TXEXT_OFFSET 29 /* TX extended Buffer Descriptor mode */
348 #define GEM_ADDR64_OFFSET 30 /* Address bus width - 64b or 32b */
373 #define MACB_BEX_OFFSET 4 /* TX frame corruption due to AHB error */
397 #define MACB_TXUBR_OFFSET 3 /* TX used bit read */
399 #define MACB_ISR_TUND_OFFSET 4 /* Enable TX buffer under run interrupt */
403 #define MACB_TXERR_OFFSET 6 /* EN TX frame corrupt from error interrupt */
419 #define MACB_WOL_OFFSET 14 /* Enable wake-on-lan interrupt */
439 #define GEM_WOL_OFFSET 28 /* Enable wake-on-lan interrupt */
600 #define GEM_TXTSMODE_OFFSET 4 /* TX Descriptor Timestamp Insertion mode */
618 #define GEM_CMPA_OFFSET 13 /* Compare A - Index to screener type 2 Compare register */
622 #define GEM_CMPB_OFFSET 19 /* Compare B - Index to screener type 2 Compare register */
626 #define GEM_CMPC_OFFSET 25 /* Compare C - Index to screener type 2 Compare register */
695 #define GEM_DMA_SEC_MASK (GEM_DMA_SEC_TOP - 1)
759 (((value) & ((1 << MACB_##name##_SIZE) - 1)) \
763 & ((1 << MACB_##name##_SIZE) - 1))
765 (((old) & ~(((1 << MACB_##name##_SIZE) - 1) \
772 (((value) & ((1 << GEM_##name##_SIZE) - 1)) \
776 & ((1 << GEM_##name##_SIZE) - 1))
778 (((old) & ~(((1 << GEM_##name##_SIZE) - 1) \
783 #define macb_readl(port, reg) (port)->macb_reg_readl((port), MACB_##reg)
784 #define macb_writel(port, reg, value) (port)->macb_reg_writel((port), MACB_##reg, (value))
785 #define gem_readl(port, reg) (port)->macb_reg_readl((port), GEM_##reg)
786 #define gem_writel(port, reg, value) (port)->macb_reg_writel((port), GEM_##reg, (value))
787 #define queue_readl(queue, reg) (queue)->bp->macb_reg_readl((queue)->bp, (queue)->reg)
788 #define queue_writel(queue, reg, value) (queue)->bp->macb_reg_writel((queue)->bp, (queue)->reg, (va…
789 #define gem_readl_n(port, reg, idx) (port)->macb_reg_readl((port), GEM_##reg + idx * 4)
790 #define gem_writel_n(port, reg, idx, value) (port)->macb_reg_writel((port), GEM_##reg + idx * 4, (v…
817 /* struct macb_dma_desc - Hardware DMA descriptor
935 /* struct macb_tx_skb - data about an skb which is being transmitted
950 /* Hardware-collected statistics. Used when updating the network
1026 * returned by `ethtool -S`. Also describes which net_device_stats statistics
1165 /* MACB-PTP interface: adapt to platform needs. */
1315 struct macb_ptp_info *ptp_info; /* macb-ptp interface */
1347 #define TSU_SEC_MAX_VAL (((u64)1 << GEM_TSEC_SIZE) - 1)
1348 #define TSU_NSEC_MAX_VAL ((1 << GEM_TN_SIZE) - 1)
1363 if (bp->tstamp_config.tx_type == TSTAMP_DISABLED) in gem_ptp_do_txstamp()
1371 if (bp->tstamp_config.rx_filter == TSTAMP_DISABLED) in gem_ptp_do_rxstamp()
1392 return !!(bp->caps & MACB_CAPS_MACB_IS_GEM); in macb_is_gem()
1397 return IS_ENABLED(CONFIG_MACB_USE_HWSTAMP) && (bp->caps & MACB_CAPS_GEM_HAS_PTP); in gem_has_ptp()
1401 * struct macb_platform_data - platform data for MACB Ethernet used for PCI registration