Lines Matching +full:0 +full:x402
33 #define BFI_VLAN_WORD_MASK 0x1F
35 #define BFI_VLAN_BMASK_ALL 0xFF
38 #define BFI_MAX_COALESCING_TIMEO 0xFF /* in 5us units */
39 #define BFI_MAX_INTERPKT_COUNT 0xFF
40 #define BFI_MAX_INTERPKT_TIMEO 0xF /* in 0.5us units */
51 #define BFI_TX_MAX_WRR_QUOTA 0xFFF
54 #define BFI_TX_MAX_VECTORS_PER_PKT 0xFF
55 #define BFI_TX_MAX_DATA_PER_VECTOR 0xFFFF
56 #define BFI_TX_MAX_DATA_PER_PKT 0xFFFFFF
62 #define BFI_TX_PRIO_MAP_ALL 0xFF
70 #define BNA_PCI_REG_CT_ADDRSZ (0x40000)
136 #define IB_STATUS_BITS 0x0000ffff
161 } while (0)
166 writel(0xffffffff, (_bna)->regs.fn_int_mask); \
178 } while (0)
187 } while (0)
211 #define BNA_DOORBELL_Q_PRD_IDX(_pi) (0x80000000 | (_pi))
212 #define BNA_DOORBELL_Q_STOP (0x40000000)
216 (0x80000000 | ((_timeout) << 16) | (_events))
217 #define BNA_DOORBELL_IB_INT_DISABLE (0x40000000)
221 ((_i_dbell)->doorbell_ack = BNA_DOORBELL_IB_INT_ACK((_cls_timer), 0))
225 (writel(BNA_DOORBELL_IB_INT_ACK(0, (_events)), \
245 bna_ib_ack(&ib->door_bell, 0); \
272 #define BNA_TXQ_WI_SEND (0x402) /* Single Frame Transmission */
273 #define BNA_TXQ_WI_SEND_LSO (0x403) /* Multi-Frame Transmission */
274 #define BNA_TXQ_WI_EXTENSION (0x104) /* Extension WI */
283 #define BNA_TXQ_WI_CF_IP_CKSUM BIT(0)
286 (((_hdr_size) << 10) | ((_offset) & 0x3FF))
292 #define BNA_CQ_EF_MAC_ERROR BIT(0)