Lines Matching refs:tg3_flag
92 #define tg3_flag(tp, flag) \ macro
131 (tg3_flag(tp, JUMBO_CAPABLE) ? 9000 : 1500)
138 (tg3_flag(tp, LRG_PROD_RING_CAP) ? \
142 (tg3_flag(tp, LRG_PROD_RING_CAP) ? \
213 #define TG3_MAX_UCAST_ADDR(tp) (tg3_flag((tp), ENABLE_ASF) ? 2 : 3)
214 #define TG3_UCAST_ADDR_IDX(tp) (tg3_flag((tp), ENABLE_ASF) ? 2 : 1)
567 if (tg3_flag(tp, PCIX_TARGET_HWBUG) || tg3_flag(tp, ICH_WORKAROUND)) in _tw32_flush()
587 if (tg3_flag(tp, FLUSH_POSTED_WRITES) || in tw32_mailbox_flush()
588 (!tg3_flag(tp, MBOX_WRITE_REORDER) && in tw32_mailbox_flush()
589 !tg3_flag(tp, ICH_WORKAROUND))) in tw32_mailbox_flush()
597 if (tg3_flag(tp, TXD_MBOX_HWBUG)) in tg3_write32_tx_mbox()
599 if (tg3_flag(tp, MBOX_WRITE_REORDER) || in tg3_write32_tx_mbox()
600 tg3_flag(tp, FLUSH_POSTED_WRITES)) in tg3_write32_tx_mbox()
634 if (tg3_flag(tp, SRAM_USE_CONFIG)) { in tg3_write_mem()
661 if (tg3_flag(tp, SRAM_USE_CONFIG)) { in tg3_read_mem()
713 if (!tg3_flag(tp, ENABLE_APE)) in tg3_ape_lock()
774 if (!tg3_flag(tp, ENABLE_APE)) in tg3_ape_unlock()
851 if (!tg3_flag(tp, APE_HAS_NCSI)) in tg3_ape_scratchpad_read()
942 if (!tg3_flag(tp, ENABLE_APE)) in tg3_ape_driver_state_change()
965 tg3_flag(tp, WOL_ENABLE)) { in tg3_ape_driver_state_change()
989 if (!tg3_flag(tp, ENABLE_APE) || in tg3_send_ape_heartbeat()
1022 if (tg3_flag(tp, 1SHOT_MSI)) in tg3_enable_ints()
1029 if (!tg3_flag(tp, TAGGED_STATUS) && in tg3_enable_ints()
1045 if (!(tg3_flag(tp, USE_LINKCHG_REG) || tg3_flag(tp, POLL_SERDES))) { in tg3_has_work()
1077 if (!tg3_flag(tp, TAGGED_STATUS) && tg3_has_work(tnapi)) in tg3_int_reenable()
1087 if (tg3_flag(tp, CPMU_PRESENT) || tg3_flag(tp, 5780_CLASS)) in tg3_switch_clocks()
1098 if (tg3_flag(tp, 5705_PLUS)) { in tg3_switch_clocks()
1448 if (!tg3_flag(tp, RGMII_INBAND_DISABLE)) in tg3_mdio_config_5785()
1461 if (!tg3_flag(tp, RGMII_INBAND_DISABLE)) { in tg3_mdio_config_5785()
1462 if (tg3_flag(tp, RGMII_EXT_IBND_RX_EN)) in tg3_mdio_config_5785()
1464 if (tg3_flag(tp, RGMII_EXT_IBND_TX_EN)) in tg3_mdio_config_5785()
1479 if (!tg3_flag(tp, RGMII_INBAND_DISABLE)) { in tg3_mdio_config_5785()
1480 if (tg3_flag(tp, RGMII_EXT_IBND_RX_EN)) in tg3_mdio_config_5785()
1485 if (tg3_flag(tp, RGMII_EXT_IBND_TX_EN)) in tg3_mdio_config_5785()
1499 if (tg3_flag(tp, MDIOBUS_INITED) && in tg3_mdio_start()
1510 if (tg3_flag(tp, 5717_PLUS)) { in tg3_mdio_init()
1522 } else if (tg3_flag(tp, IS_SSB_CORE) && tg3_flag(tp, ROBOSWITCH)) { in tg3_mdio_init()
1534 if (!tg3_flag(tp, USE_PHYLIB) || tg3_flag(tp, MDIOBUS_INITED)) in tg3_mdio_init()
1606 if (tg3_flag(tp, MDIOBUS_INITED)) { in tg3_mdio_fini()
1697 if (!tg3_flag(tp, 5780_CLASS) || !tg3_flag(tp, ENABLE_ASF)) in tg3_ump_link_report()
1717 if (tg3_flag(tp, ENABLE_ASF) && !tg3_flag(tp, ENABLE_APE)) { in tg3_stop_fw()
1736 if (tg3_flag(tp, ASF_NEW_HANDSHAKE)) { in tg3_write_sig_pre_reset()
1762 if (tg3_flag(tp, ASF_NEW_HANDSHAKE)) { in tg3_write_sig_post_reset()
1783 if (tg3_flag(tp, ENABLE_ASF)) { in tg3_write_sig_legacy()
1811 if (tg3_flag(tp, NO_FWARE_REPORTED)) in tg3_poll_fw()
1814 if (tg3_flag(tp, IS_SSB_CORE)) { in tg3_poll_fw()
1838 if (!tg3_flag(tp, NO_FWARE_REPORTED)) { in tg3_poll_fw()
1854 if (i >= 100000 && !tg3_flag(tp, NO_FWARE_REPORTED)) { in tg3_poll_fw()
1967 if (tg3_flag(tp, USE_PHYLIB)) in tg3_setup_flow_control()
1972 if (autoneg == AUTONEG_ENABLE && tg3_flag(tp, PAUSE_AUTONEG)) { in tg3_setup_flow_control()
2222 if (!tg3_flag(tp, 5705_PLUS) || in tg3_phy_toggle_apd()
2223 (tg3_flag(tp, 5717_PLUS) && in tg3_phy_toggle_apd()
2253 if (!tg3_flag(tp, 5705_PLUS) || in tg3_phy_toggle_automdix()
2428 tg3_flag(tp, 57765_CLASS)) && in tg3_phy_eee_enable()
2620 if (tg3_flag(tp, ENABLE_ASF)) in tg3_warn_mgmt_link_flap()
2688 if (tg3_flag(tp, 5717_PLUS) && in tg3_phy_reset()
2738 } else if (tg3_flag(tp, JUMBO_CAPABLE)) { in tg3_phy_reset()
2750 if (tg3_flag(tp, JUMBO_CAPABLE)) { in tg3_phy_reset()
2810 if (!tg3_flag(tp, IS_NIC)) in tg3_pwrsrc_switch_to_vmain()
2837 if (!tg3_flag(tp, IS_NIC) || in tg3_pwrsrc_die_with_vmain()
2859 if (!tg3_flag(tp, IS_NIC)) in tg3_pwrsrc_switch_to_vaux()
2942 if (tg3_flag(tp, ENABLE_ASF) || tg3_flag(tp, ENABLE_APE) || wol_enable) in tg3_frob_aux_power_5717()
2964 if (!tg3_flag(tp, IS_NIC) || tg3_flag(tp, 57765_CLASS)) in tg3_frob_aux_power()
2971 tg3_flag(tp, WOL_ENABLE) != 0 : 0); in tg3_frob_aux_power()
2984 if (tg3_flag(tp_peer, INIT_COMPLETE)) in tg3_frob_aux_power()
2987 if ((include_wol && tg3_flag(tp_peer, WOL_ENABLE)) || in tg3_frob_aux_power()
2988 tg3_flag(tp_peer, ENABLE_ASF)) in tg3_frob_aux_power()
2993 if ((include_wol && tg3_flag(tp, WOL_ENABLE)) || in tg3_frob_aux_power()
2994 tg3_flag(tp, ENABLE_ASF)) in tg3_frob_aux_power()
3132 if (tg3_flag(tp, NVRAM)) { in tg3_nvram_lock()
3155 if (tg3_flag(tp, NVRAM)) { in tg3_nvram_unlock()
3166 if (tg3_flag(tp, 5750_PLUS) && !tg3_flag(tp, PROTECTED_NVRAM)) { in tg3_enable_nvram_access()
3176 if (tg3_flag(tp, 5750_PLUS) && !tg3_flag(tp, PROTECTED_NVRAM)) { in tg3_disable_nvram_access()
3246 if (tg3_flag(tp, NVRAM) && in tg3_nvram_phys_addr()
3247 tg3_flag(tp, NVRAM_BUFFERED) && in tg3_nvram_phys_addr()
3248 tg3_flag(tp, FLASH) && in tg3_nvram_phys_addr()
3249 !tg3_flag(tp, NO_NVRAM_ADDR_TRANS) && in tg3_nvram_phys_addr()
3261 if (tg3_flag(tp, NVRAM) && in tg3_nvram_logical_addr()
3262 tg3_flag(tp, NVRAM_BUFFERED) && in tg3_nvram_logical_addr()
3263 tg3_flag(tp, FLASH) && in tg3_nvram_logical_addr()
3264 !tg3_flag(tp, NO_NVRAM_ADDR_TRANS) && in tg3_nvram_logical_addr()
3284 if (!tg3_flag(tp, NVRAM)) in tg3_nvram_read()
3498 !tg3_flag(tp, FLASH) || in tg3_nvram_write_block_buffered()
3499 !tg3_flag(tp, 57765_PLUS)) in tg3_nvram_write_block_buffered()
3503 !tg3_flag(tp, 5755_PLUS) && in tg3_nvram_write_block_buffered()
3513 if (!tg3_flag(tp, FLASH)) { in tg3_nvram_write_block_buffered()
3530 if (tg3_flag(tp, EEPROM_WRITE_PROT)) { in tg3_nvram_write_block()
3536 if (!tg3_flag(tp, NVRAM)) { in tg3_nvram_write_block()
3546 if (tg3_flag(tp, 5750_PLUS) && !tg3_flag(tp, PROTECTED_NVRAM)) in tg3_nvram_write_block()
3552 if (tg3_flag(tp, NVRAM_BUFFERED) || !tg3_flag(tp, FLASH)) { in tg3_nvram_write_block()
3567 if (tg3_flag(tp, EEPROM_WRITE_PROT)) { in tg3_nvram_write_block()
3634 BUG_ON(cpu_base == TX_CPU_BASE && tg3_flag(tp, 5705_PLUS)); in tg3_halt_cpu()
3649 if (tg3_flag(tp, IS_SSB_CORE)) in tg3_halt_cpu()
3662 if (tg3_flag(tp, NVRAM)) in tg3_halt_cpu()
3703 if (cpu_base == TX_CPU_BASE && tg3_flag(tp, 5705_PLUS)) { in tg3_load_firmware_cpu()
3710 if (tg3_flag(tp, 5705_PLUS) && tg3_asic_rev(tp) != ASIC_REV_57766) in tg3_load_firmware_cpu()
3859 if (!tg3_flag(tp, NO_NVRAM)) in tg3_load_57766_firmware()
3902 if (!tg3_flag(tp, FW_TSO)) in tg3_load_tso_firmware()
4030 if (tg3_flag(tp, CLKREQ_BUG)) in tg3_power_down_prepare()
4039 tg3_flag(tp, WOL_ENABLE); in tg3_power_down_prepare()
4041 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_power_down_prepare()
4068 if (tg3_flag(tp, ENABLE_ASF) || device_should_wake) { in tg3_power_down_prepare()
4069 if (tg3_flag(tp, WOL_SPEED_100MB)) { in tg3_power_down_prepare()
4109 } else if (!tg3_flag(tp, ENABLE_ASF)) { in tg3_power_down_prepare()
4120 if (tg3_flag(tp, WOL_CAP)) in tg3_power_down_prepare()
4153 u32 speed = tg3_flag(tp, WOL_SPEED_100MB) ? in tg3_power_down_prepare()
4164 if (!tg3_flag(tp, 5750_PLUS)) in tg3_power_down_prepare()
4168 if ((tg3_flag(tp, 5705_PLUS) && !tg3_flag(tp, 5780_CLASS)) && in tg3_power_down_prepare()
4169 (tg3_flag(tp, ENABLE_ASF) || tg3_flag(tp, ENABLE_APE))) in tg3_power_down_prepare()
4172 if (tg3_flag(tp, ENABLE_APE)) in tg3_power_down_prepare()
4184 if (!tg3_flag(tp, WOL_SPEED_100MB) && in tg3_power_down_prepare()
4195 } else if (tg3_flag(tp, 5780_CLASS) || in tg3_power_down_prepare()
4196 tg3_flag(tp, CPMU_PRESENT) || in tg3_power_down_prepare()
4199 } else if (!(tg3_flag(tp, 5750_PLUS) && tg3_flag(tp, ENABLE_ASF))) { in tg3_power_down_prepare()
4208 } else if (tg3_flag(tp, 5705_PLUS)) { in tg3_power_down_prepare()
4222 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_power_down_prepare()
4239 if (!(device_should_wake) && !tg3_flag(tp, ENABLE_ASF)) in tg3_power_down_prepare()
4245 if ((!tg3_flag(tp, IS_SSB_CORE)) && in tg3_power_down_prepare()
4252 if (!tg3_flag(tp, ENABLE_ASF)) { in tg3_power_down_prepare()
4271 pci_wake_from_d3(tp->pdev, tg3_flag(tp, WOL_ENABLE)); in tg3_power_down()
4405 if (tg3_flag(tp, WOL_SPEED_100MB)) in tg3_phy_copper_begin()
4749 if (tg3_flag(tp, ENABLE_APE)) in tg3_setup_eee()
4800 !tg3_flag(tp, INIT_COMPLETE)) in tg3_setup_copper_phy()
4964 if (tg3_flag(tp, ROBOSWITCH)) { in tg3_setup_copper_phy()
4994 if (tg3_flag(tp, RGMII_MODE)) { in tg3_setup_copper_phy()
5038 if (tg3_flag(tp, USE_LINKCHG_REG)) { in tg3_setup_copper_phy()
5049 (tg3_flag(tp, PCIX_MODE) || tg3_flag(tp, PCI_HIGH_SPEED))) { in tg3_setup_copper_phy()
5061 if (tg3_flag(tp, CLKREQ_BUG)) { in tg3_setup_copper_phy()
5443 if (tg3_flag(tp, INIT_COMPLETE) && in tg3_init_bcm8002()
5709 if (!tg3_flag(tp, HW_AUTONEG) && in tg3_setup_fiber_phy()
5711 tg3_flag(tp, INIT_COMPLETE)) { in tg3_setup_fiber_phy()
5742 if (tg3_flag(tp, HW_AUTONEG)) in tg3_setup_fiber_phy()
5964 } else if (!tg3_flag(tp, 5780_CLASS)) { in tg3_setup_fiber_mii_phy()
6096 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_setup_phy()
6105 if (tg3_flag(tp, ASPM_WORKAROUND)) { in tg3_setup_phy()
6150 if (tg3_flag(tp, PTP_CAPABLE)) { in tg3_get_ts_info()
6362 if (!tg3_flag(tp, PTP_CAPABLE)) in tg3_ptp_init()
6374 if (!tg3_flag(tp, PTP_CAPABLE)) in tg3_ptp_resume()
6383 if (!tg3_flag(tp, PTP_CAPABLE) || !tp->ptp_clock) in tg3_ptp_fini()
6429 if (tg3_flag(tp, SUPPORT_MSIX)) in tg3_dump_legacy_regs()
6441 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_dump_legacy_regs()
6453 if (tg3_flag(tp, NVRAM)) in tg3_dump_legacy_regs()
6474 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_dump_state()
6529 BUG_ON(tg3_flag(tp, MBOX_WRITE_REORDER) || in tg3_tx_recover()
6562 if (tg3_flag(tp, ENABLE_TSS)) in tg3_tx()
7007 if (!tg3_flag(tp, ENABLE_RSS)) { in tg3_rx()
7044 if (!(tg3_flag(tp, USE_LINKCHG_REG) || tg3_flag(tp, POLL_SERDES))) { in tg3_poll_link()
7051 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_poll_link()
7198 if (unlikely(tg3_flag(tp, TX_RECOVERY_PENDING))) in tg3_poll_work()
7212 if (tg3_flag(tp, ENABLE_RSS) && tnapi == &tp->napi[1]) { in tg3_poll_work()
7263 if (unlikely(tg3_flag(tp, TX_RECOVERY_PENDING))) in tg3_poll_msix()
7318 if (tg3_flag(tp, ERROR_PROCESSED)) in tg3_process_error()
7362 if (unlikely(tg3_flag(tp, TX_RECOVERY_PENDING))) in tg3_poll()
7368 if (tg3_flag(tp, TAGGED_STATUS)) { in tg3_poll()
7549 if (tg3_flag(tp, CHIP_RESETTING) || in tg3_interrupt()
7598 if (tg3_flag(tp, CHIP_RESETTING) || in tg3_interrupt_tagged()
7705 if (tg3_flag(tp, 40BIT_DMA_BUG)) in tg3_40bit_overflow_test()
7730 if (tg3_flag(tp, SHORT_DMA_BUG) && len <= 8) in tg3_tx_frag_set()
7948 if (tg3_flag(tp, ENABLE_TSS)) in __tg3_start_xmit()
7996 tg3_flag(tp, TSO_BUG)) { in __tg3_start_xmit()
8013 if (tg3_flag(tp, HW_TSO_1) || in __tg3_start_xmit()
8014 tg3_flag(tp, HW_TSO_2) || in __tg3_start_xmit()
8015 tg3_flag(tp, HW_TSO_3)) { in __tg3_start_xmit()
8023 if (tg3_flag(tp, HW_TSO_3)) { in __tg3_start_xmit()
8028 } else if (tg3_flag(tp, HW_TSO_2)) in __tg3_start_xmit()
8030 else if (tg3_flag(tp, HW_TSO_1) || in __tg3_start_xmit()
8059 if (tg3_flag(tp, USE_JUMBO_BDFLAG) && in __tg3_start_xmit()
8069 tg3_flag(tp, TX_TSTAMP_EN)) { in __tg3_start_xmit()
8092 if (tg3_flag(tp, 5701_DMA_BUG)) in __tg3_start_xmit()
8102 if (!tg3_flag(tp, HW_TSO_1) && in __tg3_start_xmit()
8103 !tg3_flag(tp, HW_TSO_2) && in __tg3_start_xmit()
8104 !tg3_flag(tp, HW_TSO_3)) in __tg3_start_xmit()
8219 if (tg3_flag(tp, ENABLE_TSS)) in tg3_start_xmit()
8236 if (!tg3_flag(tp, 5705_PLUS)) in tg3_mac_loopback()
8246 if (tg3_flag(tp, 5705_PLUS) || in tg3_mac_loopback()
8318 tg3_flag(tp, 5780_CLASS)) { in tg3_phy_lpbk_set()
8380 if (dev->mtu > ETH_DATA_LEN && tg3_flag(tp, 5780_CLASS)) in tg3_fix_features()
8407 if (tg3_flag(tp, JUMBO_CAPABLE)) { in tg3_rx_prodring_free()
8423 if (tg3_flag(tp, JUMBO_CAPABLE) && !tg3_flag(tp, 5780_CLASS)) { in tg3_rx_prodring_free()
8460 if (tg3_flag(tp, 5780_CLASS) && in tg3_rx_prodring_alloc()
8496 if (!tg3_flag(tp, JUMBO_CAPABLE) || tg3_flag(tp, 5780_CLASS)) in tg3_rx_prodring_alloc()
8501 if (!tg3_flag(tp, JUMBO_RING_ENABLE)) in tg3_rx_prodring_alloc()
8573 if (tg3_flag(tp, JUMBO_CAPABLE) && !tg3_flag(tp, 5780_CLASS)) { in tg3_rx_prodring_init()
8696 if (tg3_flag(tp, ENABLE_TSS)) in tg3_mem_tx_acquire()
8750 if (tg3_flag(tp, ENABLE_RSS)) in tg3_mem_rx_acquire()
8763 if (!i && tg3_flag(tp, ENABLE_RSS)) in tg3_mem_rx_acquire()
8841 if (tg3_flag(tp, ENABLE_RSS)) { in tg3_alloc_consistent()
8890 if (tg3_flag(tp, 5705_PLUS)) { in tg3_stop_block()
9026 tg3_flag(tp, PCIX_MODE)) in tg3_restore_pci_state()
9029 if (tg3_flag(tp, ENABLE_APE)) in tg3_restore_pci_state()
9037 if (!tg3_flag(tp, PCI_EXPRESS)) { in tg3_restore_pci_state()
9045 if (tg3_flag(tp, PCIX_MODE)) { in tg3_restore_pci_state()
9055 if (tg3_flag(tp, 5780_CLASS)) { in tg3_restore_pci_state()
9060 if (tg3_flag(tp, USING_MSI)) { in tg3_restore_pci_state()
9146 tg3_flag(tp, 5755_PLUS)) in tg3_chip_reset()
9192 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_chip_reset()
9195 !tg3_flag(tp, 57765_PLUS) && in tg3_chip_reset()
9220 if (tg3_flag(tp, 5705_PLUS) && !tg3_flag(tp, CPMU_PRESENT)) in tg3_chip_reset()
9253 if (tg3_flag(tp, PCI_EXPRESS) && pci_is_pcie(tp->pdev)) { in tg3_chip_reset()
9275 if (!tg3_flag(tp, CPMU_PRESENT)) in tg3_chip_reset()
9293 if (tg3_flag(tp, 5780_CLASS)) in tg3_chip_reset()
9302 if (tg3_flag(tp, IS_SSB_CORE)) { in tg3_chip_reset()
9348 if (tg3_flag(tp, PCI_EXPRESS) && in tg3_chip_reset()
9351 !tg3_flag(tp, 57765_PLUS)) { in tg3_chip_reset()
9382 if (tg3_flag(tp, 5750_PLUS)) in tg3_chip_reset()
9451 if (tg3_flag(tp, ENABLE_ASF)) { in tg3_set_mac_addr()
9487 if (!tg3_flag(tp, 5705_PLUS)) in tg3_set_bdinfo()
9498 if (!tg3_flag(tp, ENABLE_TSS)) { in tg3_coal_tx_init()
9531 if (!tg3_flag(tp, ENABLE_RSS)) { in tg3_coal_rx_init()
9565 if (!tg3_flag(tp, 5705_PLUS)) { in __tg3_set_coalesce()
9584 if (!tg3_flag(tp, 5705_PLUS)) in tg3_tx_rcbs_disable()
9586 else if (tg3_flag(tp, 5717_PLUS)) in tg3_tx_rcbs_disable()
9588 else if (tg3_flag(tp, 57765_CLASS) || in tg3_tx_rcbs_disable()
9606 if (tg3_flag(tp, ENABLE_TSS)) in tg3_tx_rcbs_init()
9627 if (tg3_flag(tp, 5717_PLUS)) in tg3_rx_ret_rcbs_disable()
9629 else if (!tg3_flag(tp, 5705_PLUS)) in tg3_rx_ret_rcbs_disable()
9633 tg3_flag(tp, 57765_CLASS)) in tg3_rx_ret_rcbs_disable()
9650 if (tg3_flag(tp, ENABLE_RSS)) in tg3_rx_ret_rcbs_init()
9683 if (tg3_flag(tp, SUPPORT_MSIX)) { in tg3_rings_reset()
9687 if (tg3_flag(tp, ENABLE_TSS)) in tg3_rings_reset()
9695 if (!tg3_flag(tp, ENABLE_TSS)) in tg3_rings_reset()
9705 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_rings_reset()
9740 if (!tg3_flag(tp, 5750_PLUS) || in tg3_setup_rxbd_thresholds()
9741 tg3_flag(tp, 5780_CLASS) || in tg3_setup_rxbd_thresholds()
9744 tg3_flag(tp, 57765_PLUS)) in tg3_setup_rxbd_thresholds()
9758 if (tg3_flag(tp, 57765_PLUS)) in tg3_setup_rxbd_thresholds()
9761 if (!tg3_flag(tp, JUMBO_CAPABLE) || tg3_flag(tp, 5780_CLASS)) in tg3_setup_rxbd_thresholds()
9771 if (tg3_flag(tp, 57765_PLUS)) in tg3_setup_rxbd_thresholds()
9820 if (!tg3_flag(tp, ENABLE_ASF)) in __tg3_set_rx_mode()
9888 if (!tg3_flag(tp, SUPPORT_MSIX)) in tg3_rss_check_indir_tbl()
9944 if (tg3_flag(tp, INIT_COMPLETE)) in tg3_reset_hw()
10003 if (tg3_flag(tp, L1PLLPD_EN)) { in tg3_reset_hw()
10017 if (tg3_flag(tp, 57765_CLASS)) { in tg3_reset_hw()
10067 if (!tg3_flag(tp, CPMU_PRESENT)) { in tg3_reset_hw()
10068 if (!tg3_flag(tp, PCI_EXPRESS)) in tg3_reset_hw()
10074 tg3_flag(tp, PCIX_MODE)) { in tg3_reset_hw()
10080 if (tg3_flag(tp, ENABLE_APE)) { in tg3_reset_hw()
10107 if (tg3_flag(tp, 57765_PLUS)) { in tg3_reset_hw()
10112 if (!tg3_flag(tp, 57765_CLASS) && in tg3_reset_hw()
10144 if (tg3_flag(tp, PTP_CAPABLE)) in tg3_reset_hw()
10166 if (tg3_flag(tp, 5750_PLUS)) { in tg3_reset_hw()
10176 } else if (tg3_flag(tp, TSO_CAPABLE)) { in tg3_reset_hw()
10252 if (!tg3_flag(tp, 5717_PLUS)) in tg3_reset_hw()
10257 if (!tg3_flag(tp, 5705_PLUS)) in tg3_reset_hw()
10265 (tg3_flag(tp, JUMBO_CAPABLE) && !tg3_flag(tp, 5780_CLASS))) { in tg3_reset_hw()
10267 if (tg3_flag(tp, JUMBO_RING_ENABLE)) { in tg3_reset_hw()
10276 if (!tg3_flag(tp, USE_JUMBO_BDFLAG) || in tg3_reset_hw()
10277 tg3_flag(tp, 57765_CLASS) || in tg3_reset_hw()
10286 if (tg3_flag(tp, 57765_PLUS)) { in tg3_reset_hw()
10301 tg3_flag(tp, JUMBO_RING_ENABLE) ? tp->rx_jumbo_pending : 0; in tg3_reset_hw()
10353 if (tg3_flag(tp, TSO_CAPABLE)) { in tg3_reset_hw()
10356 !tg3_flag(tp, IS_5788)) { in tg3_reset_hw()
10361 if (tg3_flag(tp, PCI_EXPRESS)) in tg3_reset_hw()
10372 if (tg3_flag(tp, HW_TSO_1) || in tg3_reset_hw()
10373 tg3_flag(tp, HW_TSO_2) || in tg3_reset_hw()
10374 tg3_flag(tp, HW_TSO_3)) in tg3_reset_hw()
10377 if (tg3_flag(tp, 57765_PLUS) || in tg3_reset_hw()
10390 tg3_flag(tp, 57765_PLUS)) { in tg3_reset_hw()
10428 if (tg3_flag(tp, 5750_PLUS)) { in tg3_reset_hw()
10433 tg3_flag(tp, TSO_CAPABLE)) { in tg3_reset_hw()
10456 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_reset_hw()
10482 if (!tg3_flag(tp, 5705_PLUS)) in tg3_reset_hw()
10495 if (tg3_flag(tp, ENABLE_APE)) in tg3_reset_hw()
10497 if (!tg3_flag(tp, 5705_PLUS) && in tg3_reset_hw()
10510 if (!tg3_flag(tp, IS_NIC)) { in tg3_reset_hw()
10528 if (tg3_flag(tp, EEPROM_WRITE_PROT)) in tg3_reset_hw()
10535 if (tg3_flag(tp, USING_MSIX)) { in tg3_reset_hw()
10540 if (!tg3_flag(tp, 1SHOT_MSI)) in tg3_reset_hw()
10545 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_reset_hw()
10558 if (tg3_flag(tp, TSO_CAPABLE) && in tg3_reset_hw()
10563 !tg3_flag(tp, IS_5788)) { in tg3_reset_hw()
10569 if (tg3_flag(tp, 5755_PLUS)) in tg3_reset_hw()
10578 if (tg3_flag(tp, PCIX_MODE)) { in tg3_reset_hw()
10612 if (!tg3_flag(tp, 5705_PLUS)) in tg3_reset_hw()
10624 if (tg3_flag(tp, LRG_PROD_RING_CAP)) in tg3_reset_hw()
10628 if (tg3_flag(tp, HW_TSO_1) || in tg3_reset_hw()
10629 tg3_flag(tp, HW_TSO_2) || in tg3_reset_hw()
10630 tg3_flag(tp, HW_TSO_3)) in tg3_reset_hw()
10633 if (tg3_flag(tp, ENABLE_TSS)) in tg3_reset_hw()
10651 if (tg3_flag(tp, TSO_CAPABLE)) { in tg3_reset_hw()
10659 if (tg3_flag(tp, 5755_PLUS) || in tg3_reset_hw()
10673 if (tg3_flag(tp, ENABLE_RSS)) { in tg3_reset_hw()
10685 if (tg3_flag(tp, 5755_PLUS)) in tg3_reset_hw()
10691 if (tg3_flag(tp, ENABLE_RSS)) in tg3_reset_hw()
10729 if (tg3_flag(tp, 57765_CLASS)) in tg3_reset_hw()
10752 if (!tg3_flag(tp, USE_PHYLIB)) { in tg3_reset_hw()
10781 if (tg3_flag(tp, 5705_PLUS) && !tg3_flag(tp, 5780_CLASS)) in tg3_reset_hw()
10785 if (tg3_flag(tp, ENABLE_ASF)) in tg3_reset_hw()
10835 if (tg3_flag(tp, ENABLE_APE)) in tg3_reset_hw()
10978 if (unlikely(tg3_flag(tp, 5719_5720_RDMA_BUG) && in tg3_periodic_fetch_stats()
11053 if (tp->irq_sync || tg3_flag(tp, RESET_TASK_PENDING)) { in tg3_timer()
11059 tg3_flag(tp, 57765_CLASS)) in tg3_timer()
11062 if (tg3_flag(tp, FLUSH_POSTED_WRITES)) { in tg3_timer()
11067 if (!tg3_flag(tp, TAGGED_STATUS)) { in tg3_timer()
11089 if (tg3_flag(tp, 5705_PLUS)) in tg3_timer()
11095 if (tg3_flag(tp, USE_LINKCHG_REG)) { in tg3_timer()
11110 } else if (tg3_flag(tp, POLL_SERDES)) { in tg3_timer()
11135 tg3_flag(tp, 5780_CLASS)) { in tg3_timer()
11137 } else if (tg3_flag(tp, POLL_CPMU_LINK)) { in tg3_timer()
11167 if (tg3_flag(tp, ENABLE_ASF) && !tg3_flag(tp, ENABLE_APE)) { in tg3_timer()
11193 if (tg3_flag(tp, TAGGED_STATUS) && in tg3_timer_init()
11195 !tg3_flag(tp, 57765_CLASS)) in tg3_timer_init()
11271 if (tg3_flag(tp, TX_RECOVERY_PENDING)) { in tg3_reset_task()
11326 if (tg3_flag(tp, USING_MSI) || tg3_flag(tp, USING_MSIX)) { in tg3_request_irq()
11328 if (tg3_flag(tp, 1SHOT_MSI)) in tg3_request_irq()
11333 if (tg3_flag(tp, TAGGED_STATUS)) in tg3_request_irq()
11359 if (tg3_flag(tp, 57765_PLUS)) { in tg3_test_interrupt()
11387 if (tg3_flag(tp, 57765_PLUS) && in tg3_test_interrupt()
11405 if (tg3_flag(tp, 57765_PLUS) && tg3_flag(tp, 1SHOT_MSI)) { in tg3_test_interrupt()
11423 if (!tg3_flag(tp, USING_MSI)) in tg3_test_msi()
11584 if ((tg3_flag(tp, SUPPORT_MSI) || tg3_flag(tp, SUPPORT_MSIX)) && in tg3_ints_init()
11585 !tg3_flag(tp, TAGGED_STATUS)) { in tg3_ints_init()
11594 if (tg3_flag(tp, SUPPORT_MSIX) && tg3_enable_msix(tp)) in tg3_ints_init()
11596 else if (tg3_flag(tp, SUPPORT_MSI) && pci_enable_msi(tp->pdev) == 0) in tg3_ints_init()
11599 if (tg3_flag(tp, USING_MSI) || tg3_flag(tp, USING_MSIX)) { in tg3_ints_init()
11601 if (tg3_flag(tp, USING_MSIX) && tp->irq_cnt > 1) in tg3_ints_init()
11603 if (!tg3_flag(tp, 1SHOT_MSI)) in tg3_ints_init()
11608 if (!tg3_flag(tp, USING_MSIX)) { in tg3_ints_init()
11623 if (tg3_flag(tp, USING_MSIX)) in tg3_ints_fini()
11625 else if (tg3_flag(tp, USING_MSI)) in tg3_ints_fini()
11686 if (test_irq && tg3_flag(tp, USING_MSI)) { in tg3_start()
11698 if (!tg3_flag(tp, 57765_PLUS) && tg3_flag(tp, USING_MSI)) { in tg3_start()
11810 } else if (!tg3_flag(tp, TSO_CAPABLE)) { in tg3_open()
12091 if (tg3_flag(tp, NO_NVRAM)) in tg3_get_eeprom()
12101 if (tg3_flag(tp, CPMU_PRESENT)) { in tg3_get_eeprom()
12182 if (tg3_flag(tp, NO_NVRAM) || in tg3_set_eeprom()
12236 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_get_link_ksettings()
12267 if (tg3_flag(tp, PAUSE_AUTONEG)) { in tg3_get_link_ksettings()
12312 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_set_link_ksettings()
12414 if (tg3_flag(tp, WOL_CAP) && device_can_wakeup(&tp->pdev->dev)) in tg3_get_wol()
12419 if (tg3_flag(tp, WOL_ENABLE) && device_can_wakeup(&tp->pdev->dev)) in tg3_get_wol()
12432 !(tg3_flag(tp, WOL_CAP) && device_can_wakeup(dp))) in tg3_set_wol()
12470 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_nway_reset()
12501 if (tg3_flag(tp, JUMBO_RING_ENABLE)) in tg3_get_ringparam()
12509 if (tg3_flag(tp, JUMBO_RING_ENABLE)) in tg3_get_ringparam()
12530 (tg3_flag(tp, TSO_BUG) && in tg3_set_ringparam()
12544 if (tg3_flag(tp, MAX_RXPEND_64) && in tg3_set_ringparam()
12548 if (tg3_flag(tp, JUMBO_RING_ENABLE)) in tg3_set_ringparam()
12579 epause->autoneg = !!tg3_flag(tp, PAUSE_AUTONEG); in tg3_get_pauseparam()
12601 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_set_pauseparam()
12702 if (!tg3_flag(tp, SUPPORT_MSIX)) in tg3_get_rxnfc()
12727 if (tg3_flag(tp, SUPPORT_MSIX)) in tg3_get_rxfh_indir_size()
12768 if (!netif_running(dev) || !tg3_flag(tp, ENABLE_RSS)) in tg3_set_rxfh()
12811 if (!tg3_flag(tp, SUPPORT_MSIX)) in tg3_set_channels()
12898 if (tg3_flag(tp, NO_NVRAM) || tg3_nvram_read(tp, 0, &magic)) in tg3_vpd_readblock()
12969 if (tg3_flag(tp, NO_NVRAM)) in tg3_test_nvram()
13296 if (tg3_flag(tp, 5705_PLUS)) { in tg3_test_registers()
13298 if (tg3_flag(tp, 5750_PLUS)) in tg3_test_registers()
13309 if (tg3_flag(tp, IS_5788) && in tg3_test_registers()
13432 if (tg3_flag(tp, 5717_PLUS)) in tg3_test_memory()
13434 else if (tg3_flag(tp, 57765_CLASS) || in tg3_test_memory()
13437 else if (tg3_flag(tp, 5755_PLUS)) in tg3_test_memory()
13441 else if (tg3_flag(tp, 5705_PLUS)) in tg3_test_memory()
13494 if (tg3_flag(tp, ENABLE_RSS)) in tg3_run_loopback()
13496 if (tg3_flag(tp, ENABLE_TSS)) in tg3_run_loopback()
13533 if (tg3_flag(tp, HW_TSO_1) || in tg3_run_loopback()
13534 tg3_flag(tp, HW_TSO_2) || in tg3_run_loopback()
13535 tg3_flag(tp, HW_TSO_3)) { in tg3_run_loopback()
13543 if (tg3_flag(tp, HW_TSO_3)) { in tg3_run_loopback()
13548 } else if (tg3_flag(tp, HW_TSO_2)) in tg3_run_loopback()
13550 else if (tg3_flag(tp, HW_TSO_1) || in tg3_run_loopback()
13562 if (tg3_flag(tp, USE_JUMBO_BDFLAG) && in tg3_run_loopback()
13723 if (tg3_flag(tp, ENABLE_RSS)) { in tg3_test_loopback()
13738 !tg3_flag(tp, CPMU_PRESENT)) { in tg3_test_loopback()
13744 if (tg3_flag(tp, JUMBO_RING_ENABLE) && in tg3_test_loopback()
13752 !tg3_flag(tp, USE_PHYLIB)) { in tg3_test_loopback()
13766 if (tg3_flag(tp, TSO_CAPABLE) && in tg3_test_loopback()
13769 if (tg3_flag(tp, JUMBO_RING_ENABLE) && in tg3_test_loopback()
13785 if (tg3_flag(tp, TSO_CAPABLE) && in tg3_test_loopback()
13789 if (tg3_flag(tp, JUMBO_RING_ENABLE) && in tg3_test_loopback()
13847 if (!tg3_flag(tp, 5705_PLUS)) in tg3_self_test()
13903 if (!tg3_flag(tp, PTP_CAPABLE)) in tg3_hwtstamp_set()
13987 if (!tg3_flag(tp, PTP_CAPABLE)) in tg3_hwtstamp_get()
13991 stmpconf.tx_type = (tg3_flag(tp, TX_TSTAMP_EN) ? in tg3_hwtstamp_get()
14049 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_ioctl()
14128 if (!tg3_flag(tp, 5705_PLUS)) { in tg3_set_coalesce()
14269 if (!tp->hw_stats || !tg3_flag(tp, INIT_COMPLETE)) { in tg3_get_stats64()
14297 if (tg3_flag(tp, 5780_CLASS)) { in tg3_set_mtu()
14304 if (tg3_flag(tp, 5780_CLASS)) { in tg3_set_mtu()
14414 if (tg3_flag(tp, NO_NVRAM) || tg3_nvram_read(tp, 0, &val) != 0) in tg3_get_nvram_size()
14456 tg3_flag(tp, 5780_CLASS)) { in tg3_get_nvram_info()
14551 if (tg3_flag(tp, FLASH)) { in tg3_get_5752_nvram_info()
15056 if (tg3_flag(tp, IS_SSB_CORE)) { in tg3_nvram_init()
15103 tg3_flag(tp, 57765_CLASS)) in tg3_nvram_init()
15281 if (!tg3_flag(tp, 5705_PLUS)) in tg3_get_eeprom_hw_cfg()
15287 if (tg3_flag(tp, 5750_PLUS)) in tg3_get_eeprom_hw_cfg()
15322 if (tg3_flag(tp, 5717_PLUS) || in tg3_get_eeprom_hw_cfg()
15364 if (tg3_flag(tp, 5750_PLUS)) in tg3_get_eeprom_hw_cfg()
15369 tg3_flag(tp, 5750_PLUS)) in tg3_get_eeprom_hw_cfg()
15376 if (tg3_flag(tp, WOL_CAP) && in tg3_get_eeprom_hw_cfg()
15390 if ((tg3_flag(tp, 57765_PLUS) || in tg3_get_eeprom_hw_cfg()
15396 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_get_eeprom_hw_cfg()
15401 !tg3_flag(tp, 57765_PLUS) && in tg3_get_eeprom_hw_cfg()
15421 if (tg3_flag(tp, WOL_CAP)) in tg3_get_eeprom_hw_cfg()
15423 tg3_flag(tp, WOL_ENABLE)); in tg3_get_eeprom_hw_cfg()
15549 if (tg3_flag(tp, ENABLE_APE)) { in tg3_phy_probe()
15566 if (!tg3_flag(tp, ENABLE_ASF) && in tg3_phy_probe()
15572 if (tg3_flag(tp, USE_PHYLIB)) in tg3_phy_probe()
15579 if (tg3_flag(tp, ENABLE_ASF) || tg3_flag(tp, ENABLE_APE)) { in tg3_phy_probe()
15617 } else if (!tg3_flag(tp, IS_SSB_CORE)) { in tg3_phy_probe()
15661 !tg3_flag(tp, ENABLE_APE) && in tg3_phy_probe()
15662 !tg3_flag(tp, ENABLE_ASF)) { in tg3_phy_probe()
15947 if (!tg3_flag(tp, 5705_PLUS)) in tg3_read_mgmtfw_ver()
16005 if (tg3_flag(tp, APE_HAS_NCSI)) in tg3_read_dash_ver()
16055 if (tg3_flag(tp, NO_NVRAM)) { in tg3_read_fw_ver()
16071 if (tg3_flag(tp, ENABLE_ASF)) { in tg3_read_fw_ver()
16072 if (tg3_flag(tp, ENABLE_APE)) { in tg3_read_fw_ver()
16086 if (tg3_flag(tp, LRG_PROD_RING_CAP)) in tg3_rx_ret_ring_size()
16088 else if (tg3_flag(tp, JUMBO_CAPABLE) && !tg3_flag(tp, 5780_CLASS)) in tg3_rx_ret_ring_size()
16187 if (tg3_flag(tp, 57765_CLASS) || tg3_flag(tp, 5717_PLUS) || in tg3_detect_asic_rev()
16198 tg3_flag(tp, 57765_PLUS)) in tg3_detect_asic_rev()
16208 tg3_flag(tp, 5755_PLUS) || in tg3_detect_asic_rev()
16209 tg3_flag(tp, 5780_CLASS)) in tg3_detect_asic_rev()
16213 tg3_flag(tp, 5750_PLUS)) in tg3_detect_asic_rev()
16368 if (tg3_flag(tp, 5780_CLASS)) { in tg3_get_invariants()
16397 else if (tg3_flag(tp, 57765_PLUS)) in tg3_get_invariants()
16399 else if (tg3_flag(tp, 5755_PLUS) || in tg3_get_invariants()
16402 else if (tg3_flag(tp, 5750_PLUS)) { in tg3_get_invariants()
16420 if (tg3_flag(tp, HW_TSO_1) || in tg3_get_invariants()
16421 tg3_flag(tp, HW_TSO_2) || in tg3_get_invariants()
16422 tg3_flag(tp, HW_TSO_3) || in tg3_get_invariants()
16423 tg3_flag(tp, FW_TSO)) { in tg3_get_invariants()
16443 if (tg3_flag(tp, 5750_PLUS)) { in tg3_get_invariants()
16452 if (tg3_flag(tp, 5755_PLUS) || in tg3_get_invariants()
16457 if (tg3_flag(tp, 57765_PLUS)) { in tg3_get_invariants()
16474 if (tg3_flag(tp, 5755_PLUS) || in tg3_get_invariants()
16487 if (tg3_flag(tp, 57765_PLUS) && in tg3_get_invariants()
16491 if (!tg3_flag(tp, 5705_PLUS) || in tg3_get_invariants()
16492 tg3_flag(tp, 5780_CLASS) || in tg3_get_invariants()
16493 tg3_flag(tp, USE_JUMBO_BDFLAG)) in tg3_get_invariants()
16524 } else if (!tg3_flag(tp, 5705_PLUS) || in tg3_get_invariants()
16525 tg3_flag(tp, 5780_CLASS)) { in tg3_get_invariants()
16544 !tg3_flag(tp, PCI_EXPRESS)) in tg3_get_invariants()
16572 if (tg3_flag(tp, PCIX_MODE)) { in tg3_get_invariants()
16618 if (tg3_flag(tp, PCIX_TARGET_HWBUG)) in tg3_get_invariants()
16621 (tg3_flag(tp, PCI_EXPRESS) && in tg3_get_invariants()
16633 if (tg3_flag(tp, TXD_MBOX_HWBUG) || tg3_flag(tp, MBOX_WRITE_REORDER)) { in tg3_get_invariants()
16635 if (tg3_flag(tp, MBOX_WRITE_REORDER)) in tg3_get_invariants()
16639 if (tg3_flag(tp, ICH_WORKAROUND)) { in tg3_get_invariants()
16662 (tg3_flag(tp, PCIX_MODE) && in tg3_get_invariants()
16677 tg3_flag(tp, 5780_CLASS)) { in tg3_get_invariants()
16678 if (tg3_flag(tp, PCIX_MODE)) { in tg3_get_invariants()
16698 if (tg3_flag(tp, FLUSH_POSTED_WRITES)) { in tg3_get_invariants()
16713 if (tg3_flag(tp, FW_TSO) && tg3_flag(tp, ENABLE_ASF)) { in tg3_get_invariants()
16719 if (tg3_flag(tp, ENABLE_APE)) { in tg3_get_invariants()
16741 tg3_flag(tp, EEPROM_WRITE_PROT)) in tg3_get_invariants()
16752 tg3_flag(tp, 57765_CLASS)) in tg3_get_invariants()
16759 if (tg3_flag(tp, IS_NIC)) in tg3_get_invariants()
16775 if (tp->dev->mtu > ETH_DATA_LEN && !tg3_flag(tp, 5780_CLASS)) in tg3_get_invariants()
16806 if (tg3_flag(tp, 5705_PLUS) && in tg3_get_invariants()
16810 !tg3_flag(tp, 57765_PLUS)) { in tg3_get_invariants()
16831 if (tg3_flag(tp, CPMU_PRESENT)) in tg3_get_invariants()
16883 !tg3_flag(tp, PCIX_TARGET_HWBUG)) { in tg3_get_invariants()
16909 !tg3_flag(tp, NO_NVRAM)) in tg3_get_invariants()
16920 if (!tg3_flag(tp, IS_5788) && in tg3_get_invariants()
16923 if (tg3_flag(tp, TAGGED_STATUS)) { in tg3_get_invariants()
16933 if (tg3_flag(tp, ENABLE_APE)) in tg3_get_invariants()
16986 if (tg3_flag(tp, ENABLE_APE) && tg3_flag(tp, ENABLE_ASF)) in tg3_get_invariants()
16992 tg3_flag(tp, PCIX_MODE)) { in tg3_get_invariants()
17013 if (tg3_flag(tp, ASPM_WORKAROUND)) in tg3_get_invariants()
17029 if (tg3_flag(tp, IS_SSB_CORE)) { in tg3_get_device_address()
17037 tg3_flag(tp, 5780_CLASS)) { in tg3_get_device_address()
17044 } else if (tg3_flag(tp, 5717_PLUS)) { in tg3_get_device_address()
17069 if (!tg3_flag(tp, NO_NVRAM) && in tg3_get_device_address()
17114 !tg3_flag(tp, PCI_EXPRESS)) in tg3_calc_dma_bndry()
17127 if (tg3_flag(tp, 57765_PLUS)) { in tg3_calc_dma_bndry()
17146 if (tg3_flag(tp, PCIX_MODE) && !tg3_flag(tp, PCI_EXPRESS)) { in tg3_calc_dma_bndry()
17171 } else if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_calc_dma_bndry()
17344 if (tg3_flag(tp, 57765_PLUS)) in tg3_test_dma()
17347 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_test_dma()
17350 } else if (!tg3_flag(tp, PCIX_MODE)) { in tg3_test_dma()
17366 if (tg3_flag(tp, 40BIT_DMA_BUG) && in tg3_test_dma()
17389 if (tg3_flag(tp, ONE_DMA_AT_ONCE)) in tg3_test_dma()
17502 if (tg3_flag(tp, 57765_PLUS)) { in tg3_init_bufmgr_config()
17516 } else if (tg3_flag(tp, 5705_PLUS)) { in tg3_init_bufmgr_config()
17590 if (tg3_flag(tp, PCI_EXPRESS)) { in tg3_bus_string()
17593 } else if (tg3_flag(tp, PCIX_MODE)) { in tg3_bus_string()
17612 if (tg3_flag(tp, PCI_HIGH_SPEED)) in tg3_bus_string()
17617 if (tg3_flag(tp, PCI_32BIT)) in tg3_bus_string()
17648 if (tg3_flag(tp, 5705_PLUS)) { in tg3_init_coal()
17794 if (tg3_flag(tp, IS_5788)) in tg3_init_one()
17796 else if (tg3_flag(tp, 40BIT_DMA_BUG)) { in tg3_init_one()
17835 if (tg3_flag(tp, 5755_PLUS)) in tg3_init_one()
17843 if ((tg3_flag(tp, HW_TSO_1) || in tg3_init_one()
17844 tg3_flag(tp, HW_TSO_2) || in tg3_init_one()
17845 tg3_flag(tp, HW_TSO_3)) && in tg3_init_one()
17848 if (tg3_flag(tp, HW_TSO_2) || tg3_flag(tp, HW_TSO_3)) { in tg3_init_one()
17851 if (tg3_flag(tp, HW_TSO_3) || in tg3_init_one()
17870 !tg3_flag(tp, CPMU_PRESENT)) in tg3_init_one()
17882 !tg3_flag(tp, TSO_CAPABLE) && in tg3_init_one()
17916 if (!tg3_flag(tp, SUPPORT_MSIX)) in tg3_init_one()
17975 if (tg3_flag(tp, PTP_CAPABLE)) { in tg3_init_one()
18008 tg3_flag(tp, USE_LINKCHG_REG) != 0, in tg3_init_one()
18010 tg3_flag(tp, ENABLE_ASF) != 0, in tg3_init_one()
18011 tg3_flag(tp, TSO_CAPABLE) != 0); in tg3_init_one()
18058 if (tg3_flag(tp, USE_PHYLIB)) { in tg3_remove_one()