2514 	u32 int0_enable = 0;  in bcmgenet_link_intr_enable()  local
2520 		int0_enable |= UMAC_IRQ_LINK_EVENT;  in bcmgenet_link_intr_enable()
2522 			int0_enable |= UMAC_IRQ_PHY_DET_R;  in bcmgenet_link_intr_enable()
2524 		int0_enable |= UMAC_IRQ_LINK_EVENT;  in bcmgenet_link_intr_enable()
2527 			int0_enable |= UMAC_IRQ_LINK_EVENT;  in bcmgenet_link_intr_enable()
2529 	bcmgenet_intrl2_0_writel(priv, int0_enable, INTRL2_CPU_MASK_CLEAR);  in bcmgenet_link_intr_enable()
2536 	u32 int0_enable = 0;  in init_umac()  local
2592 		int0_enable |= (UMAC_IRQ_MDIO_DONE | UMAC_IRQ_MDIO_ERROR);  in init_umac()
2594 	bcmgenet_intrl2_0_writel(priv, int0_enable, INTRL2_CPU_MASK_CLEAR);  in init_umac()
3545 	u32 int0_enable = 0;  in bcmgenet_timeout()  local
3560 	int0_enable = UMAC_IRQ_TXDMA_DONE;  in bcmgenet_timeout()
3563 	bcmgenet_intrl2_0_writel(priv, int0_enable, INTRL2_CPU_MASK_CLEAR);  in bcmgenet_timeout()