Lines Matching +full:hsi +full:- +full:mac
3 * Copyright 2011-2013 Broadcom Corporation
10 * at http://www.gnu.org/licenses/gpl-2.0.html (the "GPL").
38 * bnx2x_exe_queue_init - init the Exe Queue object
62 INIT_LIST_HEAD(&o->exe_queue); in bnx2x_exe_queue_init()
63 INIT_LIST_HEAD(&o->pending_comp); in bnx2x_exe_queue_init()
65 spin_lock_init(&o->lock); in bnx2x_exe_queue_init()
67 o->exe_chunk_len = exe_len; in bnx2x_exe_queue_init()
68 o->owner = owner; in bnx2x_exe_queue_init()
71 o->validate = validate; in bnx2x_exe_queue_init()
72 o->remove = remove; in bnx2x_exe_queue_init()
73 o->optimize = optimize; in bnx2x_exe_queue_init()
74 o->execute = exec; in bnx2x_exe_queue_init()
75 o->get = get; in bnx2x_exe_queue_init()
93 spin_lock_bh(&o->lock); in bnx2x_exe_queue_length()
95 list_for_each_entry(elem, &o->exe_queue, link) in bnx2x_exe_queue_length()
98 spin_unlock_bh(&o->lock); in bnx2x_exe_queue_length()
104 * bnx2x_exe_queue_add - add a new element to the execution queue
109 * @restore: true - do not optimize the command
120 spin_lock_bh(&o->lock); in bnx2x_exe_queue_add()
124 rc = o->optimize(bp, o->owner, elem); in bnx2x_exe_queue_add()
129 rc = o->validate(bp, o->owner, elem); in bnx2x_exe_queue_add()
137 list_add_tail(&elem->link, &o->exe_queue); in bnx2x_exe_queue_add()
139 spin_unlock_bh(&o->lock); in bnx2x_exe_queue_add()
146 spin_unlock_bh(&o->lock); in bnx2x_exe_queue_add()
157 while (!list_empty(&o->pending_comp)) { in __bnx2x_exe_queue_reset_pending()
158 elem = list_first_entry(&o->pending_comp, in __bnx2x_exe_queue_reset_pending()
161 list_del(&elem->link); in __bnx2x_exe_queue_reset_pending()
167 * bnx2x_exe_queue_step - execute one execution chunk atomically
173 * (Should be called while holding the exe_queue->lock).
190 if (!list_empty(&o->pending_comp)) { in bnx2x_exe_queue_step()
202 while (!list_empty(&o->exe_queue)) { in bnx2x_exe_queue_step()
203 elem = list_first_entry(&o->exe_queue, struct bnx2x_exeq_elem, in bnx2x_exe_queue_step()
205 WARN_ON(!elem->cmd_len); in bnx2x_exe_queue_step()
207 if (cur_len + elem->cmd_len <= o->exe_chunk_len) { in bnx2x_exe_queue_step()
208 cur_len += elem->cmd_len; in bnx2x_exe_queue_step()
213 list_add_tail(&spacer.link, &o->pending_comp); in bnx2x_exe_queue_step()
215 list_move_tail(&elem->link, &o->pending_comp); in bnx2x_exe_queue_step()
225 rc = o->execute(bp, o->owner, &o->pending_comp, ramrod_flags); in bnx2x_exe_queue_step()
230 list_splice_init(&o->pending_comp, &o->exe_queue); in bnx2x_exe_queue_step()
242 bool empty = list_empty(&o->exe_queue); in bnx2x_exe_queue_empty()
247 return empty && list_empty(&o->pending_comp); in bnx2x_exe_queue_empty()
260 return !!test_bit(o->state, o->pstate); in bnx2x_raw_check_pending()
266 clear_bit(o->state, o->pstate); in bnx2x_raw_clear_pending()
273 set_bit(o->state, o->pstate); in bnx2x_raw_set_pending()
278 * bnx2x_state_wait - wait until the given bit(state) is cleared
297 while (cnt--) { in bnx2x_state_wait()
300 DP(BNX2X_MSG_SP, "exit (cnt %d)\n", 5000 - cnt); in bnx2x_state_wait()
307 if (bp->panic) in bnx2x_state_wait()
308 return -EIO; in bnx2x_state_wait()
317 return -EBUSY; in bnx2x_state_wait()
322 return bnx2x_state_wait(bp, raw->state, raw->pstate); in bnx2x_raw_wait()
325 /***************** Classification verbs: Set/Del MAC/VLAN/VLAN-MAC ************/
329 struct bnx2x_credit_pool_obj *mp = o->macs_pool; in bnx2x_get_cam_offset_mac()
333 return mp->get_entry(mp, offset); in bnx2x_get_cam_offset_mac()
338 struct bnx2x_credit_pool_obj *mp = o->macs_pool; in bnx2x_get_credit_mac()
342 return mp->get(mp, 1); in bnx2x_get_credit_mac()
347 struct bnx2x_credit_pool_obj *vp = o->vlans_pool; in bnx2x_get_cam_offset_vlan()
351 return vp->get_entry(vp, offset); in bnx2x_get_cam_offset_vlan()
356 struct bnx2x_credit_pool_obj *vp = o->vlans_pool; in bnx2x_get_credit_vlan()
360 return vp->get(vp, 1); in bnx2x_get_credit_vlan()
365 struct bnx2x_credit_pool_obj *mp = o->macs_pool; in bnx2x_get_credit_vlan_mac()
366 struct bnx2x_credit_pool_obj *vp = o->vlans_pool; in bnx2x_get_credit_vlan_mac()
368 if (!mp->get(mp, 1)) in bnx2x_get_credit_vlan_mac()
371 if (!vp->get(vp, 1)) { in bnx2x_get_credit_vlan_mac()
372 mp->put(mp, 1); in bnx2x_get_credit_vlan_mac()
381 struct bnx2x_credit_pool_obj *mp = o->macs_pool; in bnx2x_put_cam_offset_mac()
383 return mp->put_entry(mp, offset); in bnx2x_put_cam_offset_mac()
388 struct bnx2x_credit_pool_obj *mp = o->macs_pool; in bnx2x_put_credit_mac()
390 return mp->put(mp, 1); in bnx2x_put_credit_mac()
395 struct bnx2x_credit_pool_obj *vp = o->vlans_pool; in bnx2x_put_cam_offset_vlan()
397 return vp->put_entry(vp, offset); in bnx2x_put_cam_offset_vlan()
402 struct bnx2x_credit_pool_obj *vp = o->vlans_pool; in bnx2x_put_credit_vlan()
404 return vp->put(vp, 1); in bnx2x_put_credit_vlan()
409 struct bnx2x_credit_pool_obj *mp = o->macs_pool; in bnx2x_put_credit_vlan_mac()
410 struct bnx2x_credit_pool_obj *vp = o->vlans_pool; in bnx2x_put_credit_vlan_mac()
412 if (!mp->put(mp, 1)) in bnx2x_put_credit_vlan_mac()
415 if (!vp->put(vp, 1)) { in bnx2x_put_credit_vlan_mac()
416 mp->get(mp, 1); in bnx2x_put_credit_vlan_mac()
424 * __bnx2x_vlan_mac_h_write_trylock - try getting the vlan mac writer lock
429 * Context: Non-blocking implementation; should be called under execution
435 if (o->head_reader) { in __bnx2x_vlan_mac_h_write_trylock()
436 DP(BNX2X_MSG_SP, "vlan_mac_lock writer - There are readers; Busy\n"); in __bnx2x_vlan_mac_h_write_trylock()
437 return -EBUSY; in __bnx2x_vlan_mac_h_write_trylock()
440 DP(BNX2X_MSG_SP, "vlan_mac_lock writer - Taken\n"); in __bnx2x_vlan_mac_h_write_trylock()
445 * __bnx2x_vlan_mac_h_exec_pending - execute step instead of a previous step
457 unsigned long ramrod_flags = o->saved_ramrod_flags; in __bnx2x_vlan_mac_h_exec_pending()
461 o->head_exe_request = false; in __bnx2x_vlan_mac_h_exec_pending()
462 o->saved_ramrod_flags = 0; in __bnx2x_vlan_mac_h_exec_pending()
463 rc = bnx2x_exe_queue_step(bp, &o->exe_queue, &ramrod_flags); in __bnx2x_vlan_mac_h_exec_pending()
474 * __bnx2x_vlan_mac_h_pend - Pend an execution step which couldn't run
486 o->head_exe_request = true; in __bnx2x_vlan_mac_h_pend()
487 o->saved_ramrod_flags = ramrod_flags; in __bnx2x_vlan_mac_h_pend()
493 * __bnx2x_vlan_mac_h_write_unlock - unlock the vlan mac head list writer lock
499 * execution exists, it would perform it - possibly releasing and
508 while (o->head_exe_request) { in __bnx2x_vlan_mac_h_write_unlock()
509 DP(BNX2X_MSG_SP, "vlan_mac_lock - writer release encountered a pending request\n"); in __bnx2x_vlan_mac_h_write_unlock()
516 * __bnx2x_vlan_mac_h_read_lock - lock the vlan mac head list reader lock
527 /* If we got here, we're holding lock --> no WRITER exists */ in __bnx2x_vlan_mac_h_read_lock()
528 o->head_reader++; in __bnx2x_vlan_mac_h_read_lock()
529 DP(BNX2X_MSG_SP, "vlan_mac_lock - locked reader - number %d\n", in __bnx2x_vlan_mac_h_read_lock()
530 o->head_reader); in __bnx2x_vlan_mac_h_read_lock()
536 * bnx2x_vlan_mac_h_read_lock - lock the vlan mac head list reader lock
548 spin_lock_bh(&o->exe_queue.lock); in bnx2x_vlan_mac_h_read_lock()
550 spin_unlock_bh(&o->exe_queue.lock); in bnx2x_vlan_mac_h_read_lock()
556 * __bnx2x_vlan_mac_h_read_unlock - unlock the vlan mac head list reader lock
568 if (!o->head_reader) { in __bnx2x_vlan_mac_h_read_unlock()
569 BNX2X_ERR("Need to release vlan mac reader lock, but lock isn't taken\n"); in __bnx2x_vlan_mac_h_read_unlock()
574 o->head_reader--; in __bnx2x_vlan_mac_h_read_unlock()
575 DP(BNX2X_MSG_SP, "vlan_mac_lock - decreased readers to %d\n", in __bnx2x_vlan_mac_h_read_unlock()
576 o->head_reader); in __bnx2x_vlan_mac_h_read_unlock()
580 * was last - if so we need to execute the command. in __bnx2x_vlan_mac_h_read_unlock()
582 if (!o->head_reader && o->head_exe_request) { in __bnx2x_vlan_mac_h_read_unlock()
583 DP(BNX2X_MSG_SP, "vlan_mac_lock - reader release encountered a pending request\n"); in __bnx2x_vlan_mac_h_read_unlock()
591 * bnx2x_vlan_mac_h_read_unlock - unlock the vlan mac head list reader lock
603 spin_lock_bh(&o->exe_queue.lock); in bnx2x_vlan_mac_h_read_unlock()
605 spin_unlock_bh(&o->exe_queue.lock); in bnx2x_vlan_mac_h_read_unlock()
616 DP(BNX2X_MSG_SP, "get_n_elements - taking vlan_mac_lock (reader)\n"); in bnx2x_get_n_elements()
619 BNX2X_ERR("get_n_elements failed to get vlan mac reader lock; Access without lock\n"); in bnx2x_get_n_elements()
622 list_for_each_entry(pos, &o->head, link) { in bnx2x_get_n_elements()
624 memcpy(next, &pos->u, size); in bnx2x_get_n_elements()
633 DP(BNX2X_MSG_SP, "get_n_elements - releasing vlan_mac_lock (reader)\n"); in bnx2x_get_n_elements()
647 DP(BNX2X_MSG_SP, "Checking MAC %pM for ADD command\n", data->mac.mac); in bnx2x_check_mac_add()
649 if (!is_valid_ether_addr(data->mac.mac)) in bnx2x_check_mac_add()
650 return -EINVAL; in bnx2x_check_mac_add()
652 /* Check if a requested MAC already exists */ in bnx2x_check_mac_add()
653 list_for_each_entry(pos, &o->head, link) in bnx2x_check_mac_add()
654 if (ether_addr_equal(data->mac.mac, pos->u.mac.mac) && in bnx2x_check_mac_add()
655 (data->mac.is_inner_mac == pos->u.mac.is_inner_mac)) in bnx2x_check_mac_add()
656 return -EEXIST; in bnx2x_check_mac_add()
667 DP(BNX2X_MSG_SP, "Checking VLAN %d for ADD command\n", data->vlan.vlan); in bnx2x_check_vlan_add()
669 list_for_each_entry(pos, &o->head, link) in bnx2x_check_vlan_add()
670 if (data->vlan.vlan == pos->u.vlan.vlan) in bnx2x_check_vlan_add()
671 return -EEXIST; in bnx2x_check_vlan_add()
683 data->vlan_mac.mac, data->vlan_mac.vlan); in bnx2x_check_vlan_mac_add()
685 list_for_each_entry(pos, &o->head, link) in bnx2x_check_vlan_mac_add()
686 if ((data->vlan_mac.vlan == pos->u.vlan_mac.vlan) && in bnx2x_check_vlan_mac_add()
687 (!memcmp(data->vlan_mac.mac, pos->u.vlan_mac.mac, in bnx2x_check_vlan_mac_add()
689 (data->vlan_mac.is_inner_mac == in bnx2x_check_vlan_mac_add()
690 pos->u.vlan_mac.is_inner_mac)) in bnx2x_check_vlan_mac_add()
691 return -EEXIST; in bnx2x_check_vlan_mac_add()
704 DP(BNX2X_MSG_SP, "Checking MAC %pM for DEL command\n", data->mac.mac); in bnx2x_check_mac_del()
706 list_for_each_entry(pos, &o->head, link) in bnx2x_check_mac_del()
707 if (ether_addr_equal(data->mac.mac, pos->u.mac.mac) && in bnx2x_check_mac_del()
708 (data->mac.is_inner_mac == pos->u.mac.is_inner_mac)) in bnx2x_check_mac_del()
721 DP(BNX2X_MSG_SP, "Checking VLAN %d for DEL command\n", data->vlan.vlan); in bnx2x_check_vlan_del()
723 list_for_each_entry(pos, &o->head, link) in bnx2x_check_vlan_del()
724 if (data->vlan.vlan == pos->u.vlan.vlan) in bnx2x_check_vlan_del()
738 data->vlan_mac.mac, data->vlan_mac.vlan); in bnx2x_check_vlan_mac_del()
740 list_for_each_entry(pos, &o->head, link) in bnx2x_check_vlan_mac_del()
741 if ((data->vlan_mac.vlan == pos->u.vlan_mac.vlan) && in bnx2x_check_vlan_mac_del()
742 (!memcmp(data->vlan_mac.mac, pos->u.vlan_mac.mac, in bnx2x_check_vlan_mac_del()
744 (data->vlan_mac.is_inner_mac == in bnx2x_check_vlan_mac_del()
745 pos->u.vlan_mac.is_inner_mac)) in bnx2x_check_vlan_mac_del()
763 pos = src_o->check_del(bp, src_o, data); in bnx2x_check_move()
766 rc = dst_o->check_add(bp, dst_o, data); in bnx2x_check_move()
769 * or can't be deleted - return an error. in bnx2x_check_move()
788 struct bnx2x_raw_obj *raw = &o->raw; in bnx2x_vlan_mac_get_rx_tx_flag()
791 if ((raw->obj_type == BNX2X_OBJ_TYPE_TX) || in bnx2x_vlan_mac_get_rx_tx_flag()
792 (raw->obj_type == BNX2X_OBJ_TYPE_RX_TX)) in bnx2x_vlan_mac_get_rx_tx_flag()
795 if ((raw->obj_type == BNX2X_OBJ_TYPE_RX) || in bnx2x_vlan_mac_get_rx_tx_flag()
796 (raw->obj_type == BNX2X_OBJ_TYPE_RX_TX)) in bnx2x_vlan_mac_get_rx_tx_flag()
834 * bnx2x_vlan_mac_set_cmd_hdr_e2 - set a header in a single classify ramrod
847 struct bnx2x_raw_obj *raw = &o->raw; in bnx2x_vlan_mac_set_cmd_hdr_e2()
849 hdr->client_id = raw->cl_id; in bnx2x_vlan_mac_set_cmd_hdr_e2()
850 hdr->func_id = raw->func_id; in bnx2x_vlan_mac_set_cmd_hdr_e2()
853 hdr->cmd_general_data |= in bnx2x_vlan_mac_set_cmd_hdr_e2()
857 hdr->cmd_general_data |= ETH_CLASSIFY_CMD_HEADER_IS_ADD; in bnx2x_vlan_mac_set_cmd_hdr_e2()
859 hdr->cmd_general_data |= in bnx2x_vlan_mac_set_cmd_hdr_e2()
864 * bnx2x_vlan_mac_set_rdata_hdr_e2 - set the classify ramrod data header
877 hdr->echo = cpu_to_le32((cid & BNX2X_SWCID_MASK) | in bnx2x_vlan_mac_set_rdata_hdr_e2()
879 hdr->rule_cnt = (u8)rule_cnt; in bnx2x_vlan_mac_set_rdata_hdr_e2()
888 struct bnx2x_raw_obj *raw = &o->raw; in bnx2x_set_one_mac_e2()
890 (struct eth_classify_rules_ramrod_data *)(raw->rdata); in bnx2x_set_one_mac_e2()
891 int rule_cnt = rule_idx + 1, cmd = elem->cmd_data.vlan_mac.cmd; in bnx2x_set_one_mac_e2()
892 union eth_classify_rule_cmd *rule_entry = &data->rules[rule_idx]; in bnx2x_set_one_mac_e2()
894 unsigned long *vlan_mac_flags = &elem->cmd_data.vlan_mac.vlan_mac_flags; in bnx2x_set_one_mac_e2()
895 u8 *mac = elem->cmd_data.vlan_mac.u.mac.mac; in bnx2x_set_one_mac_e2() local
899 * single ETH MAC. in bnx2x_set_one_mac_e2()
903 * etc.), consider better utilisation of 8 per function MAC in bnx2x_set_one_mac_e2()
909 * MAC and iSCSI L2 MAC. in bnx2x_set_one_mac_e2()
911 * If this MAC is moving from one Queue to another, no need to change in bnx2x_set_one_mac_e2()
916 bnx2x_set_mac_in_nig(bp, add, mac, in bnx2x_set_one_mac_e2()
919 bnx2x_set_mac_in_nig(bp, add, mac, in bnx2x_set_one_mac_e2()
929 &rule_entry->mac.header); in bnx2x_set_one_mac_e2()
931 DP(BNX2X_MSG_SP, "About to %s MAC %pM for Queue %d\n", in bnx2x_set_one_mac_e2()
932 (add ? "add" : "delete"), mac, raw->cl_id); in bnx2x_set_one_mac_e2()
934 /* Set a MAC itself */ in bnx2x_set_one_mac_e2()
935 bnx2x_set_fw_mac_addr(&rule_entry->mac.mac_msb, in bnx2x_set_one_mac_e2()
936 &rule_entry->mac.mac_mid, in bnx2x_set_one_mac_e2()
937 &rule_entry->mac.mac_lsb, mac); in bnx2x_set_one_mac_e2()
938 rule_entry->mac.inner_mac = in bnx2x_set_one_mac_e2()
939 cpu_to_le16(elem->cmd_data.vlan_mac.u.mac.is_inner_mac); in bnx2x_set_one_mac_e2()
941 /* MOVE: Add a rule that will add this MAC to the target Queue */ in bnx2x_set_one_mac_e2()
948 elem->cmd_data.vlan_mac.target_obj, in bnx2x_set_one_mac_e2()
950 &rule_entry->mac.header); in bnx2x_set_one_mac_e2()
952 /* Set a MAC itself */ in bnx2x_set_one_mac_e2()
953 bnx2x_set_fw_mac_addr(&rule_entry->mac.mac_msb, in bnx2x_set_one_mac_e2()
954 &rule_entry->mac.mac_mid, in bnx2x_set_one_mac_e2()
955 &rule_entry->mac.mac_lsb, mac); in bnx2x_set_one_mac_e2()
956 rule_entry->mac.inner_mac = in bnx2x_set_one_mac_e2()
957 cpu_to_le16(elem->cmd_data.vlan_mac. in bnx2x_set_one_mac_e2()
958 u.mac.is_inner_mac); in bnx2x_set_one_mac_e2()
964 bnx2x_vlan_mac_set_rdata_hdr_e2(raw->cid, raw->state, &data->header, in bnx2x_set_one_mac_e2()
969 * bnx2x_vlan_mac_set_rdata_hdr_e1x - set a header in a single classify ramrod
983 struct bnx2x_raw_obj *r = &o->raw; in bnx2x_vlan_mac_set_rdata_hdr_e1x()
985 hdr->length = 1; in bnx2x_vlan_mac_set_rdata_hdr_e1x()
986 hdr->offset = (u8)cam_offset; in bnx2x_vlan_mac_set_rdata_hdr_e1x()
987 hdr->client_id = cpu_to_le16(0xff); in bnx2x_vlan_mac_set_rdata_hdr_e1x()
988 hdr->echo = cpu_to_le32((r->cid & BNX2X_SWCID_MASK) | in bnx2x_vlan_mac_set_rdata_hdr_e1x()
993 struct bnx2x_vlan_mac_obj *o, bool add, int opcode, u8 *mac, in bnx2x_vlan_mac_set_cfg_entry_e1x() argument
996 struct bnx2x_raw_obj *r = &o->raw; in bnx2x_vlan_mac_set_cfg_entry_e1x()
997 u32 cl_bit_vec = (1 << r->cl_id); in bnx2x_vlan_mac_set_cfg_entry_e1x()
999 cfg_entry->clients_bit_vector = cpu_to_le32(cl_bit_vec); in bnx2x_vlan_mac_set_cfg_entry_e1x()
1000 cfg_entry->pf_id = r->func_id; in bnx2x_vlan_mac_set_cfg_entry_e1x()
1001 cfg_entry->vlan_id = cpu_to_le16(vlan_id); in bnx2x_vlan_mac_set_cfg_entry_e1x()
1004 SET_FLAG(cfg_entry->flags, MAC_CONFIGURATION_ENTRY_ACTION_TYPE, in bnx2x_vlan_mac_set_cfg_entry_e1x()
1006 SET_FLAG(cfg_entry->flags, in bnx2x_vlan_mac_set_cfg_entry_e1x()
1009 /* Set a MAC in a ramrod data */ in bnx2x_vlan_mac_set_cfg_entry_e1x()
1010 bnx2x_set_fw_mac_addr(&cfg_entry->msb_mac_addr, in bnx2x_vlan_mac_set_cfg_entry_e1x()
1011 &cfg_entry->middle_mac_addr, in bnx2x_vlan_mac_set_cfg_entry_e1x()
1012 &cfg_entry->lsb_mac_addr, mac); in bnx2x_vlan_mac_set_cfg_entry_e1x()
1014 SET_FLAG(cfg_entry->flags, MAC_CONFIGURATION_ENTRY_ACTION_TYPE, in bnx2x_vlan_mac_set_cfg_entry_e1x()
1020 u8 *mac, u16 vlan_id, int opcode, struct mac_configuration_cmd *config) in bnx2x_vlan_mac_set_rdata_e1x() argument
1022 struct mac_configuration_entry *cfg_entry = &config->config_table[0]; in bnx2x_vlan_mac_set_rdata_e1x()
1023 struct bnx2x_raw_obj *raw = &o->raw; in bnx2x_vlan_mac_set_rdata_e1x()
1026 &config->hdr); in bnx2x_vlan_mac_set_rdata_e1x()
1027 bnx2x_vlan_mac_set_cfg_entry_e1x(bp, o, add, opcode, mac, vlan_id, in bnx2x_vlan_mac_set_rdata_e1x()
1030 DP(BNX2X_MSG_SP, "%s MAC %pM CLID %d CAM offset %d\n", in bnx2x_vlan_mac_set_rdata_e1x()
1032 mac, raw->cl_id, cam_offset); in bnx2x_vlan_mac_set_rdata_e1x()
1036 * bnx2x_set_one_mac_e1x - fill a single MAC rule ramrod data
1049 struct bnx2x_raw_obj *raw = &o->raw; in bnx2x_set_one_mac_e1x()
1051 (struct mac_configuration_cmd *)(raw->rdata); in bnx2x_set_one_mac_e1x()
1055 bool add = (elem->cmd_data.vlan_mac.cmd == BNX2X_VLAN_MAC_ADD) ? in bnx2x_set_one_mac_e1x()
1061 bnx2x_vlan_mac_set_rdata_e1x(bp, o, raw->state, in bnx2x_set_one_mac_e1x()
1063 elem->cmd_data.vlan_mac.u.mac.mac, 0, in bnx2x_set_one_mac_e1x()
1072 struct bnx2x_raw_obj *raw = &o->raw; in bnx2x_set_one_vlan_e2()
1074 (struct eth_classify_rules_ramrod_data *)(raw->rdata); in bnx2x_set_one_vlan_e2()
1076 union eth_classify_rule_cmd *rule_entry = &data->rules[rule_idx]; in bnx2x_set_one_vlan_e2()
1077 enum bnx2x_vlan_mac_cmd cmd = elem->cmd_data.vlan_mac.cmd; in bnx2x_set_one_vlan_e2()
1079 u16 vlan = elem->cmd_data.vlan_mac.u.vlan.vlan; in bnx2x_set_one_vlan_e2()
1087 &rule_entry->vlan.header); in bnx2x_set_one_vlan_e2()
1093 rule_entry->vlan.vlan = cpu_to_le16(vlan); in bnx2x_set_one_vlan_e2()
1095 /* MOVE: Add a rule that will add this MAC to the target Queue */ in bnx2x_set_one_vlan_e2()
1102 elem->cmd_data.vlan_mac.target_obj, in bnx2x_set_one_vlan_e2()
1104 &rule_entry->vlan.header); in bnx2x_set_one_vlan_e2()
1107 rule_entry->vlan.vlan = cpu_to_le16(vlan); in bnx2x_set_one_vlan_e2()
1113 bnx2x_vlan_mac_set_rdata_hdr_e2(raw->cid, raw->state, &data->header, in bnx2x_set_one_vlan_e2()
1122 struct bnx2x_raw_obj *raw = &o->raw; in bnx2x_set_one_vlan_mac_e2()
1124 (struct eth_classify_rules_ramrod_data *)(raw->rdata); in bnx2x_set_one_vlan_mac_e2()
1126 union eth_classify_rule_cmd *rule_entry = &data->rules[rule_idx]; in bnx2x_set_one_vlan_mac_e2()
1127 enum bnx2x_vlan_mac_cmd cmd = elem->cmd_data.vlan_mac.cmd; in bnx2x_set_one_vlan_mac_e2()
1129 u16 vlan = elem->cmd_data.vlan_mac.u.vlan_mac.vlan; in bnx2x_set_one_vlan_mac_e2()
1130 u8 *mac = elem->cmd_data.vlan_mac.u.vlan_mac.mac; in bnx2x_set_one_vlan_mac_e2() local
1139 &rule_entry->pair.header); in bnx2x_set_one_vlan_mac_e2()
1141 /* Set VLAN and MAC themselves */ in bnx2x_set_one_vlan_mac_e2()
1142 rule_entry->pair.vlan = cpu_to_le16(vlan); in bnx2x_set_one_vlan_mac_e2()
1143 bnx2x_set_fw_mac_addr(&rule_entry->pair.mac_msb, in bnx2x_set_one_vlan_mac_e2()
1144 &rule_entry->pair.mac_mid, in bnx2x_set_one_vlan_mac_e2()
1145 &rule_entry->pair.mac_lsb, mac); in bnx2x_set_one_vlan_mac_e2()
1146 inner_mac = elem->cmd_data.vlan_mac.u.vlan_mac.is_inner_mac; in bnx2x_set_one_vlan_mac_e2()
1147 rule_entry->pair.inner_mac = cpu_to_le16(inner_mac); in bnx2x_set_one_vlan_mac_e2()
1148 /* MOVE: Add a rule that will add this MAC/VLAN to the target Queue */ in bnx2x_set_one_vlan_mac_e2()
1156 target_obj = elem->cmd_data.vlan_mac.target_obj; in bnx2x_set_one_vlan_mac_e2()
1159 &rule_entry->pair.header); in bnx2x_set_one_vlan_mac_e2()
1162 rule_entry->pair.vlan = cpu_to_le16(vlan); in bnx2x_set_one_vlan_mac_e2()
1163 bnx2x_set_fw_mac_addr(&rule_entry->pair.mac_msb, in bnx2x_set_one_vlan_mac_e2()
1164 &rule_entry->pair.mac_mid, in bnx2x_set_one_vlan_mac_e2()
1165 &rule_entry->pair.mac_lsb, mac); in bnx2x_set_one_vlan_mac_e2()
1166 rule_entry->pair.inner_mac = cpu_to_le16(inner_mac); in bnx2x_set_one_vlan_mac_e2()
1170 bnx2x_vlan_mac_set_rdata_hdr_e2(raw->cid, raw->state, &data->header, in bnx2x_set_one_vlan_mac_e2()
1175 * bnx2x_set_one_vlan_mac_e1h -
1188 struct bnx2x_raw_obj *raw = &o->raw; in bnx2x_set_one_vlan_mac_e1h()
1190 (struct mac_configuration_cmd *)(raw->rdata); in bnx2x_set_one_vlan_mac_e1h()
1194 bool add = (elem->cmd_data.vlan_mac.cmd == BNX2X_VLAN_MAC_ADD) ? in bnx2x_set_one_vlan_mac_e1h()
1202 elem->cmd_data.vlan_mac.u.vlan_mac.mac, in bnx2x_set_one_vlan_mac_e1h()
1203 elem->cmd_data.vlan_mac.u.vlan_mac.vlan, in bnx2x_set_one_vlan_mac_e1h()
1208 * bnx2x_vlan_mac_restore - reconfigure next MAC/VLAN/VLAN-MAC element
1214 * reconfigure next MAC/VLAN/VLAN-MAC element from the
1220 * pointer to the cookie - that should be given back in the next call to make
1231 struct bnx2x_vlan_mac_obj *o = p->vlan_mac_obj; in bnx2x_vlan_mac_restore()
1233 /* If list is empty - there is nothing to do here */ in bnx2x_vlan_mac_restore()
1234 if (list_empty(&o->head)) { in bnx2x_vlan_mac_restore()
1241 *ppos = list_first_entry(&o->head, in bnx2x_vlan_mac_restore()
1249 /* If it's the last step - return NULL */ in bnx2x_vlan_mac_restore()
1250 if (list_is_last(&pos->link, &o->head)) in bnx2x_vlan_mac_restore()
1254 memcpy(&p->user_req.u, &pos->u, sizeof(pos->u)); in bnx2x_vlan_mac_restore()
1257 p->user_req.cmd = BNX2X_VLAN_MAC_ADD; in bnx2x_vlan_mac_restore()
1260 p->user_req.vlan_mac_flags = pos->vlan_mac_flags; in bnx2x_vlan_mac_restore()
1263 __set_bit(RAMROD_RESTORE, &p->ramrod_flags); in bnx2x_vlan_mac_restore()
1277 struct bnx2x_mac_ramrod_data *data = &elem->cmd_data.vlan_mac.u.mac; in bnx2x_exeq_get_mac()
1280 list_for_each_entry(pos, &o->exe_queue, link) in bnx2x_exeq_get_mac()
1281 if (!memcmp(&pos->cmd_data.vlan_mac.u.mac, data, in bnx2x_exeq_get_mac()
1283 (pos->cmd_data.vlan_mac.cmd == elem->cmd_data.vlan_mac.cmd)) in bnx2x_exeq_get_mac()
1294 struct bnx2x_vlan_ramrod_data *data = &elem->cmd_data.vlan_mac.u.vlan; in bnx2x_exeq_get_vlan()
1297 list_for_each_entry(pos, &o->exe_queue, link) in bnx2x_exeq_get_vlan()
1298 if (!memcmp(&pos->cmd_data.vlan_mac.u.vlan, data, in bnx2x_exeq_get_vlan()
1300 (pos->cmd_data.vlan_mac.cmd == elem->cmd_data.vlan_mac.cmd)) in bnx2x_exeq_get_vlan()
1312 &elem->cmd_data.vlan_mac.u.vlan_mac; in bnx2x_exeq_get_vlan_mac()
1315 list_for_each_entry(pos, &o->exe_queue, link) in bnx2x_exeq_get_vlan_mac()
1316 if (!memcmp(&pos->cmd_data.vlan_mac.u.vlan_mac, data, in bnx2x_exeq_get_vlan_mac()
1318 (pos->cmd_data.vlan_mac.cmd == in bnx2x_exeq_get_vlan_mac()
1319 elem->cmd_data.vlan_mac.cmd)) in bnx2x_exeq_get_vlan_mac()
1326 * bnx2x_validate_vlan_mac_add - check if an ADD command can be executed
1342 struct bnx2x_vlan_mac_obj *o = &qo->vlan_mac; in bnx2x_validate_vlan_mac_add()
1343 struct bnx2x_exe_queue_obj *exeq = &o->exe_queue; in bnx2x_validate_vlan_mac_add()
1347 rc = o->check_add(bp, o, &elem->cmd_data.vlan_mac.u); in bnx2x_validate_vlan_mac_add()
1354 * MAC/VLAN/VLAN-MAC. Return an error if there is. in bnx2x_validate_vlan_mac_add()
1356 if (exeq->get(exeq, elem)) { in bnx2x_validate_vlan_mac_add()
1358 return -EEXIST; in bnx2x_validate_vlan_mac_add()
1367 &elem->cmd_data.vlan_mac.vlan_mac_flags) || in bnx2x_validate_vlan_mac_add()
1368 o->get_credit(o))) in bnx2x_validate_vlan_mac_add()
1369 return -EINVAL; in bnx2x_validate_vlan_mac_add()
1375 * bnx2x_validate_vlan_mac_del - check if the DEL command can be executed
1390 struct bnx2x_vlan_mac_obj *o = &qo->vlan_mac; in bnx2x_validate_vlan_mac_del()
1392 struct bnx2x_exe_queue_obj *exeq = &o->exe_queue; in bnx2x_validate_vlan_mac_del()
1396 * - return a BNX2X_EXIST. in bnx2x_validate_vlan_mac_del()
1398 pos = o->check_del(bp, o, &elem->cmd_data.vlan_mac.u); in bnx2x_validate_vlan_mac_del()
1401 return -EEXIST; in bnx2x_validate_vlan_mac_del()
1405 * MAC/VLAN/VLAN-MAC. Return an error if so. in bnx2x_validate_vlan_mac_del()
1411 if (exeq->get(exeq, &query_elem)) { in bnx2x_validate_vlan_mac_del()
1413 return -EINVAL; in bnx2x_validate_vlan_mac_del()
1417 if (exeq->get(exeq, elem)) { in bnx2x_validate_vlan_mac_del()
1419 return -EEXIST; in bnx2x_validate_vlan_mac_del()
1424 &elem->cmd_data.vlan_mac.vlan_mac_flags) || in bnx2x_validate_vlan_mac_del()
1425 o->put_credit(o))) { in bnx2x_validate_vlan_mac_del()
1427 return -EINVAL; in bnx2x_validate_vlan_mac_del()
1434 * bnx2x_validate_vlan_mac_move - check if the MOVE command can be executed
1449 struct bnx2x_vlan_mac_obj *src_o = &qo->vlan_mac; in bnx2x_validate_vlan_mac_move()
1450 struct bnx2x_vlan_mac_obj *dest_o = elem->cmd_data.vlan_mac.target_obj; in bnx2x_validate_vlan_mac_move()
1452 struct bnx2x_exe_queue_obj *src_exeq = &src_o->exe_queue; in bnx2x_validate_vlan_mac_move()
1453 struct bnx2x_exe_queue_obj *dest_exeq = &dest_o->exe_queue; in bnx2x_validate_vlan_mac_move()
1458 if (!src_o->check_move(bp, src_o, dest_o, in bnx2x_validate_vlan_mac_move()
1459 &elem->cmd_data.vlan_mac.u)) { in bnx2x_validate_vlan_mac_move()
1461 return -EINVAL; in bnx2x_validate_vlan_mac_move()
1472 if (src_exeq->get(src_exeq, &query_elem)) { in bnx2x_validate_vlan_mac_move()
1474 return -EINVAL; in bnx2x_validate_vlan_mac_move()
1478 if (src_exeq->get(src_exeq, elem)) { in bnx2x_validate_vlan_mac_move()
1480 return -EEXIST; in bnx2x_validate_vlan_mac_move()
1485 if (dest_exeq->get(dest_exeq, &query_elem)) { in bnx2x_validate_vlan_mac_move()
1487 return -EINVAL; in bnx2x_validate_vlan_mac_move()
1492 &elem->cmd_data.vlan_mac.vlan_mac_flags) || in bnx2x_validate_vlan_mac_move()
1493 dest_o->get_credit(dest_o))) in bnx2x_validate_vlan_mac_move()
1494 return -EINVAL; in bnx2x_validate_vlan_mac_move()
1497 &elem->cmd_data.vlan_mac.vlan_mac_flags) || in bnx2x_validate_vlan_mac_move()
1498 src_o->put_credit(src_o))) { in bnx2x_validate_vlan_mac_move()
1500 dest_o->put_credit(dest_o); in bnx2x_validate_vlan_mac_move()
1501 return -EINVAL; in bnx2x_validate_vlan_mac_move()
1511 switch (elem->cmd_data.vlan_mac.cmd) { in bnx2x_validate_vlan_mac()
1519 return -EINVAL; in bnx2x_validate_vlan_mac()
1531 &elem->cmd_data.vlan_mac.vlan_mac_flags)) in bnx2x_remove_vlan_mac()
1534 switch (elem->cmd_data.vlan_mac.cmd) { in bnx2x_remove_vlan_mac()
1537 rc = qo->vlan_mac.put_credit(&qo->vlan_mac); in bnx2x_remove_vlan_mac()
1540 rc = qo->vlan_mac.get_credit(&qo->vlan_mac); in bnx2x_remove_vlan_mac()
1543 return -EINVAL; in bnx2x_remove_vlan_mac()
1547 return -EINVAL; in bnx2x_remove_vlan_mac()
1553 * bnx2x_wait_vlan_mac - passively wait for 5 seconds until all work completes.
1563 struct bnx2x_exe_queue_obj *exeq = &o->exe_queue; in bnx2x_wait_vlan_mac()
1564 struct bnx2x_raw_obj *raw = &o->raw; in bnx2x_wait_vlan_mac()
1566 while (cnt--) { in bnx2x_wait_vlan_mac()
1568 rc = raw->wait_comp(bp, raw); in bnx2x_wait_vlan_mac()
1579 return -EBUSY; in bnx2x_wait_vlan_mac()
1588 spin_lock_bh(&o->exe_queue.lock); in __bnx2x_vlan_mac_execute_step()
1590 DP(BNX2X_MSG_SP, "vlan_mac_execute_step - trying to take writer lock\n"); in __bnx2x_vlan_mac_execute_step()
1601 rc = bnx2x_exe_queue_step(bp, &o->exe_queue, ramrod_flags); in __bnx2x_vlan_mac_execute_step()
1603 spin_unlock_bh(&o->exe_queue.lock); in __bnx2x_vlan_mac_execute_step()
1609 * bnx2x_complete_vlan_mac - complete one VLAN-MAC ramrod
1622 struct bnx2x_raw_obj *r = &o->raw; in bnx2x_complete_vlan_mac()
1628 spin_lock_bh(&o->exe_queue.lock); in bnx2x_complete_vlan_mac()
1631 __bnx2x_exe_queue_reset_pending(bp, &o->exe_queue); in bnx2x_complete_vlan_mac()
1634 r->clear_pending(r); in bnx2x_complete_vlan_mac()
1636 spin_unlock_bh(&o->exe_queue.lock); in bnx2x_complete_vlan_mac()
1639 if (cqe->message.error) in bnx2x_complete_vlan_mac()
1640 return -EINVAL; in bnx2x_complete_vlan_mac()
1651 if (!bnx2x_exe_queue_empty(&o->exe_queue)) in bnx2x_complete_vlan_mac()
1658 * bnx2x_optimize_vlan_mac - optimize ADD and DEL commands.
1669 struct bnx2x_vlan_mac_obj *o = &qo->vlan_mac; in bnx2x_optimize_vlan_mac()
1670 struct bnx2x_exe_queue_obj *exeq = &o->exe_queue; in bnx2x_optimize_vlan_mac()
1674 switch (elem->cmd_data.vlan_mac.cmd) { in bnx2x_optimize_vlan_mac()
1686 /* If we found the appropriate element - delete it */ in bnx2x_optimize_vlan_mac()
1687 pos = exeq->get(exeq, &query); in bnx2x_optimize_vlan_mac()
1692 &pos->cmd_data.vlan_mac.vlan_mac_flags)) { in bnx2x_optimize_vlan_mac()
1694 BNX2X_VLAN_MAC_ADD) && !o->put_credit(o)) { in bnx2x_optimize_vlan_mac()
1696 return -EINVAL; in bnx2x_optimize_vlan_mac()
1697 } else if (!o->get_credit(o)) { /* VLAN_MAC_DEL */ in bnx2x_optimize_vlan_mac()
1699 return -EINVAL; in bnx2x_optimize_vlan_mac()
1704 (elem->cmd_data.vlan_mac.cmd == BNX2X_VLAN_MAC_ADD) ? in bnx2x_optimize_vlan_mac()
1707 list_del(&pos->link); in bnx2x_optimize_vlan_mac()
1716 * bnx2x_vlan_mac_get_registry_elem - prepare a registry element
1733 enum bnx2x_vlan_mac_cmd cmd = elem->cmd_data.vlan_mac.cmd; in bnx2x_vlan_mac_get_registry_elem()
1741 return -ENOMEM; in bnx2x_vlan_mac_get_registry_elem()
1744 if (!o->get_cam_offset(o, ®_elem->cam_offset)) { in bnx2x_vlan_mac_get_registry_elem()
1750 return -EINVAL; in bnx2x_vlan_mac_get_registry_elem()
1753 DP(BNX2X_MSG_SP, "Got cam offset %d\n", reg_elem->cam_offset); in bnx2x_vlan_mac_get_registry_elem()
1755 /* Set a VLAN-MAC data */ in bnx2x_vlan_mac_get_registry_elem()
1756 memcpy(®_elem->u, &elem->cmd_data.vlan_mac.u, in bnx2x_vlan_mac_get_registry_elem()
1757 sizeof(reg_elem->u)); in bnx2x_vlan_mac_get_registry_elem()
1760 reg_elem->vlan_mac_flags = in bnx2x_vlan_mac_get_registry_elem()
1761 elem->cmd_data.vlan_mac.vlan_mac_flags; in bnx2x_vlan_mac_get_registry_elem()
1763 reg_elem = o->check_del(bp, o, &elem->cmd_data.vlan_mac.u); in bnx2x_vlan_mac_get_registry_elem()
1770 * bnx2x_execute_vlan_mac - execute vlan mac command
1785 struct bnx2x_vlan_mac_obj *o = &qo->vlan_mac, *cam_obj; in bnx2x_execute_vlan_mac()
1786 struct bnx2x_raw_obj *r = &o->raw; in bnx2x_execute_vlan_mac()
1797 WARN_ON(r->check_pending(r)); in bnx2x_execute_vlan_mac()
1800 r->set_pending(r); in bnx2x_execute_vlan_mac()
1804 cmd = elem->cmd_data.vlan_mac.cmd; in bnx2x_execute_vlan_mac()
1809 cam_obj = elem->cmd_data.vlan_mac.target_obj; in bnx2x_execute_vlan_mac()
1825 list_add(®_elem->link, &cam_obj->head); in bnx2x_execute_vlan_mac()
1828 o->set_one_rule(bp, o, elem, idx, in bnx2x_execute_vlan_mac()
1829 reg_elem->cam_offset); in bnx2x_execute_vlan_mac()
1845 rc = bnx2x_sp_post(bp, o->ramrod_cmd, r->cid, in bnx2x_execute_vlan_mac()
1846 U64_HI(r->rdata_mapping), in bnx2x_execute_vlan_mac()
1847 U64_LO(r->rdata_mapping), in bnx2x_execute_vlan_mac()
1853 /* Now, when we are done with the ramrod - clean up the registry */ in bnx2x_execute_vlan_mac()
1855 cmd = elem->cmd_data.vlan_mac.cmd; in bnx2x_execute_vlan_mac()
1858 reg_elem = o->check_del(bp, o, in bnx2x_execute_vlan_mac()
1859 &elem->cmd_data.vlan_mac.u); in bnx2x_execute_vlan_mac()
1863 o->put_cam_offset(o, reg_elem->cam_offset); in bnx2x_execute_vlan_mac()
1864 list_del(®_elem->link); in bnx2x_execute_vlan_mac()
1875 r->clear_pending(r); in bnx2x_execute_vlan_mac()
1879 cmd = elem->cmd_data.vlan_mac.cmd; in bnx2x_execute_vlan_mac()
1882 cam_obj = elem->cmd_data.vlan_mac.target_obj; in bnx2x_execute_vlan_mac()
1890 reg_elem = o->check_del(bp, cam_obj, in bnx2x_execute_vlan_mac()
1891 &elem->cmd_data.vlan_mac.u); in bnx2x_execute_vlan_mac()
1893 list_del(®_elem->link); in bnx2x_execute_vlan_mac()
1907 struct bnx2x_vlan_mac_obj *o = p->vlan_mac_obj; in bnx2x_vlan_mac_push_new_cmd()
1908 bool restore = test_bit(RAMROD_RESTORE, &p->ramrod_flags); in bnx2x_vlan_mac_push_new_cmd()
1913 return -ENOMEM; in bnx2x_vlan_mac_push_new_cmd()
1916 switch (p->user_req.cmd) { in bnx2x_vlan_mac_push_new_cmd()
1918 elem->cmd_len = 2; in bnx2x_vlan_mac_push_new_cmd()
1921 elem->cmd_len = 1; in bnx2x_vlan_mac_push_new_cmd()
1925 memcpy(&elem->cmd_data.vlan_mac, &p->user_req, sizeof(p->user_req)); in bnx2x_vlan_mac_push_new_cmd()
1928 return bnx2x_exe_queue_add(bp, &o->exe_queue, elem, restore); in bnx2x_vlan_mac_push_new_cmd()
1932 * bnx2x_config_vlan_mac - configure VLAN/MAC/VLAN_MAC filtering rules.
1942 struct bnx2x_vlan_mac_obj *o = p->vlan_mac_obj; in bnx2x_config_vlan_mac()
1943 unsigned long *ramrod_flags = &p->ramrod_flags; in bnx2x_config_vlan_mac()
1945 struct bnx2x_raw_obj *raw = &o->raw; in bnx2x_config_vlan_mac()
1959 if (!bnx2x_exe_queue_empty(&o->exe_queue)) in bnx2x_config_vlan_mac()
1964 raw->clear_pending(raw); in bnx2x_config_vlan_mac()
1970 rc = __bnx2x_vlan_mac_execute_step(bp, p->vlan_mac_obj, in bnx2x_config_vlan_mac()
1971 &p->ramrod_flags); in bnx2x_config_vlan_mac()
1979 if (test_bit(RAMROD_COMP_WAIT, &p->ramrod_flags)) { in bnx2x_config_vlan_mac()
1983 int max_iterations = bnx2x_exe_queue_length(&o->exe_queue) + 1; in bnx2x_config_vlan_mac()
1985 while (!bnx2x_exe_queue_empty(&o->exe_queue) && in bnx2x_config_vlan_mac()
1986 max_iterations--) { in bnx2x_config_vlan_mac()
1989 rc = raw->wait_comp(bp, raw); in bnx2x_config_vlan_mac()
1995 p->vlan_mac_obj, in bnx2x_config_vlan_mac()
1996 &p->ramrod_flags); in bnx2x_config_vlan_mac()
2008 * bnx2x_vlan_mac_del_all - delete elements with given vlan_mac_flags spec
2027 struct bnx2x_exe_queue_obj *exeq = &o->exe_queue; in bnx2x_vlan_mac_del_all()
2035 spin_lock_bh(&exeq->lock); in bnx2x_vlan_mac_del_all()
2037 list_for_each_entry_safe(exeq_pos, exeq_pos_n, &exeq->exe_queue, link) { in bnx2x_vlan_mac_del_all()
2038 flags = exeq_pos->cmd_data.vlan_mac.vlan_mac_flags; in bnx2x_vlan_mac_del_all()
2041 rc = exeq->remove(bp, exeq->owner, exeq_pos); in bnx2x_vlan_mac_del_all()
2044 spin_unlock_bh(&exeq->lock); in bnx2x_vlan_mac_del_all()
2047 list_del(&exeq_pos->link); in bnx2x_vlan_mac_del_all()
2052 spin_unlock_bh(&exeq->lock); in bnx2x_vlan_mac_del_all()
2060 /* Add all but the last VLAN-MAC to the execution queue without actually in bnx2x_vlan_mac_del_all()
2067 DP(BNX2X_MSG_SP, "vlan_mac_del_all -- taking vlan_mac_lock (reader)\n"); in bnx2x_vlan_mac_del_all()
2072 list_for_each_entry(pos, &o->head, link) { in bnx2x_vlan_mac_del_all()
2073 flags = pos->vlan_mac_flags; in bnx2x_vlan_mac_del_all()
2076 p.user_req.vlan_mac_flags = pos->vlan_mac_flags; in bnx2x_vlan_mac_del_all()
2077 memcpy(&p.user_req.u, &pos->u, sizeof(pos->u)); in bnx2x_vlan_mac_del_all()
2087 DP(BNX2X_MSG_SP, "vlan_mac_del_all -- releasing vlan_mac_lock (reader)\n"); in bnx2x_vlan_mac_del_all()
2100 raw->func_id = func_id; in bnx2x_init_raw_obj()
2101 raw->cid = cid; in bnx2x_init_raw_obj()
2102 raw->cl_id = cl_id; in bnx2x_init_raw_obj()
2103 raw->rdata = rdata; in bnx2x_init_raw_obj()
2104 raw->rdata_mapping = rdata_mapping; in bnx2x_init_raw_obj()
2105 raw->state = state; in bnx2x_init_raw_obj()
2106 raw->pstate = pstate; in bnx2x_init_raw_obj()
2107 raw->obj_type = type; in bnx2x_init_raw_obj()
2108 raw->check_pending = bnx2x_raw_check_pending; in bnx2x_init_raw_obj()
2109 raw->clear_pending = bnx2x_raw_clear_pending; in bnx2x_init_raw_obj()
2110 raw->set_pending = bnx2x_raw_set_pending; in bnx2x_init_raw_obj()
2111 raw->wait_comp = bnx2x_raw_wait; in bnx2x_init_raw_obj()
2120 INIT_LIST_HEAD(&o->head); in bnx2x_init_vlan_mac_common()
2121 o->head_reader = 0; in bnx2x_init_vlan_mac_common()
2122 o->head_exe_request = false; in bnx2x_init_vlan_mac_common()
2123 o->saved_ramrod_flags = 0; in bnx2x_init_vlan_mac_common()
2125 o->macs_pool = macs_pool; in bnx2x_init_vlan_mac_common()
2126 o->vlans_pool = vlans_pool; in bnx2x_init_vlan_mac_common()
2128 o->delete_all = bnx2x_vlan_mac_del_all; in bnx2x_init_vlan_mac_common()
2129 o->restore = bnx2x_vlan_mac_restore; in bnx2x_init_vlan_mac_common()
2130 o->complete = bnx2x_complete_vlan_mac; in bnx2x_init_vlan_mac_common()
2131 o->wait = bnx2x_wait_vlan_mac; in bnx2x_init_vlan_mac_common()
2133 bnx2x_init_raw_obj(&o->raw, cl_id, cid, func_id, rdata, rdata_mapping, in bnx2x_init_vlan_mac_common()
2151 mac_obj->get_credit = bnx2x_get_credit_mac; in bnx2x_init_mac_obj()
2152 mac_obj->put_credit = bnx2x_put_credit_mac; in bnx2x_init_mac_obj()
2153 mac_obj->get_cam_offset = bnx2x_get_cam_offset_mac; in bnx2x_init_mac_obj()
2154 mac_obj->put_cam_offset = bnx2x_put_cam_offset_mac; in bnx2x_init_mac_obj()
2157 mac_obj->set_one_rule = bnx2x_set_one_mac_e1x; in bnx2x_init_mac_obj()
2158 mac_obj->check_del = bnx2x_check_mac_del; in bnx2x_init_mac_obj()
2159 mac_obj->check_add = bnx2x_check_mac_add; in bnx2x_init_mac_obj()
2160 mac_obj->check_move = bnx2x_check_move_always_err; in bnx2x_init_mac_obj()
2161 mac_obj->ramrod_cmd = RAMROD_CMD_ID_ETH_SET_MAC; in bnx2x_init_mac_obj()
2165 &mac_obj->exe_queue, 1, qable_obj, in bnx2x_init_mac_obj()
2172 mac_obj->set_one_rule = bnx2x_set_one_mac_e2; in bnx2x_init_mac_obj()
2173 mac_obj->check_del = bnx2x_check_mac_del; in bnx2x_init_mac_obj()
2174 mac_obj->check_add = bnx2x_check_mac_add; in bnx2x_init_mac_obj()
2175 mac_obj->check_move = bnx2x_check_move; in bnx2x_init_mac_obj()
2176 mac_obj->ramrod_cmd = in bnx2x_init_mac_obj()
2178 mac_obj->get_n_elements = bnx2x_get_n_elements; in bnx2x_init_mac_obj()
2182 &mac_obj->exe_queue, CLASSIFY_RULES_COUNT, in bnx2x_init_mac_obj()
2204 vlan_obj->get_credit = bnx2x_get_credit_vlan; in bnx2x_init_vlan_obj()
2205 vlan_obj->put_credit = bnx2x_put_credit_vlan; in bnx2x_init_vlan_obj()
2206 vlan_obj->get_cam_offset = bnx2x_get_cam_offset_vlan; in bnx2x_init_vlan_obj()
2207 vlan_obj->put_cam_offset = bnx2x_put_cam_offset_vlan; in bnx2x_init_vlan_obj()
2213 vlan_obj->set_one_rule = bnx2x_set_one_vlan_e2; in bnx2x_init_vlan_obj()
2214 vlan_obj->check_del = bnx2x_check_vlan_del; in bnx2x_init_vlan_obj()
2215 vlan_obj->check_add = bnx2x_check_vlan_add; in bnx2x_init_vlan_obj()
2216 vlan_obj->check_move = bnx2x_check_move; in bnx2x_init_vlan_obj()
2217 vlan_obj->ramrod_cmd = in bnx2x_init_vlan_obj()
2219 vlan_obj->get_n_elements = bnx2x_get_n_elements; in bnx2x_init_vlan_obj()
2223 &vlan_obj->exe_queue, CLASSIFY_RULES_COUNT, in bnx2x_init_vlan_obj()
2248 vlan_mac_obj->get_credit = bnx2x_get_credit_vlan_mac; in bnx2x_init_vlan_mac_obj()
2249 vlan_mac_obj->put_credit = bnx2x_put_credit_vlan_mac; in bnx2x_init_vlan_mac_obj()
2251 * single CAM for both MACs and VLAN-MAC pairs. So the offset in bnx2x_init_vlan_mac_obj()
2254 vlan_mac_obj->get_cam_offset = bnx2x_get_cam_offset_mac; in bnx2x_init_vlan_mac_obj()
2255 vlan_mac_obj->put_cam_offset = bnx2x_put_cam_offset_mac; in bnx2x_init_vlan_mac_obj()
2261 vlan_mac_obj->set_one_rule = bnx2x_set_one_vlan_mac_e1h; in bnx2x_init_vlan_mac_obj()
2262 vlan_mac_obj->check_del = bnx2x_check_vlan_mac_del; in bnx2x_init_vlan_mac_obj()
2263 vlan_mac_obj->check_add = bnx2x_check_vlan_mac_add; in bnx2x_init_vlan_mac_obj()
2264 vlan_mac_obj->check_move = bnx2x_check_move_always_err; in bnx2x_init_vlan_mac_obj()
2265 vlan_mac_obj->ramrod_cmd = RAMROD_CMD_ID_ETH_SET_MAC; in bnx2x_init_vlan_mac_obj()
2269 &vlan_mac_obj->exe_queue, 1, qable_obj, in bnx2x_init_vlan_mac_obj()
2276 vlan_mac_obj->set_one_rule = bnx2x_set_one_vlan_mac_e2; in bnx2x_init_vlan_mac_obj()
2277 vlan_mac_obj->check_del = bnx2x_check_vlan_mac_del; in bnx2x_init_vlan_mac_obj()
2278 vlan_mac_obj->check_add = bnx2x_check_vlan_mac_add; in bnx2x_init_vlan_mac_obj()
2279 vlan_mac_obj->check_move = bnx2x_check_move; in bnx2x_init_vlan_mac_obj()
2280 vlan_mac_obj->ramrod_cmd = in bnx2x_init_vlan_mac_obj()
2285 &vlan_mac_obj->exe_queue, in bnx2x_init_vlan_mac_obj()
2310 /* update the bp MAC filter structure */ in bnx2x_set_rx_mode_e1x()
2311 u32 mask = (1 << p->cl_id); in bnx2x_set_rx_mode_e1x()
2314 (struct tstorm_eth_mac_filter_config *)p->rdata; in bnx2x_set_rx_mode_e1x()
2316 /* initial setting is drop-all */ in bnx2x_set_rx_mode_e1x()
2323 if (test_bit(BNX2X_ACCEPT_UNICAST, &p->rx_accept_flags)) in bnx2x_set_rx_mode_e1x()
2327 if (test_bit(BNX2X_ACCEPT_MULTICAST, &p->rx_accept_flags)) in bnx2x_set_rx_mode_e1x()
2331 if (test_bit(BNX2X_ACCEPT_ALL_UNICAST, &p->rx_accept_flags)) { in bnx2x_set_rx_mode_e1x()
2336 if (test_bit(BNX2X_ACCEPT_ALL_MULTICAST, &p->rx_accept_flags)) { in bnx2x_set_rx_mode_e1x()
2341 if (test_bit(BNX2X_ACCEPT_BROADCAST, &p->rx_accept_flags)) in bnx2x_set_rx_mode_e1x()
2344 if (test_bit(BNX2X_ACCEPT_UNMATCHED, &p->rx_accept_flags)) in bnx2x_set_rx_mode_e1x()
2348 mac_filters->ucast_drop_all = drop_all_ucast ? in bnx2x_set_rx_mode_e1x()
2349 mac_filters->ucast_drop_all | mask : in bnx2x_set_rx_mode_e1x()
2350 mac_filters->ucast_drop_all & ~mask; in bnx2x_set_rx_mode_e1x()
2352 mac_filters->mcast_drop_all = drop_all_mcast ? in bnx2x_set_rx_mode_e1x()
2353 mac_filters->mcast_drop_all | mask : in bnx2x_set_rx_mode_e1x()
2354 mac_filters->mcast_drop_all & ~mask; in bnx2x_set_rx_mode_e1x()
2356 mac_filters->ucast_accept_all = accp_all_ucast ? in bnx2x_set_rx_mode_e1x()
2357 mac_filters->ucast_accept_all | mask : in bnx2x_set_rx_mode_e1x()
2358 mac_filters->ucast_accept_all & ~mask; in bnx2x_set_rx_mode_e1x()
2360 mac_filters->mcast_accept_all = accp_all_mcast ? in bnx2x_set_rx_mode_e1x()
2361 mac_filters->mcast_accept_all | mask : in bnx2x_set_rx_mode_e1x()
2362 mac_filters->mcast_accept_all & ~mask; in bnx2x_set_rx_mode_e1x()
2364 mac_filters->bcast_accept_all = accp_all_bcast ? in bnx2x_set_rx_mode_e1x()
2365 mac_filters->bcast_accept_all | mask : in bnx2x_set_rx_mode_e1x()
2366 mac_filters->bcast_accept_all & ~mask; in bnx2x_set_rx_mode_e1x()
2368 mac_filters->unmatched_unicast = unmatched_unicast ? in bnx2x_set_rx_mode_e1x()
2369 mac_filters->unmatched_unicast | mask : in bnx2x_set_rx_mode_e1x()
2370 mac_filters->unmatched_unicast & ~mask; in bnx2x_set_rx_mode_e1x()
2374 mac_filters->ucast_drop_all, mac_filters->mcast_drop_all, in bnx2x_set_rx_mode_e1x()
2375 mac_filters->ucast_accept_all, mac_filters->mcast_accept_all, in bnx2x_set_rx_mode_e1x()
2376 mac_filters->bcast_accept_all); in bnx2x_set_rx_mode_e1x()
2378 /* write the MAC filter structure*/ in bnx2x_set_rx_mode_e1x()
2379 __storm_memset_mac_filters(bp, mac_filters, p->func_id); in bnx2x_set_rx_mode_e1x()
2382 clear_bit(p->state, p->pstate); in bnx2x_set_rx_mode_e1x()
2393 hdr->echo = cpu_to_le32(cid); in bnx2x_rx_mode_set_rdata_hdr_e2()
2394 hdr->rule_cnt = rule_cnt; in bnx2x_rx_mode_set_rdata_hdr_e2()
2404 /* start with 'drop-all' */ in bnx2x_rx_mode_set_cmd_state_e2()
2443 cmd->state = cpu_to_le16(state); in bnx2x_rx_mode_set_cmd_state_e2()
2449 struct eth_filter_rules_ramrod_data *data = p->rdata; in bnx2x_set_rx_mode_e2()
2459 if (test_bit(RAMROD_TX, &p->ramrod_flags)) { in bnx2x_set_rx_mode_e2()
2460 data->rules[rule_idx].client_id = p->cl_id; in bnx2x_set_rx_mode_e2()
2461 data->rules[rule_idx].func_id = p->func_id; in bnx2x_set_rx_mode_e2()
2463 data->rules[rule_idx].cmd_general_data = in bnx2x_set_rx_mode_e2()
2466 bnx2x_rx_mode_set_cmd_state_e2(bp, &p->tx_accept_flags, in bnx2x_set_rx_mode_e2()
2467 &(data->rules[rule_idx++]), in bnx2x_set_rx_mode_e2()
2472 if (test_bit(RAMROD_RX, &p->ramrod_flags)) { in bnx2x_set_rx_mode_e2()
2473 data->rules[rule_idx].client_id = p->cl_id; in bnx2x_set_rx_mode_e2()
2474 data->rules[rule_idx].func_id = p->func_id; in bnx2x_set_rx_mode_e2()
2476 data->rules[rule_idx].cmd_general_data = in bnx2x_set_rx_mode_e2()
2479 bnx2x_rx_mode_set_cmd_state_e2(bp, &p->rx_accept_flags, in bnx2x_set_rx_mode_e2()
2480 &(data->rules[rule_idx++]), in bnx2x_set_rx_mode_e2()
2490 if (test_bit(BNX2X_RX_MODE_FCOE_ETH, &p->rx_mode_flags)) { in bnx2x_set_rx_mode_e2()
2492 if (test_bit(RAMROD_TX, &p->ramrod_flags)) { in bnx2x_set_rx_mode_e2()
2493 data->rules[rule_idx].client_id = bnx2x_fcoe(bp, cl_id); in bnx2x_set_rx_mode_e2()
2494 data->rules[rule_idx].func_id = p->func_id; in bnx2x_set_rx_mode_e2()
2496 data->rules[rule_idx].cmd_general_data = in bnx2x_set_rx_mode_e2()
2499 bnx2x_rx_mode_set_cmd_state_e2(bp, &p->tx_accept_flags, in bnx2x_set_rx_mode_e2()
2500 &(data->rules[rule_idx]), in bnx2x_set_rx_mode_e2()
2506 if (test_bit(RAMROD_RX, &p->ramrod_flags)) { in bnx2x_set_rx_mode_e2()
2507 data->rules[rule_idx].client_id = bnx2x_fcoe(bp, cl_id); in bnx2x_set_rx_mode_e2()
2508 data->rules[rule_idx].func_id = p->func_id; in bnx2x_set_rx_mode_e2()
2510 data->rules[rule_idx].cmd_general_data = in bnx2x_set_rx_mode_e2()
2513 bnx2x_rx_mode_set_cmd_state_e2(bp, &p->rx_accept_flags, in bnx2x_set_rx_mode_e2()
2514 &(data->rules[rule_idx]), in bnx2x_set_rx_mode_e2()
2520 /* Set the ramrod header (most importantly - number of rules to in bnx2x_set_rx_mode_e2()
2523 bnx2x_rx_mode_set_rdata_hdr_e2(p->cid, &data->header, rule_idx); in bnx2x_set_rx_mode_e2()
2526 data->header.rule_cnt, p->rx_accept_flags, in bnx2x_set_rx_mode_e2()
2527 p->tx_accept_flags); in bnx2x_set_rx_mode_e2()
2537 rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_FILTER_RULES, p->cid, in bnx2x_set_rx_mode_e2()
2538 U64_HI(p->rdata_mapping), in bnx2x_set_rx_mode_e2()
2539 U64_LO(p->rdata_mapping), in bnx2x_set_rx_mode_e2()
2551 return bnx2x_state_wait(bp, p->state, p->pstate); in bnx2x_wait_rx_mode_comp_e2()
2567 rc = p->rx_mode_obj->config_rx_mode(bp, p); in bnx2x_config_rx_mode()
2572 if (test_bit(RAMROD_COMP_WAIT, &p->ramrod_flags)) { in bnx2x_config_rx_mode()
2573 rc = p->rx_mode_obj->wait_comp(bp, p); in bnx2x_config_rx_mode()
2585 o->wait_comp = bnx2x_empty_rx_mode_wait; in bnx2x_init_rx_mode_obj()
2586 o->config_rx_mode = bnx2x_set_rx_mode_e1x; in bnx2x_init_rx_mode_obj()
2588 o->wait_comp = bnx2x_wait_rx_mode_comp_e2; in bnx2x_init_rx_mode_obj()
2589 o->config_rx_mode = bnx2x_set_rx_mode_e2; in bnx2x_init_rx_mode_obj()
2594 static inline u8 bnx2x_mcast_bin_from_mac(u8 *mac) in bnx2x_mcast_bin_from_mac() argument
2596 return (crc32c_le(0, mac, ETH_ALEN) >> 24) & 0xff; in bnx2x_mcast_bin_from_mac()
2601 u8 mac[ETH_ALEN]; member
2622 ((PAGE_SIZE - sizeof(struct bnx2x_mcast_elem_group)) / \
2651 if (bnx2x_state_wait(bp, o->sched_state, o->raw.pstate) || in bnx2x_mcast_wait()
2652 o->raw.wait_comp(bp, &o->raw)) in bnx2x_mcast_wait()
2653 return -EBUSY; in bnx2x_mcast_wait()
2666 list_del(¤t_mcast_group->mcast_group_link); in bnx2x_free_groups()
2684 macs_list_len = p->mcast_list_len; in bnx2x_mcast_enqueue_cmd()
2687 if (!p->mcast_list_len) in bnx2x_mcast_enqueue_cmd()
2693 return -ENOMEM; in bnx2x_mcast_enqueue_cmd()
2695 INIT_LIST_HEAD(&new_cmd->data.macs_head); in bnx2x_mcast_enqueue_cmd()
2696 INIT_LIST_HEAD(&new_cmd->group_head); in bnx2x_mcast_enqueue_cmd()
2697 new_cmd->type = cmd; in bnx2x_mcast_enqueue_cmd()
2698 new_cmd->done = false; in bnx2x_mcast_enqueue_cmd()
2719 bnx2x_free_groups(&new_cmd->group_head); in bnx2x_mcast_enqueue_cmd()
2721 return -ENOMEM; in bnx2x_mcast_enqueue_cmd()
2723 total_elems -= MCAST_MAC_ELEMS_PER_PG; in bnx2x_mcast_enqueue_cmd()
2724 list_add_tail(&elem_group->mcast_group_link, in bnx2x_mcast_enqueue_cmd()
2725 &new_cmd->group_head); in bnx2x_mcast_enqueue_cmd()
2727 elem_group = list_first_entry(&new_cmd->group_head, in bnx2x_mcast_enqueue_cmd()
2730 list_for_each_entry(pos, &p->mcast_list, link) { in bnx2x_mcast_enqueue_cmd()
2731 mac_elem = &elem_group->mcast_elems[offset].mac_elem; in bnx2x_mcast_enqueue_cmd()
2732 memcpy(mac_elem->mac, pos->mac, ETH_ALEN); in bnx2x_mcast_enqueue_cmd()
2736 list_add_tail(&mac_elem->link, in bnx2x_mcast_enqueue_cmd()
2737 &new_cmd->data.macs_head); in bnx2x_mcast_enqueue_cmd()
2748 new_cmd->data.macs_num = p->mcast_list_len; in bnx2x_mcast_enqueue_cmd()
2752 new_cmd->data.next_bin = 0; in bnx2x_mcast_enqueue_cmd()
2758 return -EINVAL; in bnx2x_mcast_enqueue_cmd()
2762 list_add_tail(&new_cmd->link, &o->pending_cmds_head); in bnx2x_mcast_enqueue_cmd()
2764 o->set_sched(o); in bnx2x_mcast_enqueue_cmd()
2770 * bnx2x_mcast_get_next_bin - get the next set bin (index)
2782 if (o->registry.aprox_match.vec[i]) in bnx2x_mcast_get_next_bin()
2785 if (BIT_VEC64_TEST_BIT(o->registry.aprox_match. in bnx2x_mcast_get_next_bin()
2794 return -1; in bnx2x_mcast_get_next_bin()
2798 * bnx2x_mcast_clear_first_bin - find the first set bin and clear it
2802 * returns the index of the found bin or -1 if none is found
2809 BIT_VEC64_CLEAR_BIT(o->registry.aprox_match.vec, cur_bit); in bnx2x_mcast_clear_first_bin()
2816 struct bnx2x_raw_obj *raw = &o->raw; in bnx2x_mcast_get_rx_tx_flag()
2819 if ((raw->obj_type == BNX2X_OBJ_TYPE_TX) || in bnx2x_mcast_get_rx_tx_flag()
2820 (raw->obj_type == BNX2X_OBJ_TYPE_RX_TX)) in bnx2x_mcast_get_rx_tx_flag()
2823 if ((raw->obj_type == BNX2X_OBJ_TYPE_RX) || in bnx2x_mcast_get_rx_tx_flag()
2824 (raw->obj_type == BNX2X_OBJ_TYPE_RX_TX)) in bnx2x_mcast_get_rx_tx_flag()
2835 struct bnx2x_raw_obj *r = &o->raw; in bnx2x_mcast_set_one_rule_e2()
2837 (struct eth_multicast_rules_ramrod_data *)(r->rdata); in bnx2x_mcast_set_one_rule_e2()
2838 u8 func_id = r->func_id; in bnx2x_mcast_set_one_rule_e2()
2846 data->rules[idx].cmd_general_data |= rx_tx_add_flag; in bnx2x_mcast_set_one_rule_e2()
2851 bin = bnx2x_mcast_bin_from_mac(cfg_data->mac); in bnx2x_mcast_set_one_rule_e2()
2852 BIT_VEC64_SET_BIT(o->registry.aprox_match.vec, bin); in bnx2x_mcast_set_one_rule_e2()
2857 * (bnx2x_mcast_clear_first_bin() returns -1) then we would in bnx2x_mcast_set_one_rule_e2()
2866 bin = cfg_data->bin; in bnx2x_mcast_set_one_rule_e2()
2870 bin = cfg_data->bin; in bnx2x_mcast_set_one_rule_e2()
2871 BIT_VEC64_SET_BIT(o->registry.aprox_match.vec, bin); in bnx2x_mcast_set_one_rule_e2()
2875 bin = cfg_data->bin; in bnx2x_mcast_set_one_rule_e2()
2876 BIT_VEC64_CLEAR_BIT(o->registry.aprox_match.vec, bin); in bnx2x_mcast_set_one_rule_e2()
2888 data->rules[idx].bin_id = (u8)bin; in bnx2x_mcast_set_one_rule_e2()
2889 data->rules[idx].func_id = func_id; in bnx2x_mcast_set_one_rule_e2()
2890 data->rules[idx].engine_id = o->engine_id; in bnx2x_mcast_set_one_rule_e2()
2894 * bnx2x_mcast_handle_restore_cmd_e2 - restore configuration from the registry
2901 * returns last handled bin index or -1 if all bins have been handled
2915 o->set_one_rule(bp, o, cnt, &cfg_data, in bnx2x_mcast_handle_restore_cmd_e2()
2925 if (cnt >= o->max_cmd_len) in bnx2x_mcast_handle_restore_cmd_e2()
2942 list_for_each_entry_safe(pmac_pos, pmac_pos_n, &cmd_pos->data.macs_head, in bnx2x_mcast_hdl_pending_add_e2()
2945 cfg_data.mac = &pmac_pos->mac[0]; in bnx2x_mcast_hdl_pending_add_e2()
2946 o->set_one_rule(bp, o, cnt, &cfg_data, cmd_pos->type); in bnx2x_mcast_hdl_pending_add_e2()
2950 DP(BNX2X_MSG_SP, "About to configure %pM mcast MAC\n", in bnx2x_mcast_hdl_pending_add_e2()
2951 pmac_pos->mac); in bnx2x_mcast_hdl_pending_add_e2()
2953 list_del(&pmac_pos->link); in bnx2x_mcast_hdl_pending_add_e2()
2958 if (cnt >= o->max_cmd_len) in bnx2x_mcast_hdl_pending_add_e2()
2964 /* if no more MACs to configure - we are done */ in bnx2x_mcast_hdl_pending_add_e2()
2965 if (list_empty(&cmd_pos->data.macs_head)) in bnx2x_mcast_hdl_pending_add_e2()
2966 cmd_pos->done = true; in bnx2x_mcast_hdl_pending_add_e2()
2975 while (cmd_pos->data.macs_num) { in bnx2x_mcast_hdl_pending_del_e2()
2976 o->set_one_rule(bp, o, cnt, NULL, cmd_pos->type); in bnx2x_mcast_hdl_pending_del_e2()
2980 cmd_pos->data.macs_num--; in bnx2x_mcast_hdl_pending_del_e2()
2982 DP(BNX2X_MSG_SP, "Deleting MAC. %d left,cnt is %d\n", in bnx2x_mcast_hdl_pending_del_e2()
2983 cmd_pos->data.macs_num, cnt); in bnx2x_mcast_hdl_pending_del_e2()
2988 if (cnt >= o->max_cmd_len) in bnx2x_mcast_hdl_pending_del_e2()
2994 /* If we cleared all bins - we are done */ in bnx2x_mcast_hdl_pending_del_e2()
2995 if (!cmd_pos->data.macs_num) in bnx2x_mcast_hdl_pending_del_e2()
2996 cmd_pos->done = true; in bnx2x_mcast_hdl_pending_del_e2()
3003 cmd_pos->data.next_bin = o->hdl_restore(bp, o, cmd_pos->data.next_bin, in bnx2x_mcast_hdl_pending_restore_e2()
3006 if (cmd_pos->data.next_bin < 0) in bnx2x_mcast_hdl_pending_restore_e2()
3007 /* If o->set_restore returned -1 we are done */ in bnx2x_mcast_hdl_pending_restore_e2()
3008 cmd_pos->done = true; in bnx2x_mcast_hdl_pending_restore_e2()
3011 cmd_pos->data.next_bin++; in bnx2x_mcast_hdl_pending_restore_e2()
3026 memcpy(cur, o->registry.aprox_match.vec, in bnx2x_mcast_hdl_pending_set_e2_convert()
3030 list_for_each_entry_safe(pmac_pos, pmac_pos_n, &cmd_pos->data.macs_head, in bnx2x_mcast_hdl_pending_set_e2_convert()
3032 int bin = bnx2x_mcast_bin_from_mac(pmac_pos->mac); in bnx2x_mcast_hdl_pending_set_e2_convert()
3034 DP(BNX2X_MSG_SP, "Set contains %pM mcast MAC\n", in bnx2x_mcast_hdl_pending_set_e2_convert()
3035 pmac_pos->mac); in bnx2x_mcast_hdl_pending_set_e2_convert()
3038 list_del(&pmac_pos->link); in bnx2x_mcast_hdl_pending_set_e2_convert()
3042 /* We no longer have use for the MACs; Need to re-use memory for in bnx2x_mcast_hdl_pending_set_e2_convert()
3045 cmd_pos->set_convert = true; in bnx2x_mcast_hdl_pending_set_e2_convert()
3046 INIT_LIST_HEAD(&cmd_pos->data.macs_head); in bnx2x_mcast_hdl_pending_set_e2_convert()
3047 elem_group = list_first_entry(&cmd_pos->group_head, in bnx2x_mcast_hdl_pending_set_e2_convert()
3057 p_item = &elem_group->mcast_elems[offset].bin_elem; in bnx2x_mcast_hdl_pending_set_e2_convert()
3058 p_item->bin = i; in bnx2x_mcast_hdl_pending_set_e2_convert()
3059 p_item->type = b_required ? BNX2X_MCAST_CMD_SET_ADD in bnx2x_mcast_hdl_pending_set_e2_convert()
3061 list_add_tail(&p_item->link , &cmd_pos->data.macs_head); in bnx2x_mcast_hdl_pending_set_e2_convert()
3075 o->total_pending_num -= (o->max_cmd_len + mac_cnt); in bnx2x_mcast_hdl_pending_set_e2_convert()
3076 o->total_pending_num += cnt; in bnx2x_mcast_hdl_pending_set_e2_convert()
3078 DP(BNX2X_MSG_SP, "o->total_pending_num=%d\n", o->total_pending_num); in bnx2x_mcast_hdl_pending_set_e2_convert()
3090 /* This is actually a 2-part scheme - it starts by converting the MACs in bnx2x_mcast_hdl_pending_set_e2()
3097 if (!cmd_pos->set_convert) in bnx2x_mcast_hdl_pending_set_e2()
3100 list_for_each_entry_safe(p_item, p_item_n, &cmd_pos->data.macs_head, in bnx2x_mcast_hdl_pending_set_e2()
3102 cfg_data.bin = (u8)p_item->bin; in bnx2x_mcast_hdl_pending_set_e2()
3103 o->set_one_rule(bp, o, *cnt, &cfg_data, p_item->type); in bnx2x_mcast_hdl_pending_set_e2()
3106 list_del(&p_item->link); in bnx2x_mcast_hdl_pending_set_e2()
3109 if (*cnt >= o->max_cmd_len) in bnx2x_mcast_hdl_pending_set_e2()
3113 /* if no more MACs to configure - we are done */ in bnx2x_mcast_hdl_pending_set_e2()
3114 if (list_empty(&cmd_pos->data.macs_head)) in bnx2x_mcast_hdl_pending_set_e2()
3115 cmd_pos->done = true; in bnx2x_mcast_hdl_pending_set_e2()
3123 struct bnx2x_mcast_obj *o = p->mcast_obj; in bnx2x_mcast_handle_pending_cmds_e2()
3125 list_for_each_entry_safe(cmd_pos, cmd_pos_n, &o->pending_cmds_head, in bnx2x_mcast_handle_pending_cmds_e2()
3127 switch (cmd_pos->type) { in bnx2x_mcast_handle_pending_cmds_e2()
3146 BNX2X_ERR("Unknown command: %d\n", cmd_pos->type); in bnx2x_mcast_handle_pending_cmds_e2()
3147 return -EINVAL; in bnx2x_mcast_handle_pending_cmds_e2()
3150 /* If the command has been completed - remove it from the list in bnx2x_mcast_handle_pending_cmds_e2()
3153 if (cmd_pos->done) { in bnx2x_mcast_handle_pending_cmds_e2()
3154 list_del(&cmd_pos->link); in bnx2x_mcast_handle_pending_cmds_e2()
3155 bnx2x_free_groups(&cmd_pos->group_head); in bnx2x_mcast_handle_pending_cmds_e2()
3160 if (cnt >= o->max_cmd_len) in bnx2x_mcast_handle_pending_cmds_e2()
3175 list_for_each_entry(mlist_pos, &p->mcast_list, link) { in bnx2x_mcast_hdl_add()
3176 cfg_data.mac = mlist_pos->mac; in bnx2x_mcast_hdl_add()
3177 o->set_one_rule(bp, o, cnt, &cfg_data, BNX2X_MCAST_CMD_ADD); in bnx2x_mcast_hdl_add()
3181 DP(BNX2X_MSG_SP, "About to configure %pM mcast MAC\n", in bnx2x_mcast_hdl_add()
3182 mlist_pos->mac); in bnx2x_mcast_hdl_add()
3194 for (i = 0; i < p->mcast_list_len; i++) { in bnx2x_mcast_hdl_del()
3195 o->set_one_rule(bp, o, cnt, NULL, BNX2X_MCAST_CMD_DEL); in bnx2x_mcast_hdl_del()
3199 DP(BNX2X_MSG_SP, "Deleting MAC. %d left\n", in bnx2x_mcast_hdl_del()
3200 p->mcast_list_len - i - 1); in bnx2x_mcast_hdl_del()
3207 * bnx2x_mcast_handle_current_cmd - send command if room
3223 struct bnx2x_mcast_obj *o = p->mcast_obj; in bnx2x_mcast_handle_current_cmd()
3226 DP(BNX2X_MSG_SP, "p->mcast_list_len=%d\n", p->mcast_list_len); in bnx2x_mcast_handle_current_cmd()
3238 o->hdl_restore(bp, o, 0, &cnt); in bnx2x_mcast_handle_current_cmd()
3243 return -EINVAL; in bnx2x_mcast_handle_current_cmd()
3247 p->mcast_list_len = 0; in bnx2x_mcast_handle_current_cmd()
3256 struct bnx2x_mcast_obj *o = p->mcast_obj; in bnx2x_mcast_validate_e2()
3257 int reg_sz = o->get_registry_size(o); in bnx2x_mcast_validate_e2()
3262 o->set_registry_size(o, 0); in bnx2x_mcast_validate_e2()
3274 p->mcast_list_len = reg_sz; in bnx2x_mcast_validate_e2()
3283 o->set_registry_size(o, reg_sz + p->mcast_list_len); in bnx2x_mcast_validate_e2()
3295 o->set_registry_size(o, reg_sz + p->mcast_list_len); in bnx2x_mcast_validate_e2()
3296 o->total_pending_num += o->max_cmd_len; in bnx2x_mcast_validate_e2()
3301 return -EINVAL; in bnx2x_mcast_validate_e2()
3305 o->total_pending_num += p->mcast_list_len; in bnx2x_mcast_validate_e2()
3315 struct bnx2x_mcast_obj *o = p->mcast_obj; in bnx2x_mcast_revert_e2()
3317 o->set_registry_size(o, old_num_bins); in bnx2x_mcast_revert_e2()
3318 o->total_pending_num -= p->mcast_list_len; in bnx2x_mcast_revert_e2()
3321 o->total_pending_num -= o->max_cmd_len; in bnx2x_mcast_revert_e2()
3325 * bnx2x_mcast_set_rdata_hdr_e2 - sets a header values
3335 struct bnx2x_raw_obj *r = &p->mcast_obj->raw; in bnx2x_mcast_set_rdata_hdr_e2()
3337 (struct eth_multicast_rules_ramrod_data *)(r->rdata); in bnx2x_mcast_set_rdata_hdr_e2()
3339 data->header.echo = cpu_to_le32((r->cid & BNX2X_SWCID_MASK) | in bnx2x_mcast_set_rdata_hdr_e2()
3342 data->header.rule_cnt = len; in bnx2x_mcast_set_rdata_hdr_e2()
3346 * bnx2x_mcast_refresh_registry_e2 - recalculate the actual number of set bins
3363 elem = o->registry.aprox_match.vec[i]; in bnx2x_mcast_refresh_registry_e2()
3365 elem &= elem - 1; in bnx2x_mcast_refresh_registry_e2()
3368 o->set_registry_size(o, cnt); in bnx2x_mcast_refresh_registry_e2()
3377 struct bnx2x_raw_obj *raw = &p->mcast_obj->raw; in bnx2x_mcast_setup_e2()
3378 struct bnx2x_mcast_obj *o = p->mcast_obj; in bnx2x_mcast_setup_e2()
3380 (struct eth_multicast_rules_ramrod_data *)(raw->rdata); in bnx2x_mcast_setup_e2()
3388 /* If there are no more pending commands - clear SCHEDULED state */ in bnx2x_mcast_setup_e2()
3389 if (list_empty(&o->pending_cmds_head)) in bnx2x_mcast_setup_e2()
3390 o->clear_sched(o); in bnx2x_mcast_setup_e2()
3395 * to the pending commands and p->mcast_list_len would have been in bnx2x_mcast_setup_e2()
3398 if (p->mcast_list_len > 0) in bnx2x_mcast_setup_e2()
3401 /* We've pulled out some MACs - update the total number of in bnx2x_mcast_setup_e2()
3404 o->total_pending_num -= cnt; in bnx2x_mcast_setup_e2()
3407 WARN_ON(o->total_pending_num < 0); in bnx2x_mcast_setup_e2()
3408 WARN_ON(cnt > o->max_cmd_len); in bnx2x_mcast_setup_e2()
3421 * - see bnx2x_mcast_set_one_rule_e2(). That's because for 57712 we in bnx2x_mcast_setup_e2()
3423 * with a limited amount of update commands (per MAC/bin) and we don't in bnx2x_mcast_setup_e2()
3427 if (!o->total_pending_num) in bnx2x_mcast_setup_e2()
3430 /* If CLEAR_ONLY was requested - don't send a ramrod and clear in bnx2x_mcast_setup_e2()
3435 if (test_bit(RAMROD_DRV_CLR_ONLY, &p->ramrod_flags) || !cnt) { in bnx2x_mcast_setup_e2()
3436 raw->clear_pending(raw); in bnx2x_mcast_setup_e2()
3448 raw->cid, U64_HI(raw->rdata_mapping), in bnx2x_mcast_setup_e2()
3449 U64_LO(raw->rdata_mapping), in bnx2x_mcast_setup_e2()
3465 return -EINVAL; in bnx2x_mcast_validate_e1h()
3470 p->mcast_list_len = 1; in bnx2x_mcast_validate_e1h()
3496 list_for_each_entry(mlist_pos, &p->mcast_list, link) { in bnx2x_mcast_hdl_add_e1h()
3497 bit = bnx2x_mcast_bin_from_mac(mlist_pos->mac); in bnx2x_mcast_hdl_add_e1h()
3500 DP(BNX2X_MSG_SP, "About to configure %pM mcast MAC, bin %d\n", in bnx2x_mcast_hdl_add_e1h()
3501 mlist_pos->mac, bit); in bnx2x_mcast_hdl_add_e1h()
3504 BIT_VEC64_SET_BIT(o->registry.aprox_match.vec, in bnx2x_mcast_hdl_add_e1h()
3532 struct bnx2x_mcast_obj *o = p->mcast_obj; in bnx2x_mcast_setup_e1h()
3533 struct bnx2x_raw_obj *r = &o->raw; in bnx2x_mcast_setup_e1h()
3535 /* If CLEAR_ONLY has been requested - clear the registry in bnx2x_mcast_setup_e1h()
3538 if (!test_bit(RAMROD_DRV_CLR_ONLY, &p->ramrod_flags)) { in bnx2x_mcast_setup_e1h()
3554 memset(o->registry.aprox_match.vec, 0, in bnx2x_mcast_setup_e1h()
3555 sizeof(o->registry.aprox_match.vec)); in bnx2x_mcast_setup_e1h()
3564 return -EINVAL; in bnx2x_mcast_setup_e1h()
3572 memset(o->registry.aprox_match.vec, 0, in bnx2x_mcast_setup_e1h()
3573 sizeof(o->registry.aprox_match.vec)); in bnx2x_mcast_setup_e1h()
3576 r->clear_pending(r); in bnx2x_mcast_setup_e1h()
3585 struct bnx2x_mcast_obj *o = p->mcast_obj; in bnx2x_mcast_validate_e1()
3586 int reg_sz = o->get_registry_size(o); in bnx2x_mcast_validate_e1()
3590 return -EINVAL; in bnx2x_mcast_validate_e1()
3596 o->set_registry_size(o, 0); in bnx2x_mcast_validate_e1()
3601 p->mcast_list_len = reg_sz; in bnx2x_mcast_validate_e1()
3602 DP(BNX2X_MSG_SP, "Command %d, p->mcast_list_len=%d\n", in bnx2x_mcast_validate_e1()
3603 cmd, p->mcast_list_len); in bnx2x_mcast_validate_e1()
3612 if (p->mcast_list_len > o->max_cmd_len) { in bnx2x_mcast_validate_e1()
3614 o->max_cmd_len); in bnx2x_mcast_validate_e1()
3615 return -EINVAL; in bnx2x_mcast_validate_e1()
3617 /* Every configured MAC should be cleared if DEL command is in bnx2x_mcast_validate_e1()
3621 DP(BNX2X_MSG_SP, "p->mcast_list_len=%d\n", p->mcast_list_len); in bnx2x_mcast_validate_e1()
3622 if (p->mcast_list_len > 0) in bnx2x_mcast_validate_e1()
3623 o->set_registry_size(o, p->mcast_list_len); in bnx2x_mcast_validate_e1()
3629 return -EINVAL; in bnx2x_mcast_validate_e1()
3633 * Therefore each none-empty command will consume o->max_cmd_len. in bnx2x_mcast_validate_e1()
3635 if (p->mcast_list_len) in bnx2x_mcast_validate_e1()
3636 o->total_pending_num += o->max_cmd_len; in bnx2x_mcast_validate_e1()
3646 struct bnx2x_mcast_obj *o = p->mcast_obj; in bnx2x_mcast_revert_e1()
3648 o->set_registry_size(o, old_num_macs); in bnx2x_mcast_revert_e1()
3654 if (p->mcast_list_len) in bnx2x_mcast_revert_e1()
3655 o->total_pending_num -= o->max_cmd_len; in bnx2x_mcast_revert_e1()
3663 struct bnx2x_raw_obj *r = &o->raw; in bnx2x_mcast_set_one_rule_e1()
3665 (struct mac_configuration_cmd *)(r->rdata); in bnx2x_mcast_set_one_rule_e1()
3667 /* copy mac */ in bnx2x_mcast_set_one_rule_e1()
3669 bnx2x_set_fw_mac_addr(&data->config_table[idx].msb_mac_addr, in bnx2x_mcast_set_one_rule_e1()
3670 &data->config_table[idx].middle_mac_addr, in bnx2x_mcast_set_one_rule_e1()
3671 &data->config_table[idx].lsb_mac_addr, in bnx2x_mcast_set_one_rule_e1()
3672 cfg_data->mac); in bnx2x_mcast_set_one_rule_e1()
3674 data->config_table[idx].vlan_id = 0; in bnx2x_mcast_set_one_rule_e1()
3675 data->config_table[idx].pf_id = r->func_id; in bnx2x_mcast_set_one_rule_e1()
3676 data->config_table[idx].clients_bit_vector = in bnx2x_mcast_set_one_rule_e1()
3677 cpu_to_le32(1 << r->cl_id); in bnx2x_mcast_set_one_rule_e1()
3679 SET_FLAG(data->config_table[idx].flags, in bnx2x_mcast_set_one_rule_e1()
3686 * bnx2x_mcast_set_rdata_hdr_e1 - set header values in mac_configuration_cmd
3696 struct bnx2x_raw_obj *r = &p->mcast_obj->raw; in bnx2x_mcast_set_rdata_hdr_e1()
3698 (struct mac_configuration_cmd *)(r->rdata); in bnx2x_mcast_set_rdata_hdr_e1()
3701 BNX2X_MAX_EMUL_MULTI*(1 + r->func_id) : in bnx2x_mcast_set_rdata_hdr_e1()
3702 BNX2X_MAX_MULTICAST*(1 + r->func_id)); in bnx2x_mcast_set_rdata_hdr_e1()
3704 data->hdr.offset = offset; in bnx2x_mcast_set_rdata_hdr_e1()
3705 data->hdr.client_id = cpu_to_le16(0xff); in bnx2x_mcast_set_rdata_hdr_e1()
3706 data->hdr.echo = cpu_to_le32((r->cid & BNX2X_SWCID_MASK) | in bnx2x_mcast_set_rdata_hdr_e1()
3709 data->hdr.length = len; in bnx2x_mcast_set_rdata_hdr_e1()
3713 * bnx2x_mcast_handle_restore_cmd_e1 - restore command for 57710
3720 * restore command for 57710 is like all other commands - always a stand alone
3721 * command - start_idx and rdata_idx will always be 0. This function will always
3723 * returns -1 to comply with 57712 variant.
3734 list_for_each_entry(elem, &o->registry.exact_match.macs, link) { in bnx2x_mcast_handle_restore_cmd_e1()
3735 cfg_data.mac = &elem->mac[0]; in bnx2x_mcast_handle_restore_cmd_e1()
3736 o->set_one_rule(bp, o, i, &cfg_data, BNX2X_MCAST_CMD_RESTORE); in bnx2x_mcast_handle_restore_cmd_e1()
3740 DP(BNX2X_MSG_SP, "About to configure %pM mcast MAC\n", in bnx2x_mcast_handle_restore_cmd_e1()
3741 cfg_data.mac); in bnx2x_mcast_handle_restore_cmd_e1()
3746 return -1; in bnx2x_mcast_handle_restore_cmd_e1()
3754 struct bnx2x_mcast_obj *o = p->mcast_obj; in bnx2x_mcast_handle_pending_cmds_e1()
3758 /* If nothing to be done - return */ in bnx2x_mcast_handle_pending_cmds_e1()
3759 if (list_empty(&o->pending_cmds_head)) in bnx2x_mcast_handle_pending_cmds_e1()
3763 cmd_pos = list_first_entry(&o->pending_cmds_head, in bnx2x_mcast_handle_pending_cmds_e1()
3766 switch (cmd_pos->type) { in bnx2x_mcast_handle_pending_cmds_e1()
3768 list_for_each_entry(pmac_pos, &cmd_pos->data.macs_head, link) { in bnx2x_mcast_handle_pending_cmds_e1()
3769 cfg_data.mac = &pmac_pos->mac[0]; in bnx2x_mcast_handle_pending_cmds_e1()
3770 o->set_one_rule(bp, o, cnt, &cfg_data, cmd_pos->type); in bnx2x_mcast_handle_pending_cmds_e1()
3774 DP(BNX2X_MSG_SP, "About to configure %pM mcast MAC\n", in bnx2x_mcast_handle_pending_cmds_e1()
3775 pmac_pos->mac); in bnx2x_mcast_handle_pending_cmds_e1()
3780 cnt = cmd_pos->data.macs_num; in bnx2x_mcast_handle_pending_cmds_e1()
3785 o->hdl_restore(bp, o, 0, &cnt); in bnx2x_mcast_handle_pending_cmds_e1()
3789 BNX2X_ERR("Unknown command: %d\n", cmd_pos->type); in bnx2x_mcast_handle_pending_cmds_e1()
3790 return -EINVAL; in bnx2x_mcast_handle_pending_cmds_e1()
3793 list_del(&cmd_pos->link); in bnx2x_mcast_handle_pending_cmds_e1()
3794 bnx2x_free_groups(&cmd_pos->group_head); in bnx2x_mcast_handle_pending_cmds_e1()
3801 * bnx2x_get_fw_mac_addr - revert the bnx2x_set_fw_mac_addr().
3806 * @mac: mac address
3809 __le16 *fw_lo, u8 *mac) in bnx2x_get_fw_mac_addr() argument
3811 mac[1] = ((u8 *)fw_hi)[0]; in bnx2x_get_fw_mac_addr()
3812 mac[0] = ((u8 *)fw_hi)[1]; in bnx2x_get_fw_mac_addr()
3813 mac[3] = ((u8 *)fw_mid)[0]; in bnx2x_get_fw_mac_addr()
3814 mac[2] = ((u8 *)fw_mid)[1]; in bnx2x_get_fw_mac_addr()
3815 mac[5] = ((u8 *)fw_lo)[0]; in bnx2x_get_fw_mac_addr()
3816 mac[4] = ((u8 *)fw_lo)[1]; in bnx2x_get_fw_mac_addr()
3820 * bnx2x_mcast_refresh_registry_e1 -
3826 * and update the registry correspondingly: if ADD - allocate a memory and add
3827 * the entries to the registry (list), if DELETE - clear the registry and free
3833 struct bnx2x_raw_obj *raw = &o->raw; in bnx2x_mcast_refresh_registry_e1()
3836 (struct mac_configuration_cmd *)(raw->rdata); in bnx2x_mcast_refresh_registry_e1()
3838 /* If first entry contains a SET bit - the command was ADD, in bnx2x_mcast_refresh_registry_e1()
3839 * otherwise - DEL_ALL in bnx2x_mcast_refresh_registry_e1()
3841 if (GET_FLAG(data->config_table[0].flags, in bnx2x_mcast_refresh_registry_e1()
3843 int i, len = data->hdr.length; in bnx2x_mcast_refresh_registry_e1()
3846 if (!list_empty(&o->registry.exact_match.macs)) in bnx2x_mcast_refresh_registry_e1()
3852 return -ENOMEM; in bnx2x_mcast_refresh_registry_e1()
3857 &data->config_table[i].msb_mac_addr, in bnx2x_mcast_refresh_registry_e1()
3858 &data->config_table[i].middle_mac_addr, in bnx2x_mcast_refresh_registry_e1()
3859 &data->config_table[i].lsb_mac_addr, in bnx2x_mcast_refresh_registry_e1()
3860 elem->mac); in bnx2x_mcast_refresh_registry_e1()
3862 elem->mac); in bnx2x_mcast_refresh_registry_e1()
3863 list_add_tail(&elem->link, in bnx2x_mcast_refresh_registry_e1()
3864 &o->registry.exact_match.macs); in bnx2x_mcast_refresh_registry_e1()
3867 elem = list_first_entry(&o->registry.exact_match.macs, in bnx2x_mcast_refresh_registry_e1()
3871 INIT_LIST_HEAD(&o->registry.exact_match.macs); in bnx2x_mcast_refresh_registry_e1()
3881 struct bnx2x_mcast_obj *o = p->mcast_obj; in bnx2x_mcast_setup_e1()
3882 struct bnx2x_raw_obj *raw = &o->raw; in bnx2x_mcast_setup_e1()
3884 (struct mac_configuration_cmd *)(raw->rdata); in bnx2x_mcast_setup_e1()
3891 for (i = 0; i < o->max_cmd_len ; i++) in bnx2x_mcast_setup_e1()
3892 SET_FLAG(data->config_table[i].flags, in bnx2x_mcast_setup_e1()
3899 /* If there are no more pending commands - clear SCHEDULED state */ in bnx2x_mcast_setup_e1()
3900 if (list_empty(&o->pending_cmds_head)) in bnx2x_mcast_setup_e1()
3901 o->clear_sched(o); in bnx2x_mcast_setup_e1()
3907 /* For 57710 every command has o->max_cmd_len length to ensure that in bnx2x_mcast_setup_e1()
3910 o->total_pending_num -= o->max_cmd_len; in bnx2x_mcast_setup_e1()
3914 WARN_ON(cnt > o->max_cmd_len); in bnx2x_mcast_setup_e1()
3929 /* If CLEAR_ONLY was requested - don't send a ramrod and clear in bnx2x_mcast_setup_e1()
3932 if (test_bit(RAMROD_DRV_CLR_ONLY, &p->ramrod_flags)) { in bnx2x_mcast_setup_e1()
3933 raw->clear_pending(raw); in bnx2x_mcast_setup_e1()
3944 rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_SET_MAC, raw->cid, in bnx2x_mcast_setup_e1()
3945 U64_HI(raw->rdata_mapping), in bnx2x_mcast_setup_e1()
3946 U64_LO(raw->rdata_mapping), in bnx2x_mcast_setup_e1()
3958 return o->registry.exact_match.num_macs_set; in bnx2x_mcast_get_registry_size_exact()
3963 return o->registry.aprox_match.num_bins_set; in bnx2x_mcast_get_registry_size_aprox()
3969 o->registry.exact_match.num_macs_set = n; in bnx2x_mcast_set_registry_size_exact()
3975 o->registry.aprox_match.num_bins_set = n; in bnx2x_mcast_set_registry_size_aprox()
3982 struct bnx2x_mcast_obj *o = p->mcast_obj; in bnx2x_config_mcast()
3983 struct bnx2x_raw_obj *r = &o->raw; in bnx2x_config_mcast()
3989 old_reg_size = o->get_registry_size(o); in bnx2x_config_mcast()
3992 rc = o->validate(bp, p, cmd); in bnx2x_config_mcast()
3997 if ((!p->mcast_list_len) && (!o->check_sched(o))) in bnx2x_config_mcast()
4000 DP(BNX2X_MSG_SP, "o->total_pending_num=%d p->mcast_list_len=%d o->max_cmd_len=%d\n", in bnx2x_config_mcast()
4001 o->total_pending_num, p->mcast_list_len, o->max_cmd_len); in bnx2x_config_mcast()
4006 if (r->check_pending(r) || in bnx2x_config_mcast()
4007 ((o->max_cmd_len > 0) && (o->total_pending_num > o->max_cmd_len))) { in bnx2x_config_mcast()
4008 rc = o->enqueue_cmd(bp, p->mcast_obj, p, cmd); in bnx2x_config_mcast()
4015 p->mcast_list_len = 0; in bnx2x_config_mcast()
4018 if (!r->check_pending(r)) { in bnx2x_config_mcast()
4021 r->set_pending(r); in bnx2x_config_mcast()
4024 rc = o->config_mcast(bp, p, cmd); in bnx2x_config_mcast()
4029 if (test_bit(RAMROD_COMP_WAIT, &p->ramrod_flags)) in bnx2x_config_mcast()
4030 rc = o->wait_comp(bp, o); in bnx2x_config_mcast()
4036 r->clear_pending(r); in bnx2x_config_mcast()
4039 o->revert(bp, p, old_reg_size, cmd); in bnx2x_config_mcast()
4047 clear_bit(o->sched_state, o->raw.pstate); in bnx2x_mcast_clear_sched()
4054 set_bit(o->sched_state, o->raw.pstate); in bnx2x_mcast_set_sched()
4060 return !!test_bit(o->sched_state, o->raw.pstate); in bnx2x_mcast_check_sched()
4065 return o->raw.check_pending(&o->raw) || o->check_sched(o); in bnx2x_mcast_check_pending()
4076 bnx2x_init_raw_obj(&mcast_obj->raw, mcast_cl_id, mcast_cid, func_id, in bnx2x_init_mcast_obj()
4079 mcast_obj->engine_id = engine_id; in bnx2x_init_mcast_obj()
4081 INIT_LIST_HEAD(&mcast_obj->pending_cmds_head); in bnx2x_init_mcast_obj()
4083 mcast_obj->sched_state = BNX2X_FILTER_MCAST_SCHED; in bnx2x_init_mcast_obj()
4084 mcast_obj->check_sched = bnx2x_mcast_check_sched; in bnx2x_init_mcast_obj()
4085 mcast_obj->set_sched = bnx2x_mcast_set_sched; in bnx2x_init_mcast_obj()
4086 mcast_obj->clear_sched = bnx2x_mcast_clear_sched; in bnx2x_init_mcast_obj()
4089 mcast_obj->config_mcast = bnx2x_mcast_setup_e1; in bnx2x_init_mcast_obj()
4090 mcast_obj->enqueue_cmd = bnx2x_mcast_enqueue_cmd; in bnx2x_init_mcast_obj()
4091 mcast_obj->hdl_restore = in bnx2x_init_mcast_obj()
4093 mcast_obj->check_pending = bnx2x_mcast_check_pending; in bnx2x_init_mcast_obj()
4096 mcast_obj->max_cmd_len = BNX2X_MAX_EMUL_MULTI; in bnx2x_init_mcast_obj()
4098 mcast_obj->max_cmd_len = BNX2X_MAX_MULTICAST; in bnx2x_init_mcast_obj()
4100 mcast_obj->wait_comp = bnx2x_mcast_wait; in bnx2x_init_mcast_obj()
4101 mcast_obj->set_one_rule = bnx2x_mcast_set_one_rule_e1; in bnx2x_init_mcast_obj()
4102 mcast_obj->validate = bnx2x_mcast_validate_e1; in bnx2x_init_mcast_obj()
4103 mcast_obj->revert = bnx2x_mcast_revert_e1; in bnx2x_init_mcast_obj()
4104 mcast_obj->get_registry_size = in bnx2x_init_mcast_obj()
4106 mcast_obj->set_registry_size = in bnx2x_init_mcast_obj()
4112 INIT_LIST_HEAD(&mcast_obj->registry.exact_match.macs); in bnx2x_init_mcast_obj()
4115 mcast_obj->config_mcast = bnx2x_mcast_setup_e1h; in bnx2x_init_mcast_obj()
4116 mcast_obj->enqueue_cmd = NULL; in bnx2x_init_mcast_obj()
4117 mcast_obj->hdl_restore = NULL; in bnx2x_init_mcast_obj()
4118 mcast_obj->check_pending = bnx2x_mcast_check_pending; in bnx2x_init_mcast_obj()
4123 mcast_obj->max_cmd_len = -1; in bnx2x_init_mcast_obj()
4124 mcast_obj->wait_comp = bnx2x_mcast_wait; in bnx2x_init_mcast_obj()
4125 mcast_obj->set_one_rule = NULL; in bnx2x_init_mcast_obj()
4126 mcast_obj->validate = bnx2x_mcast_validate_e1h; in bnx2x_init_mcast_obj()
4127 mcast_obj->revert = bnx2x_mcast_revert_e1h; in bnx2x_init_mcast_obj()
4128 mcast_obj->get_registry_size = in bnx2x_init_mcast_obj()
4130 mcast_obj->set_registry_size = in bnx2x_init_mcast_obj()
4133 mcast_obj->config_mcast = bnx2x_mcast_setup_e2; in bnx2x_init_mcast_obj()
4134 mcast_obj->enqueue_cmd = bnx2x_mcast_enqueue_cmd; in bnx2x_init_mcast_obj()
4135 mcast_obj->hdl_restore = in bnx2x_init_mcast_obj()
4137 mcast_obj->check_pending = bnx2x_mcast_check_pending; in bnx2x_init_mcast_obj()
4138 /* TODO: There should be a proper HSI define for this number!!! in bnx2x_init_mcast_obj()
4140 mcast_obj->max_cmd_len = 16; in bnx2x_init_mcast_obj()
4141 mcast_obj->wait_comp = bnx2x_mcast_wait; in bnx2x_init_mcast_obj()
4142 mcast_obj->set_one_rule = bnx2x_mcast_set_one_rule_e2; in bnx2x_init_mcast_obj()
4143 mcast_obj->validate = bnx2x_mcast_validate_e2; in bnx2x_init_mcast_obj()
4144 mcast_obj->revert = bnx2x_mcast_revert_e2; in bnx2x_init_mcast_obj()
4145 mcast_obj->get_registry_size = in bnx2x_init_mcast_obj()
4147 mcast_obj->set_registry_size = in bnx2x_init_mcast_obj()
4155 * __atomic_add_ifless - add if the result is less than a given value.
4183 * __atomic_dec_ifmoe - dec if the result is more or equal than a given value.
4187 * @u: ...if (v - a) is more or equal than u.
4189 * returns true if (v - a) was more or equal than u, and false
4198 if (unlikely(c - a < u)) in __atomic_dec_ifmoe()
4201 old = atomic_cmpxchg((v), c, c - a); in __atomic_dec_ifmoe()
4215 rc = __atomic_dec_ifmoe(&o->credit, cnt, 0); in bnx2x_credit_pool_get()
4228 rc = __atomic_add_ifless(&o->credit, cnt, o->pool_sz + 1); in bnx2x_credit_pool_put()
4240 cur_credit = atomic_read(&o->credit); in bnx2x_credit_pool_check()
4257 *offset = -1; in bnx2x_credit_pool_get_entry()
4259 /* Find "internal cam-offset" then add to base for this object... */ in bnx2x_credit_pool_get_entry()
4263 if (!o->pool_mirror[vec]) in bnx2x_credit_pool_get_entry()
4270 if (BIT_VEC64_TEST_BIT(o->pool_mirror, idx)) { in bnx2x_credit_pool_get_entry()
4272 BIT_VEC64_CLEAR_BIT(o->pool_mirror, idx); in bnx2x_credit_pool_get_entry()
4273 *offset = o->base_pool_offset + idx; in bnx2x_credit_pool_get_entry()
4285 if (offset < o->base_pool_offset) in bnx2x_credit_pool_put_entry()
4288 offset -= o->base_pool_offset; in bnx2x_credit_pool_put_entry()
4290 if (offset >= o->pool_sz) in bnx2x_credit_pool_put_entry()
4294 BIT_VEC64_SET_BIT(o->pool_mirror, offset); in bnx2x_credit_pool_put_entry()
4310 *offset = -1; in bnx2x_credit_pool_get_entry_always_true()
4314 * bnx2x_init_credit_pool - initialize credit pool internals.
4331 memset(&p->pool_mirror, 0xff, sizeof(p->pool_mirror)); in bnx2x_init_credit_pool()
4334 atomic_set(&p->credit, credit); in bnx2x_init_credit_pool()
4337 p->pool_sz = credit; in bnx2x_init_credit_pool()
4339 p->base_pool_offset = base; in bnx2x_init_credit_pool()
4344 p->check = bnx2x_credit_pool_check; in bnx2x_init_credit_pool()
4346 /* if pool credit is negative - disable the checks */ in bnx2x_init_credit_pool()
4348 p->put = bnx2x_credit_pool_put; in bnx2x_init_credit_pool()
4349 p->get = bnx2x_credit_pool_get; in bnx2x_init_credit_pool()
4350 p->put_entry = bnx2x_credit_pool_put_entry; in bnx2x_init_credit_pool()
4351 p->get_entry = bnx2x_credit_pool_get_entry; in bnx2x_init_credit_pool()
4353 p->put = bnx2x_credit_pool_always_true; in bnx2x_init_credit_pool()
4354 p->get = bnx2x_credit_pool_always_true; in bnx2x_init_credit_pool()
4355 p->put_entry = bnx2x_credit_pool_put_entry_always_true; in bnx2x_init_credit_pool()
4356 p->get_entry = bnx2x_credit_pool_get_entry_always_true; in bnx2x_init_credit_pool()
4359 /* If base is negative - disable entries handling */ in bnx2x_init_credit_pool()
4361 p->put_entry = bnx2x_credit_pool_put_entry_always_true; in bnx2x_init_credit_pool()
4362 p->get_entry = bnx2x_credit_pool_get_entry_always_true; in bnx2x_init_credit_pool()
4378 cam_sz = (MAX_MAC_CREDIT_E1 / 2) - BNX2X_MAX_MULTICAST; in bnx2x_init_mac_credit_pool()
4380 cam_sz = BNX2X_CAM_SIZE_EMUL - BNX2X_MAX_EMUL_MULTI; in bnx2x_init_mac_credit_pool()
4395 /* this should never happen! Block MAC operations. */ in bnx2x_init_mac_credit_pool()
4413 bnx2x_init_credit_pool(p, -1, cam_sz); in bnx2x_init_mac_credit_pool()
4415 /* this should never happen! Block MAC operations. */ in bnx2x_init_mac_credit_pool()
4428 * MAC / MAC-VLAN can be set in bnx2x_init_vlan_credit_pool()
4430 bnx2x_init_credit_pool(p, 0, -1); in bnx2x_init_vlan_credit_pool()
4438 bnx2x_init_credit_pool(p, -1/*unused for E2*/, credit); in bnx2x_init_vlan_credit_pool()
4447 * bnx2x_debug_print_ind_table - prints the indirection table configuration.
4462 DP_CONT(BNX2X_MSG_SP, "0x%02x ", p->ind_table[i]); in bnx2x_debug_print_ind_table()
4476 * bnx2x_setup_rss - configure RSS
4486 struct bnx2x_rss_config_obj *o = p->rss_obj; in bnx2x_setup_rss()
4487 struct bnx2x_raw_obj *r = &o->raw; in bnx2x_setup_rss()
4489 (struct eth_rss_update_ramrod_data *)(r->rdata); in bnx2x_setup_rss()
4499 data->echo = cpu_to_le32((r->cid & BNX2X_SWCID_MASK) | in bnx2x_setup_rss()
4500 (r->state << BNX2X_SWCID_SHIFT)); in bnx2x_setup_rss()
4503 if (test_bit(BNX2X_RSS_MODE_DISABLED, &p->rss_flags)) in bnx2x_setup_rss()
4505 else if (test_bit(BNX2X_RSS_MODE_REGULAR, &p->rss_flags)) in bnx2x_setup_rss()
4508 data->rss_mode = rss_mode; in bnx2x_setup_rss()
4513 if (test_bit(BNX2X_RSS_IPV4, &p->rss_flags)) in bnx2x_setup_rss()
4516 if (test_bit(BNX2X_RSS_IPV4_TCP, &p->rss_flags)) in bnx2x_setup_rss()
4519 if (test_bit(BNX2X_RSS_IPV4_UDP, &p->rss_flags)) in bnx2x_setup_rss()
4522 if (test_bit(BNX2X_RSS_IPV6, &p->rss_flags)) in bnx2x_setup_rss()
4525 if (test_bit(BNX2X_RSS_IPV6_TCP, &p->rss_flags)) in bnx2x_setup_rss()
4528 if (test_bit(BNX2X_RSS_IPV6_UDP, &p->rss_flags)) in bnx2x_setup_rss()
4531 if (test_bit(BNX2X_RSS_IPV4_VXLAN, &p->rss_flags)) in bnx2x_setup_rss()
4534 if (test_bit(BNX2X_RSS_IPV6_VXLAN, &p->rss_flags)) in bnx2x_setup_rss()
4537 if (test_bit(BNX2X_RSS_TUNN_INNER_HDRS, &p->rss_flags)) in bnx2x_setup_rss()
4541 if (test_bit(BNX2X_RSS_SET_SRCH, &p->rss_flags)) { in bnx2x_setup_rss()
4542 u8 *dst = (u8 *)(data->rss_key) + sizeof(data->rss_key); in bnx2x_setup_rss()
4543 const u8 *src = (const u8 *)p->rss_key; in bnx2x_setup_rss()
4549 for (i = 0; i < sizeof(data->rss_key); i++) in bnx2x_setup_rss()
4550 *--dst = *src++; in bnx2x_setup_rss()
4555 data->capabilities = cpu_to_le16(caps); in bnx2x_setup_rss()
4558 data->rss_result_mask = p->rss_result_mask; in bnx2x_setup_rss()
4561 data->rss_engine_id = o->engine_id; in bnx2x_setup_rss()
4563 DP(BNX2X_MSG_SP, "rss_engine_id=%d\n", data->rss_engine_id); in bnx2x_setup_rss()
4566 memcpy(data->indirection_table, p->ind_table, in bnx2x_setup_rss()
4570 memcpy(o->ind_table, p->ind_table, T_ETH_INDIRECTION_TABLE_SIZE); in bnx2x_setup_rss()
4584 rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_ETH_RSS_UPDATE, r->cid, in bnx2x_setup_rss()
4585 U64_HI(r->rdata_mapping), in bnx2x_setup_rss()
4586 U64_LO(r->rdata_mapping), in bnx2x_setup_rss()
4598 memcpy(ind_table, rss_obj->ind_table, sizeof(rss_obj->ind_table)); in bnx2x_get_rss_ind_table()
4605 struct bnx2x_rss_config_obj *o = p->rss_obj; in bnx2x_config_rss()
4606 struct bnx2x_raw_obj *r = &o->raw; in bnx2x_config_rss()
4609 if (test_bit(RAMROD_DRV_CLR_ONLY, &p->ramrod_flags)) { in bnx2x_config_rss()
4611 p->ramrod_flags); in bnx2x_config_rss()
4615 r->set_pending(r); in bnx2x_config_rss()
4617 rc = o->config_rss(bp, p); in bnx2x_config_rss()
4619 r->clear_pending(r); in bnx2x_config_rss()
4623 if (test_bit(RAMROD_COMP_WAIT, &p->ramrod_flags)) in bnx2x_config_rss()
4624 rc = r->wait_comp(bp, r); in bnx2x_config_rss()
4636 bnx2x_init_raw_obj(&rss_obj->raw, cl_id, cid, func_id, rdata, in bnx2x_init_rss_config_obj()
4639 rss_obj->engine_id = engine_id; in bnx2x_init_rss_config_obj()
4640 rss_obj->config_rss = bnx2x_setup_rss; in bnx2x_init_rss_config_obj()
4646 * bnx2x_queue_state_change - perform Queue state change transition
4654 * not set in params->ramrod_flags for asynchronous commands).
4660 struct bnx2x_queue_sp_obj *o = params->q_obj; in bnx2x_queue_state_change()
4662 unsigned long *pending = &o->pending; in bnx2x_queue_state_change()
4665 rc = o->check_transition(bp, o, params); in bnx2x_queue_state_change()
4668 return -EINVAL; in bnx2x_queue_state_change()
4672 DP(BNX2X_MSG_SP, "pending bit was=%lx\n", o->pending); in bnx2x_queue_state_change()
4673 pending_bit = o->set_pending(o, params); in bnx2x_queue_state_change()
4674 DP(BNX2X_MSG_SP, "pending bit now=%lx\n", o->pending); in bnx2x_queue_state_change()
4677 if (test_bit(RAMROD_DRV_CLR_ONLY, ¶ms->ramrod_flags)) in bnx2x_queue_state_change()
4678 o->complete_cmd(bp, o, pending_bit); in bnx2x_queue_state_change()
4681 rc = o->send_cmd(bp, params); in bnx2x_queue_state_change()
4683 o->next_state = BNX2X_Q_STATE_MAX; in bnx2x_queue_state_change()
4689 if (test_bit(RAMROD_COMP_WAIT, ¶ms->ramrod_flags)) { in bnx2x_queue_state_change()
4690 rc = o->wait_comp(bp, o, pending_bit); in bnx2x_queue_state_change()
4704 enum bnx2x_queue_cmd cmd = params->cmd, bit; in bnx2x_queue_set_pending()
4715 set_bit(bit, &obj->pending); in bnx2x_queue_set_pending()
4723 return bnx2x_state_wait(bp, cmd, &o->pending); in bnx2x_queue_wait_comp()
4727 * bnx2x_queue_comp_cmd - complete the state change command.
4739 unsigned long cur_pending = o->pending; in bnx2x_queue_comp_cmd()
4743 cmd, o->cids[BNX2X_PRIMARY_CID_INDEX], in bnx2x_queue_comp_cmd()
4744 o->state, cur_pending, o->next_state); in bnx2x_queue_comp_cmd()
4745 return -EINVAL; in bnx2x_queue_comp_cmd()
4748 if (o->next_tx_only >= o->max_cos) in bnx2x_queue_comp_cmd()
4753 o->next_tx_only, o->max_cos); in bnx2x_queue_comp_cmd()
4757 cmd, o->cids[BNX2X_PRIMARY_CID_INDEX], o->next_state); in bnx2x_queue_comp_cmd()
4759 if (o->next_tx_only) /* print num tx-only if any exist */ in bnx2x_queue_comp_cmd()
4760 DP(BNX2X_MSG_SP, "primary cid %d: num tx-only cons %d\n", in bnx2x_queue_comp_cmd()
4761 o->cids[BNX2X_PRIMARY_CID_INDEX], o->next_tx_only); in bnx2x_queue_comp_cmd()
4763 o->state = o->next_state; in bnx2x_queue_comp_cmd()
4764 o->num_tx_only = o->next_tx_only; in bnx2x_queue_comp_cmd()
4765 o->next_state = BNX2X_Q_STATE_MAX; in bnx2x_queue_comp_cmd()
4767 /* It's important that o->state and o->next_state are in bnx2x_queue_comp_cmd()
4768 * updated before o->pending. in bnx2x_queue_comp_cmd()
4772 clear_bit(cmd, &o->pending); in bnx2x_queue_comp_cmd()
4782 struct bnx2x_queue_setup_params *params = &cmd_params->params.setup; in bnx2x_q_fill_setup_data_e2()
4787 data->rx.tpa_en |= test_bit(BNX2X_Q_FLG_TPA_IPV6, ¶ms->flags) * in bnx2x_q_fill_setup_data_e2()
4797 gen_data->client_id = o->cl_id; in bnx2x_q_fill_init_general_data()
4800 gen_data->statistics_counter_id = in bnx2x_q_fill_init_general_data()
4801 params->stat_id; in bnx2x_q_fill_init_general_data()
4802 gen_data->statistics_en_flg = 1; in bnx2x_q_fill_init_general_data()
4803 gen_data->statistics_zero_flg = in bnx2x_q_fill_init_general_data()
4806 gen_data->statistics_counter_id = in bnx2x_q_fill_init_general_data()
4809 gen_data->is_fcoe_flg = test_bit(BNX2X_Q_FLG_FCOE, flags); in bnx2x_q_fill_init_general_data()
4810 gen_data->activate_flg = test_bit(BNX2X_Q_FLG_ACTIVE, flags); in bnx2x_q_fill_init_general_data()
4811 gen_data->sp_client_id = params->spcl_id; in bnx2x_q_fill_init_general_data()
4812 gen_data->mtu = cpu_to_le16(params->mtu); in bnx2x_q_fill_init_general_data()
4813 gen_data->func_id = o->func_id; in bnx2x_q_fill_init_general_data()
4815 gen_data->cos = params->cos; in bnx2x_q_fill_init_general_data()
4817 gen_data->traffic_type = in bnx2x_q_fill_init_general_data()
4821 gen_data->fp_hsi_ver = params->fp_hsi; in bnx2x_q_fill_init_general_data()
4824 gen_data->activate_flg, gen_data->cos, gen_data->statistics_en_flg); in bnx2x_q_fill_init_general_data()
4832 tx_data->enforce_security_flg = in bnx2x_q_fill_init_tx_data()
4834 tx_data->default_vlan = in bnx2x_q_fill_init_tx_data()
4835 cpu_to_le16(params->default_vlan); in bnx2x_q_fill_init_tx_data()
4836 tx_data->default_vlan_flg = in bnx2x_q_fill_init_tx_data()
4838 tx_data->tx_switching_flg = in bnx2x_q_fill_init_tx_data()
4840 tx_data->anti_spoofing_flg = in bnx2x_q_fill_init_tx_data()
4842 tx_data->force_default_pri_flg = in bnx2x_q_fill_init_tx_data()
4844 tx_data->refuse_outband_vlan_flg = in bnx2x_q_fill_init_tx_data()
4846 tx_data->tunnel_lso_inc_ip_id = in bnx2x_q_fill_init_tx_data()
4848 tx_data->tunnel_non_lso_pcsum_location = in bnx2x_q_fill_init_tx_data()
4852 tx_data->tx_status_block_id = params->fw_sb_id; in bnx2x_q_fill_init_tx_data()
4853 tx_data->tx_sb_index_number = params->sb_cq_index; in bnx2x_q_fill_init_tx_data()
4854 tx_data->tss_leading_client_id = params->tss_leading_cl_id; in bnx2x_q_fill_init_tx_data()
4856 tx_data->tx_bd_page_base.lo = in bnx2x_q_fill_init_tx_data()
4857 cpu_to_le32(U64_LO(params->dscr_map)); in bnx2x_q_fill_init_tx_data()
4858 tx_data->tx_bd_page_base.hi = in bnx2x_q_fill_init_tx_data()
4859 cpu_to_le32(U64_HI(params->dscr_map)); in bnx2x_q_fill_init_tx_data()
4862 tx_data->state = 0; in bnx2x_q_fill_init_tx_data()
4870 rx_data->cqe_pause_thr_low = cpu_to_le16(params->rcq_th_lo); in bnx2x_q_fill_init_pause_data()
4871 rx_data->cqe_pause_thr_high = cpu_to_le16(params->rcq_th_hi); in bnx2x_q_fill_init_pause_data()
4872 rx_data->bd_pause_thr_low = cpu_to_le16(params->bd_th_lo); in bnx2x_q_fill_init_pause_data()
4873 rx_data->bd_pause_thr_high = cpu_to_le16(params->bd_th_hi); in bnx2x_q_fill_init_pause_data()
4874 rx_data->sge_pause_thr_low = cpu_to_le16(params->sge_th_lo); in bnx2x_q_fill_init_pause_data()
4875 rx_data->sge_pause_thr_high = cpu_to_le16(params->sge_th_hi); in bnx2x_q_fill_init_pause_data()
4876 rx_data->rx_cos_mask = cpu_to_le16(params->pri_map); in bnx2x_q_fill_init_pause_data()
4884 rx_data->tpa_en = test_bit(BNX2X_Q_FLG_TPA, flags) * in bnx2x_q_fill_init_rx_data()
4886 rx_data->tpa_en |= test_bit(BNX2X_Q_FLG_TPA_GRO, flags) * in bnx2x_q_fill_init_rx_data()
4888 rx_data->vmqueue_mode_en_flg = 0; in bnx2x_q_fill_init_rx_data()
4890 rx_data->cache_line_alignment_log_size = in bnx2x_q_fill_init_rx_data()
4891 params->cache_line_log; in bnx2x_q_fill_init_rx_data()
4892 rx_data->enable_dynamic_hc = in bnx2x_q_fill_init_rx_data()
4894 rx_data->max_sges_for_packet = params->max_sges_pkt; in bnx2x_q_fill_init_rx_data()
4895 rx_data->client_qzone_id = params->cl_qzone_id; in bnx2x_q_fill_init_rx_data()
4896 rx_data->max_agg_size = cpu_to_le16(params->tpa_agg_sz); in bnx2x_q_fill_init_rx_data()
4899 rx_data->state = cpu_to_le16(CLIENT_INIT_RX_DATA_UCAST_DROP_ALL | in bnx2x_q_fill_init_rx_data()
4903 rx_data->drop_ip_cs_err_flg = 0; in bnx2x_q_fill_init_rx_data()
4904 rx_data->drop_tcp_cs_err_flg = 0; in bnx2x_q_fill_init_rx_data()
4905 rx_data->drop_ttl0_flg = 0; in bnx2x_q_fill_init_rx_data()
4906 rx_data->drop_udp_cs_err_flg = 0; in bnx2x_q_fill_init_rx_data()
4907 rx_data->inner_vlan_removal_enable_flg = in bnx2x_q_fill_init_rx_data()
4909 rx_data->outer_vlan_removal_enable_flg = in bnx2x_q_fill_init_rx_data()
4911 rx_data->status_block_id = params->fw_sb_id; in bnx2x_q_fill_init_rx_data()
4912 rx_data->rx_sb_index_number = params->sb_cq_index; in bnx2x_q_fill_init_rx_data()
4913 rx_data->max_tpa_queues = params->max_tpa_queues; in bnx2x_q_fill_init_rx_data()
4914 rx_data->max_bytes_on_bd = cpu_to_le16(params->buf_sz); in bnx2x_q_fill_init_rx_data()
4915 rx_data->sge_buff_size = cpu_to_le16(params->sge_buf_sz); in bnx2x_q_fill_init_rx_data()
4916 rx_data->bd_page_base.lo = in bnx2x_q_fill_init_rx_data()
4917 cpu_to_le32(U64_LO(params->dscr_map)); in bnx2x_q_fill_init_rx_data()
4918 rx_data->bd_page_base.hi = in bnx2x_q_fill_init_rx_data()
4919 cpu_to_le32(U64_HI(params->dscr_map)); in bnx2x_q_fill_init_rx_data()
4920 rx_data->sge_page_base.lo = in bnx2x_q_fill_init_rx_data()
4921 cpu_to_le32(U64_LO(params->sge_map)); in bnx2x_q_fill_init_rx_data()
4922 rx_data->sge_page_base.hi = in bnx2x_q_fill_init_rx_data()
4923 cpu_to_le32(U64_HI(params->sge_map)); in bnx2x_q_fill_init_rx_data()
4924 rx_data->cqe_page_base.lo = in bnx2x_q_fill_init_rx_data()
4925 cpu_to_le32(U64_LO(params->rcq_map)); in bnx2x_q_fill_init_rx_data()
4926 rx_data->cqe_page_base.hi = in bnx2x_q_fill_init_rx_data()
4927 cpu_to_le32(U64_HI(params->rcq_map)); in bnx2x_q_fill_init_rx_data()
4928 rx_data->is_leading_rss = test_bit(BNX2X_Q_FLG_LEADING_RSS, flags); in bnx2x_q_fill_init_rx_data()
4931 rx_data->approx_mcast_engine_id = params->mcast_engine_id; in bnx2x_q_fill_init_rx_data()
4932 rx_data->is_approx_mcast = 1; in bnx2x_q_fill_init_rx_data()
4935 rx_data->rss_engine_id = params->rss_engine_id; in bnx2x_q_fill_init_rx_data()
4938 rx_data->silent_vlan_removal_flg = in bnx2x_q_fill_init_rx_data()
4940 rx_data->silent_vlan_value = in bnx2x_q_fill_init_rx_data()
4941 cpu_to_le16(params->silent_removal_value); in bnx2x_q_fill_init_rx_data()
4942 rx_data->silent_vlan_mask = in bnx2x_q_fill_init_rx_data()
4943 cpu_to_le16(params->silent_removal_mask); in bnx2x_q_fill_init_rx_data()
4951 bnx2x_q_fill_init_general_data(bp, cmd_params->q_obj, in bnx2x_q_fill_setup_data_cmn()
4952 &cmd_params->params.setup.gen_params, in bnx2x_q_fill_setup_data_cmn()
4953 &data->general, in bnx2x_q_fill_setup_data_cmn()
4954 &cmd_params->params.setup.flags); in bnx2x_q_fill_setup_data_cmn()
4956 bnx2x_q_fill_init_tx_data(cmd_params->q_obj, in bnx2x_q_fill_setup_data_cmn()
4957 &cmd_params->params.setup.txq_params, in bnx2x_q_fill_setup_data_cmn()
4958 &data->tx, in bnx2x_q_fill_setup_data_cmn()
4959 &cmd_params->params.setup.flags); in bnx2x_q_fill_setup_data_cmn()
4961 bnx2x_q_fill_init_rx_data(cmd_params->q_obj, in bnx2x_q_fill_setup_data_cmn()
4962 &cmd_params->params.setup.rxq_params, in bnx2x_q_fill_setup_data_cmn()
4963 &data->rx, in bnx2x_q_fill_setup_data_cmn()
4964 &cmd_params->params.setup.flags); in bnx2x_q_fill_setup_data_cmn()
4966 bnx2x_q_fill_init_pause_data(cmd_params->q_obj, in bnx2x_q_fill_setup_data_cmn()
4967 &cmd_params->params.setup.pause_params, in bnx2x_q_fill_setup_data_cmn()
4968 &data->rx); in bnx2x_q_fill_setup_data_cmn()
4971 /* initialize the general and tx parts of a tx-only queue object */
4976 bnx2x_q_fill_init_general_data(bp, cmd_params->q_obj, in bnx2x_q_fill_setup_tx_only()
4977 &cmd_params->params.tx_only.gen_params, in bnx2x_q_fill_setup_tx_only()
4978 &data->general, in bnx2x_q_fill_setup_tx_only()
4979 &cmd_params->params.tx_only.flags); in bnx2x_q_fill_setup_tx_only()
4981 bnx2x_q_fill_init_tx_data(cmd_params->q_obj, in bnx2x_q_fill_setup_tx_only()
4982 &cmd_params->params.tx_only.txq_params, in bnx2x_q_fill_setup_tx_only()
4983 &data->tx, in bnx2x_q_fill_setup_tx_only()
4984 &cmd_params->params.tx_only.flags); in bnx2x_q_fill_setup_tx_only()
4987 cmd_params->q_obj->cids[0], in bnx2x_q_fill_setup_tx_only()
4988 data->tx.tx_bd_page_base.lo, in bnx2x_q_fill_setup_tx_only()
4989 data->tx.tx_bd_page_base.hi); in bnx2x_q_fill_setup_tx_only()
4993 * bnx2x_q_init - init HW/FW queue
4999 * - HC: Rx and Tx
5000 * - CDU context validation
5006 struct bnx2x_queue_sp_obj *o = params->q_obj; in bnx2x_q_init()
5007 struct bnx2x_queue_init_params *init = ¶ms->params.init; in bnx2x_q_init()
5012 if (test_bit(BNX2X_Q_TYPE_HAS_TX, &o->type) && in bnx2x_q_init()
5013 test_bit(BNX2X_Q_FLG_HC, &init->tx.flags)) { in bnx2x_q_init()
5014 hc_usec = init->tx.hc_rate ? 1000000 / init->tx.hc_rate : 0; in bnx2x_q_init()
5016 bnx2x_update_coalesce_sb_index(bp, init->tx.fw_sb_id, in bnx2x_q_init()
5017 init->tx.sb_cq_index, in bnx2x_q_init()
5018 !test_bit(BNX2X_Q_FLG_HC_EN, &init->tx.flags), in bnx2x_q_init()
5023 if (test_bit(BNX2X_Q_TYPE_HAS_RX, &o->type) && in bnx2x_q_init()
5024 test_bit(BNX2X_Q_FLG_HC, &init->rx.flags)) { in bnx2x_q_init()
5025 hc_usec = init->rx.hc_rate ? 1000000 / init->rx.hc_rate : 0; in bnx2x_q_init()
5027 bnx2x_update_coalesce_sb_index(bp, init->rx.fw_sb_id, in bnx2x_q_init()
5028 init->rx.sb_cq_index, in bnx2x_q_init()
5029 !test_bit(BNX2X_Q_FLG_HC_EN, &init->rx.flags), in bnx2x_q_init()
5034 for (cos = 0; cos < o->max_cos; cos++) { in bnx2x_q_init()
5036 o->cids[cos], cos); in bnx2x_q_init()
5037 DP(BNX2X_MSG_SP, "context pointer %p\n", init->cxts[cos]); in bnx2x_q_init()
5038 bnx2x_set_ctx_validation(bp, init->cxts[cos], o->cids[cos]); in bnx2x_q_init()
5042 o->complete_cmd(bp, o, BNX2X_Q_CMD_INIT); in bnx2x_q_init()
5052 struct bnx2x_queue_sp_obj *o = params->q_obj; in bnx2x_q_send_setup_e1x()
5054 (struct client_init_ramrod_data *)o->rdata; in bnx2x_q_send_setup_e1x()
5055 dma_addr_t data_mapping = o->rdata_mapping; in bnx2x_q_send_setup_e1x()
5070 return bnx2x_sp_post(bp, ramrod, o->cids[BNX2X_PRIMARY_CID_INDEX], in bnx2x_q_send_setup_e1x()
5078 struct bnx2x_queue_sp_obj *o = params->q_obj; in bnx2x_q_send_setup_e2()
5080 (struct client_init_ramrod_data *)o->rdata; in bnx2x_q_send_setup_e2()
5081 dma_addr_t data_mapping = o->rdata_mapping; in bnx2x_q_send_setup_e2()
5097 return bnx2x_sp_post(bp, ramrod, o->cids[BNX2X_PRIMARY_CID_INDEX], in bnx2x_q_send_setup_e2()
5105 struct bnx2x_queue_sp_obj *o = params->q_obj; in bnx2x_q_send_setup_tx_only()
5107 (struct tx_queue_init_ramrod_data *)o->rdata; in bnx2x_q_send_setup_tx_only()
5108 dma_addr_t data_mapping = o->rdata_mapping; in bnx2x_q_send_setup_tx_only()
5111 ¶ms->params.tx_only; in bnx2x_q_send_setup_tx_only()
5112 u8 cid_index = tx_only_params->cid_index; in bnx2x_q_send_setup_tx_only()
5114 if (cid_index >= o->max_cos) { in bnx2x_q_send_setup_tx_only()
5116 o->cl_id, cid_index); in bnx2x_q_send_setup_tx_only()
5117 return -EINVAL; in bnx2x_q_send_setup_tx_only()
5120 DP(BNX2X_MSG_SP, "parameters received: cos: %d sp-id: %d\n", in bnx2x_q_send_setup_tx_only()
5121 tx_only_params->gen_params.cos, in bnx2x_q_send_setup_tx_only()
5122 tx_only_params->gen_params.spcl_id); in bnx2x_q_send_setup_tx_only()
5130 DP(BNX2X_MSG_SP, "sending tx-only ramrod: cid %d, client-id %d, sp-client id %d, cos %d\n", in bnx2x_q_send_setup_tx_only()
5131 o->cids[cid_index], rdata->general.client_id, in bnx2x_q_send_setup_tx_only()
5132 rdata->general.sp_client_id, rdata->general.cos); in bnx2x_q_send_setup_tx_only()
5140 return bnx2x_sp_post(bp, ramrod, o->cids[cid_index], in bnx2x_q_send_setup_tx_only()
5151 data->client_id = obj->cl_id; in bnx2x_q_fill_update_data()
5154 data->func_id = obj->func_id; in bnx2x_q_fill_update_data()
5157 data->default_vlan = cpu_to_le16(params->def_vlan); in bnx2x_q_fill_update_data()
5160 data->inner_vlan_removal_enable_flg = in bnx2x_q_fill_update_data()
5161 test_bit(BNX2X_Q_UPDATE_IN_VLAN_REM, ¶ms->update_flags); in bnx2x_q_fill_update_data()
5162 data->inner_vlan_removal_change_flg = in bnx2x_q_fill_update_data()
5164 ¶ms->update_flags); in bnx2x_q_fill_update_data()
5167 data->outer_vlan_removal_enable_flg = in bnx2x_q_fill_update_data()
5168 test_bit(BNX2X_Q_UPDATE_OUT_VLAN_REM, ¶ms->update_flags); in bnx2x_q_fill_update_data()
5169 data->outer_vlan_removal_change_flg = in bnx2x_q_fill_update_data()
5171 ¶ms->update_flags); in bnx2x_q_fill_update_data()
5173 /* Drop packets that have source MAC that doesn't belong to this in bnx2x_q_fill_update_data()
5176 data->anti_spoofing_enable_flg = in bnx2x_q_fill_update_data()
5177 test_bit(BNX2X_Q_UPDATE_ANTI_SPOOF, ¶ms->update_flags); in bnx2x_q_fill_update_data()
5178 data->anti_spoofing_change_flg = in bnx2x_q_fill_update_data()
5179 test_bit(BNX2X_Q_UPDATE_ANTI_SPOOF_CHNG, ¶ms->update_flags); in bnx2x_q_fill_update_data()
5182 data->activate_flg = in bnx2x_q_fill_update_data()
5183 test_bit(BNX2X_Q_UPDATE_ACTIVATE, ¶ms->update_flags); in bnx2x_q_fill_update_data()
5184 data->activate_change_flg = in bnx2x_q_fill_update_data()
5185 test_bit(BNX2X_Q_UPDATE_ACTIVATE_CHNG, ¶ms->update_flags); in bnx2x_q_fill_update_data()
5188 data->default_vlan_enable_flg = in bnx2x_q_fill_update_data()
5189 test_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN, ¶ms->update_flags); in bnx2x_q_fill_update_data()
5190 data->default_vlan_change_flg = in bnx2x_q_fill_update_data()
5192 ¶ms->update_flags); in bnx2x_q_fill_update_data()
5195 data->silent_vlan_change_flg = in bnx2x_q_fill_update_data()
5197 ¶ms->update_flags); in bnx2x_q_fill_update_data()
5198 data->silent_vlan_removal_flg = in bnx2x_q_fill_update_data()
5199 test_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM, ¶ms->update_flags); in bnx2x_q_fill_update_data()
5200 data->silent_vlan_value = cpu_to_le16(params->silent_removal_value); in bnx2x_q_fill_update_data()
5201 data->silent_vlan_mask = cpu_to_le16(params->silent_removal_mask); in bnx2x_q_fill_update_data()
5204 data->tx_switching_flg = in bnx2x_q_fill_update_data()
5205 test_bit(BNX2X_Q_UPDATE_TX_SWITCHING, ¶ms->update_flags); in bnx2x_q_fill_update_data()
5206 data->tx_switching_change_flg = in bnx2x_q_fill_update_data()
5208 ¶ms->update_flags); in bnx2x_q_fill_update_data()
5211 data->handle_ptp_pkts_flg = in bnx2x_q_fill_update_data()
5212 test_bit(BNX2X_Q_UPDATE_PTP_PKTS, ¶ms->update_flags); in bnx2x_q_fill_update_data()
5213 data->handle_ptp_pkts_change_flg = in bnx2x_q_fill_update_data()
5214 test_bit(BNX2X_Q_UPDATE_PTP_PKTS_CHNG, ¶ms->update_flags); in bnx2x_q_fill_update_data()
5220 struct bnx2x_queue_sp_obj *o = params->q_obj; in bnx2x_q_send_update()
5222 (struct client_update_ramrod_data *)o->rdata; in bnx2x_q_send_update()
5223 dma_addr_t data_mapping = o->rdata_mapping; in bnx2x_q_send_update()
5225 ¶ms->params.update; in bnx2x_q_send_update()
5226 u8 cid_index = update_params->cid_index; in bnx2x_q_send_update()
5228 if (cid_index >= o->max_cos) { in bnx2x_q_send_update()
5230 o->cl_id, cid_index); in bnx2x_q_send_update()
5231 return -EINVAL; in bnx2x_q_send_update()
5247 o->cids[cid_index], U64_HI(data_mapping), in bnx2x_q_send_update()
5252 * bnx2x_q_send_deactivate - send DEACTIVATE command
5262 struct bnx2x_queue_update_params *update = ¶ms->params.update; in bnx2x_q_send_deactivate()
5266 __set_bit(BNX2X_Q_UPDATE_ACTIVATE_CHNG, &update->update_flags); in bnx2x_q_send_deactivate()
5272 * bnx2x_q_send_activate - send ACTIVATE command
5282 struct bnx2x_queue_update_params *update = ¶ms->params.update; in bnx2x_q_send_activate()
5286 __set_bit(BNX2X_Q_UPDATE_ACTIVATE, &update->update_flags); in bnx2x_q_send_activate()
5287 __set_bit(BNX2X_Q_UPDATE_ACTIVATE_CHNG, &update->update_flags); in bnx2x_q_send_activate()
5297 data->client_id = obj->cl_id; in bnx2x_q_fill_update_tpa_data()
5298 data->complete_on_both_clients = params->complete_on_both_clients; in bnx2x_q_fill_update_tpa_data()
5299 data->dont_verify_rings_pause_thr_flg = in bnx2x_q_fill_update_tpa_data()
5300 params->dont_verify_thr; in bnx2x_q_fill_update_tpa_data()
5301 data->max_agg_size = cpu_to_le16(params->max_agg_sz); in bnx2x_q_fill_update_tpa_data()
5302 data->max_sges_for_packet = params->max_sges_pkt; in bnx2x_q_fill_update_tpa_data()
5303 data->max_tpa_queues = params->max_tpa_queues; in bnx2x_q_fill_update_tpa_data()
5304 data->sge_buff_size = cpu_to_le16(params->sge_buff_sz); in bnx2x_q_fill_update_tpa_data()
5305 data->sge_page_base_hi = cpu_to_le32(U64_HI(params->sge_map)); in bnx2x_q_fill_update_tpa_data()
5306 data->sge_page_base_lo = cpu_to_le32(U64_LO(params->sge_map)); in bnx2x_q_fill_update_tpa_data()
5307 data->sge_pause_thr_high = cpu_to_le16(params->sge_pause_thr_high); in bnx2x_q_fill_update_tpa_data()
5308 data->sge_pause_thr_low = cpu_to_le16(params->sge_pause_thr_low); in bnx2x_q_fill_update_tpa_data()
5309 data->tpa_mode = params->tpa_mode; in bnx2x_q_fill_update_tpa_data()
5310 data->update_ipv4 = params->update_ipv4; in bnx2x_q_fill_update_tpa_data()
5311 data->update_ipv6 = params->update_ipv6; in bnx2x_q_fill_update_tpa_data()
5317 struct bnx2x_queue_sp_obj *o = params->q_obj; in bnx2x_q_send_update_tpa()
5319 (struct tpa_update_ramrod_data *)o->rdata; in bnx2x_q_send_update_tpa()
5320 dma_addr_t data_mapping = o->rdata_mapping; in bnx2x_q_send_update_tpa()
5322 ¶ms->params.update_tpa; in bnx2x_q_send_update_tpa()
5332 * doesn't automatically add the PF func-id, this is required in bnx2x_q_send_update_tpa()
5336 ((o->func_id) << SPE_HDR_FUNCTION_ID_SHIFT); in bnx2x_q_send_update_tpa()
5345 o->cids[BNX2X_PRIMARY_CID_INDEX], in bnx2x_q_send_update_tpa()
5353 struct bnx2x_queue_sp_obj *o = params->q_obj; in bnx2x_q_send_halt()
5356 o->cids[BNX2X_PRIMARY_CID_INDEX], 0, o->cl_id, in bnx2x_q_send_halt()
5363 struct bnx2x_queue_sp_obj *o = params->q_obj; in bnx2x_q_send_cfc_del()
5364 u8 cid_idx = params->params.cfc_del.cid_index; in bnx2x_q_send_cfc_del()
5366 if (cid_idx >= o->max_cos) { in bnx2x_q_send_cfc_del()
5368 o->cl_id, cid_idx); in bnx2x_q_send_cfc_del()
5369 return -EINVAL; in bnx2x_q_send_cfc_del()
5373 o->cids[cid_idx], 0, 0, NONE_CONNECTION_TYPE); in bnx2x_q_send_cfc_del()
5379 struct bnx2x_queue_sp_obj *o = params->q_obj; in bnx2x_q_send_terminate()
5380 u8 cid_index = params->params.terminate.cid_index; in bnx2x_q_send_terminate()
5382 if (cid_index >= o->max_cos) { in bnx2x_q_send_terminate()
5384 o->cl_id, cid_index); in bnx2x_q_send_terminate()
5385 return -EINVAL; in bnx2x_q_send_terminate()
5389 o->cids[cid_index], 0, 0, ETH_CONNECTION_TYPE); in bnx2x_q_send_terminate()
5395 struct bnx2x_queue_sp_obj *o = params->q_obj; in bnx2x_q_send_empty()
5398 o->cids[BNX2X_PRIMARY_CID_INDEX], 0, 0, in bnx2x_q_send_empty()
5405 switch (params->cmd) { in bnx2x_queue_send_cmd_cmn()
5427 BNX2X_ERR("Unknown command: %d\n", params->cmd); in bnx2x_queue_send_cmd_cmn()
5428 return -EINVAL; in bnx2x_queue_send_cmd_cmn()
5435 switch (params->cmd) { in bnx2x_queue_send_cmd_e1x()
5450 BNX2X_ERR("Unknown command: %d\n", params->cmd); in bnx2x_queue_send_cmd_e1x()
5451 return -EINVAL; in bnx2x_queue_send_cmd_e1x()
5458 switch (params->cmd) { in bnx2x_queue_send_cmd_e2()
5473 BNX2X_ERR("Unknown command: %d\n", params->cmd); in bnx2x_queue_send_cmd_e2()
5474 return -EINVAL; in bnx2x_queue_send_cmd_e2()
5479 * bnx2x_queue_chk_transition - check state machine of a regular Queue
5492 * -EINVAL otherwise.
5498 enum bnx2x_q_state state = o->state, next_state = BNX2X_Q_STATE_MAX; in bnx2x_queue_chk_transition()
5499 enum bnx2x_queue_cmd cmd = params->cmd; in bnx2x_queue_chk_transition()
5501 ¶ms->params.update; in bnx2x_queue_chk_transition()
5502 u8 next_tx_only = o->num_tx_only; in bnx2x_queue_chk_transition()
5507 if (test_bit(RAMROD_DRV_CLR_ONLY, ¶ms->ramrod_flags)) { in bnx2x_queue_chk_transition()
5508 o->pending = 0; in bnx2x_queue_chk_transition()
5509 o->next_state = BNX2X_Q_STATE_MAX; in bnx2x_queue_chk_transition()
5515 if (o->pending) { in bnx2x_queue_chk_transition()
5517 o->pending); in bnx2x_queue_chk_transition()
5518 return -EBUSY; in bnx2x_queue_chk_transition()
5530 ¶ms->params.setup.flags)) in bnx2x_queue_chk_transition()
5558 &update_params->update_flags) && in bnx2x_queue_chk_transition()
5560 &update_params->update_flags)) in bnx2x_queue_chk_transition()
5573 next_tx_only = o->num_tx_only + 1; in bnx2x_queue_chk_transition()
5585 &update_params->update_flags) && in bnx2x_queue_chk_transition()
5587 &update_params->update_flags)) in bnx2x_queue_chk_transition()
5596 next_tx_only = o->num_tx_only - 1; in bnx2x_queue_chk_transition()
5620 &update_params->update_flags) && in bnx2x_queue_chk_transition()
5622 &update_params->update_flags)){ in bnx2x_queue_chk_transition()
5623 if (o->num_tx_only == 0) in bnx2x_queue_chk_transition()
5648 DP(BNX2X_MSG_SP, "Good state transition: %d(%d)->%d\n", in bnx2x_queue_chk_transition()
5650 o->next_state = next_state; in bnx2x_queue_chk_transition()
5651 o->next_tx_only = next_tx_only; in bnx2x_queue_chk_transition()
5657 return -EINVAL; in bnx2x_queue_chk_transition()
5671 memcpy(obj->cids, cids, sizeof(obj->cids[0]) * cid_cnt); in bnx2x_init_queue_obj()
5672 obj->max_cos = cid_cnt; in bnx2x_init_queue_obj()
5673 obj->cl_id = cl_id; in bnx2x_init_queue_obj()
5674 obj->func_id = func_id; in bnx2x_init_queue_obj()
5675 obj->rdata = rdata; in bnx2x_init_queue_obj()
5676 obj->rdata_mapping = rdata_mapping; in bnx2x_init_queue_obj()
5677 obj->type = type; in bnx2x_init_queue_obj()
5678 obj->next_state = BNX2X_Q_STATE_MAX; in bnx2x_init_queue_obj()
5681 obj->send_cmd = bnx2x_queue_send_cmd_e1x; in bnx2x_init_queue_obj()
5683 obj->send_cmd = bnx2x_queue_send_cmd_e2; in bnx2x_init_queue_obj()
5685 obj->check_transition = bnx2x_queue_chk_transition; in bnx2x_init_queue_obj()
5687 obj->complete_cmd = bnx2x_queue_comp_cmd; in bnx2x_init_queue_obj()
5688 obj->wait_comp = bnx2x_queue_wait_comp; in bnx2x_init_queue_obj()
5689 obj->set_pending = bnx2x_queue_set_pending; in bnx2x_init_queue_obj()
5696 switch (obj->state) { in bnx2x_get_q_logical_state()
5709 return -EINVAL; in bnx2x_get_q_logical_state()
5717 /* in the middle of transaction - return INVALID state */ in bnx2x_func_get_state()
5718 if (o->pending) in bnx2x_func_get_state()
5721 /* unsure the order of reading of o->pending and o->state in bnx2x_func_get_state()
5722 * o->pending should be read first in bnx2x_func_get_state()
5726 return o->state; in bnx2x_func_get_state()
5733 return bnx2x_state_wait(bp, cmd, &o->pending); in bnx2x_func_wait_comp()
5737 * bnx2x_func_state_change_comp - complete the state machine transition
5744 * machine transition only - no HW interaction.
5750 unsigned long cur_pending = o->pending; in bnx2x_func_state_change_comp()
5754 cmd, BP_FUNC(bp), o->state, in bnx2x_func_state_change_comp()
5755 cur_pending, o->next_state); in bnx2x_func_state_change_comp()
5756 return -EINVAL; in bnx2x_func_state_change_comp()
5761 cmd, BP_FUNC(bp), o->next_state); in bnx2x_func_state_change_comp()
5763 o->state = o->next_state; in bnx2x_func_state_change_comp()
5764 o->next_state = BNX2X_F_STATE_MAX; in bnx2x_func_state_change_comp()
5766 /* It's important that o->state and o->next_state are in bnx2x_func_state_change_comp()
5767 * updated before o->pending. in bnx2x_func_state_change_comp()
5771 clear_bit(cmd, &o->pending); in bnx2x_func_state_change_comp()
5778 * bnx2x_func_comp_cmd - complete the state change command
5798 * bnx2x_func_chk_transition - perform function state machine transition
5810 * -EINVAL otherwise.
5816 enum bnx2x_func_state state = o->state, next_state = BNX2X_F_STATE_MAX; in bnx2x_func_chk_transition()
5817 enum bnx2x_func_cmd cmd = params->cmd; in bnx2x_func_chk_transition()
5822 if (test_bit(RAMROD_DRV_CLR_ONLY, ¶ms->ramrod_flags)) { in bnx2x_func_chk_transition()
5823 o->pending = 0; in bnx2x_func_chk_transition()
5824 o->next_state = BNX2X_F_STATE_MAX; in bnx2x_func_chk_transition()
5830 if (o->pending) in bnx2x_func_chk_transition()
5831 return -EBUSY; in bnx2x_func_chk_transition()
5852 * for these events - next state remained STARTED. in bnx2x_func_chk_transition()
5855 (!test_bit(BNX2X_F_CMD_STOP, &o->pending))) in bnx2x_func_chk_transition()
5859 (!test_bit(BNX2X_F_CMD_STOP, &o->pending))) in bnx2x_func_chk_transition()
5866 (!test_bit(BNX2X_F_CMD_STOP, &o->pending))) in bnx2x_func_chk_transition()
5870 (!test_bit(BNX2X_F_CMD_STOP, &o->pending))) in bnx2x_func_chk_transition()
5879 (!test_bit(BNX2X_F_CMD_STOP, &o->pending))) in bnx2x_func_chk_transition()
5883 (!test_bit(BNX2X_F_CMD_STOP, &o->pending))) in bnx2x_func_chk_transition()
5896 DP(BNX2X_MSG_SP, "Good function state transition: %d(%d)->%d\n", in bnx2x_func_chk_transition()
5898 o->next_state = next_state; in bnx2x_func_chk_transition()
5905 return -EINVAL; in bnx2x_func_chk_transition()
5909 * bnx2x_func_init_func - performs HW init at function stage
5915 * FW_MSG_CODE_DRV_LOAD_FUNCTION: initialize only FUNCTION-only
5921 return drv->init_hw_func(bp); in bnx2x_func_init_func()
5925 * bnx2x_func_init_port - performs HW init at port stage
5931 * FW_MSG_CODE_DRV_LOAD_PORT: initialize PORT-only and
5932 * FUNCTION-only HW blocks.
5938 int rc = drv->init_hw_port(bp); in bnx2x_func_init_port()
5946 * bnx2x_func_init_cmn_chip - performs HW init at chip-common stage
5953 * PORT-only and FUNCTION-only HW blocks.
5958 int rc = drv->init_hw_cmn_chip(bp); in bnx2x_func_init_cmn_chip()
5966 * bnx2x_func_init_cmn - performs HW init at common stage
5973 * PORT-only and FUNCTION-only HW blocks.
5978 int rc = drv->init_hw_cmn(bp); in bnx2x_func_init_cmn()
5988 u32 load_code = params->params.hw_init.load_phase; in bnx2x_func_hw_init()
5989 struct bnx2x_func_sp_obj *o = params->f_obj; in bnx2x_func_hw_init()
5990 const struct bnx2x_func_sp_drv_ops *drv = o->drv; in bnx2x_func_hw_init()
5997 rc = drv->gunzip_init(bp); in bnx2x_func_hw_init()
6002 rc = drv->init_fw(bp); in bnx2x_func_hw_init()
6036 rc = -EINVAL; in bnx2x_func_hw_init()
6040 drv->gunzip_end(bp); in bnx2x_func_hw_init()
6046 o->complete_cmd(bp, o, BNX2X_F_CMD_HW_INIT); in bnx2x_func_hw_init()
6052 * bnx2x_func_reset_func - reset HW at function stage
6058 * FUNCTION-only HW blocks.
6063 drv->reset_hw_func(bp); in bnx2x_func_reset_func()
6067 * bnx2x_func_reset_port - reset HW at port stage
6073 * FUNCTION-only and PORT-only HW blocks.
6084 drv->reset_hw_port(bp); in bnx2x_func_reset_port()
6089 * bnx2x_func_reset_cmn - reset HW at common stage
6096 * COMMON_CHIP, FUNCTION-only and PORT-only HW blocks.
6102 drv->reset_hw_cmn(bp); in bnx2x_func_reset_cmn()
6108 u32 reset_phase = params->params.hw_reset.reset_phase; in bnx2x_func_hw_reset()
6109 struct bnx2x_func_sp_obj *o = params->f_obj; in bnx2x_func_hw_reset()
6110 const struct bnx2x_func_sp_drv_ops *drv = o->drv; in bnx2x_func_hw_reset()
6132 o->complete_cmd(bp, o, BNX2X_F_CMD_HW_RESET); in bnx2x_func_hw_reset()
6140 struct bnx2x_func_sp_obj *o = params->f_obj; in bnx2x_func_send_start()
6142 (struct function_start_data *)o->rdata; in bnx2x_func_send_start()
6143 dma_addr_t data_mapping = o->rdata_mapping; in bnx2x_func_send_start()
6144 struct bnx2x_func_start_params *start_params = ¶ms->params.start; in bnx2x_func_send_start()
6149 rdata->function_mode = (u8)start_params->mf_mode; in bnx2x_func_send_start()
6150 rdata->sd_vlan_tag = cpu_to_le16(start_params->sd_vlan_tag); in bnx2x_func_send_start()
6151 rdata->path_id = BP_PATH(bp); in bnx2x_func_send_start()
6152 rdata->network_cos_mode = start_params->network_cos_mode; in bnx2x_func_send_start()
6153 rdata->dmae_cmd_id = BNX2X_FW_DMAE_C; in bnx2x_func_send_start()
6155 rdata->vxlan_dst_port = cpu_to_le16(start_params->vxlan_dst_port); in bnx2x_func_send_start()
6156 rdata->geneve_dst_port = cpu_to_le16(start_params->geneve_dst_port); in bnx2x_func_send_start()
6157 rdata->inner_clss_l2gre = start_params->inner_clss_l2gre; in bnx2x_func_send_start()
6158 rdata->inner_clss_l2geneve = start_params->inner_clss_l2geneve; in bnx2x_func_send_start()
6159 rdata->inner_clss_vxlan = start_params->inner_clss_vxlan; in bnx2x_func_send_start()
6160 rdata->inner_rss = start_params->inner_rss; in bnx2x_func_send_start()
6162 rdata->sd_accept_mf_clss_fail = start_params->class_fail; in bnx2x_func_send_start()
6163 if (start_params->class_fail_ethtype) { in bnx2x_func_send_start()
6164 rdata->sd_accept_mf_clss_fail_match_ethtype = 1; in bnx2x_func_send_start()
6165 rdata->sd_accept_mf_clss_fail_ethtype = in bnx2x_func_send_start()
6166 cpu_to_le16(start_params->class_fail_ethtype); in bnx2x_func_send_start()
6169 rdata->sd_vlan_force_pri_flg = start_params->sd_vlan_force_pri; in bnx2x_func_send_start()
6170 rdata->sd_vlan_force_pri_val = start_params->sd_vlan_force_pri_val; in bnx2x_func_send_start()
6171 if (start_params->sd_vlan_eth_type) in bnx2x_func_send_start()
6172 rdata->sd_vlan_eth_type = in bnx2x_func_send_start()
6173 cpu_to_le16(start_params->sd_vlan_eth_type); in bnx2x_func_send_start()
6175 rdata->sd_vlan_eth_type = in bnx2x_func_send_start()
6178 rdata->no_added_tags = start_params->no_added_tags; in bnx2x_func_send_start()
6180 rdata->c2s_pri_tt_valid = start_params->c2s_pri_valid; in bnx2x_func_send_start()
6181 if (rdata->c2s_pri_tt_valid) { in bnx2x_func_send_start()
6182 memcpy(rdata->c2s_pri_trans_table.val, in bnx2x_func_send_start()
6183 start_params->c2s_pri, in bnx2x_func_send_start()
6185 rdata->c2s_pri_default = start_params->c2s_pri_default; in bnx2x_func_send_start()
6202 struct bnx2x_func_sp_obj *o = params->f_obj; in bnx2x_func_send_switch_update()
6204 (struct function_update_data *)o->rdata; in bnx2x_func_send_switch_update()
6205 dma_addr_t data_mapping = o->rdata_mapping; in bnx2x_func_send_switch_update()
6207 ¶ms->params.switch_update; in bnx2x_func_send_switch_update()
6213 &switch_update_params->changes)) { in bnx2x_func_send_switch_update()
6214 rdata->tx_switch_suspend_change_flg = 1; in bnx2x_func_send_switch_update()
6215 rdata->tx_switch_suspend = in bnx2x_func_send_switch_update()
6217 &switch_update_params->changes); in bnx2x_func_send_switch_update()
6221 &switch_update_params->changes)) { in bnx2x_func_send_switch_update()
6222 rdata->sd_vlan_tag_change_flg = 1; in bnx2x_func_send_switch_update()
6223 rdata->sd_vlan_tag = in bnx2x_func_send_switch_update()
6224 cpu_to_le16(switch_update_params->vlan); in bnx2x_func_send_switch_update()
6228 &switch_update_params->changes)) { in bnx2x_func_send_switch_update()
6229 rdata->sd_vlan_eth_type_change_flg = 1; in bnx2x_func_send_switch_update()
6230 rdata->sd_vlan_eth_type = in bnx2x_func_send_switch_update()
6231 cpu_to_le16(switch_update_params->vlan_eth_type); in bnx2x_func_send_switch_update()
6235 &switch_update_params->changes)) { in bnx2x_func_send_switch_update()
6236 rdata->sd_vlan_force_pri_change_flg = 1; in bnx2x_func_send_switch_update()
6238 &switch_update_params->changes)) in bnx2x_func_send_switch_update()
6239 rdata->sd_vlan_force_pri_flg = 1; in bnx2x_func_send_switch_update()
6240 rdata->sd_vlan_force_pri_flg = in bnx2x_func_send_switch_update()
6241 switch_update_params->vlan_force_prio; in bnx2x_func_send_switch_update()
6245 &switch_update_params->changes)) { in bnx2x_func_send_switch_update()
6246 rdata->update_tunn_cfg_flg = 1; in bnx2x_func_send_switch_update()
6248 &switch_update_params->changes)) in bnx2x_func_send_switch_update()
6249 rdata->inner_clss_l2gre = 1; in bnx2x_func_send_switch_update()
6251 &switch_update_params->changes)) in bnx2x_func_send_switch_update()
6252 rdata->inner_clss_vxlan = 1; in bnx2x_func_send_switch_update()
6254 &switch_update_params->changes)) in bnx2x_func_send_switch_update()
6255 rdata->inner_clss_l2geneve = 1; in bnx2x_func_send_switch_update()
6257 &switch_update_params->changes)) in bnx2x_func_send_switch_update()
6258 rdata->inner_rss = 1; in bnx2x_func_send_switch_update()
6259 rdata->vxlan_dst_port = in bnx2x_func_send_switch_update()
6260 cpu_to_le16(switch_update_params->vxlan_dst_port); in bnx2x_func_send_switch_update()
6261 rdata->geneve_dst_port = in bnx2x_func_send_switch_update()
6262 cpu_to_le16(switch_update_params->geneve_dst_port); in bnx2x_func_send_switch_update()
6265 rdata->echo = SWITCH_UPDATE; in bnx2x_func_send_switch_update()
6281 struct bnx2x_func_sp_obj *o = params->f_obj; in bnx2x_func_send_afex_update()
6283 (struct function_update_data *)o->afex_rdata; in bnx2x_func_send_afex_update()
6284 dma_addr_t data_mapping = o->afex_rdata_mapping; in bnx2x_func_send_afex_update()
6286 ¶ms->params.afex_update; in bnx2x_func_send_afex_update()
6291 rdata->vif_id_change_flg = 1; in bnx2x_func_send_afex_update()
6292 rdata->vif_id = cpu_to_le16(afex_update_params->vif_id); in bnx2x_func_send_afex_update()
6293 rdata->afex_default_vlan_change_flg = 1; in bnx2x_func_send_afex_update()
6294 rdata->afex_default_vlan = in bnx2x_func_send_afex_update()
6295 cpu_to_le16(afex_update_params->afex_default_vlan); in bnx2x_func_send_afex_update()
6296 rdata->allowed_priorities_change_flg = 1; in bnx2x_func_send_afex_update()
6297 rdata->allowed_priorities = afex_update_params->allowed_priorities; in bnx2x_func_send_afex_update()
6298 rdata->echo = AFEX_UPDATE; in bnx2x_func_send_afex_update()
6308 rdata->vif_id, in bnx2x_func_send_afex_update()
6309 rdata->afex_default_vlan, rdata->allowed_priorities); in bnx2x_func_send_afex_update()
6320 struct bnx2x_func_sp_obj *o = params->f_obj; in bnx2x_func_send_afex_viflists()
6322 (struct afex_vif_list_ramrod_data *)o->afex_rdata; in bnx2x_func_send_afex_viflists()
6324 ¶ms->params.afex_viflists; in bnx2x_func_send_afex_viflists()
6330 rdata->vif_list_index = cpu_to_le16(afex_vif_params->vif_list_index); in bnx2x_func_send_afex_viflists()
6331 rdata->func_bit_map = afex_vif_params->func_bit_map; in bnx2x_func_send_afex_viflists()
6332 rdata->afex_vif_list_command = afex_vif_params->afex_vif_list_command; in bnx2x_func_send_afex_viflists()
6333 rdata->func_to_clear = afex_vif_params->func_to_clear; in bnx2x_func_send_afex_viflists()
6336 rdata->echo = afex_vif_params->afex_vif_list_command; in bnx2x_func_send_afex_viflists()
6346 rdata->afex_vif_list_command, rdata->vif_list_index, in bnx2x_func_send_afex_viflists()
6347 rdata->func_bit_map, rdata->func_to_clear); in bnx2x_func_send_afex_viflists()
6371 struct bnx2x_func_sp_obj *o = params->f_obj; in bnx2x_func_send_tx_start()
6373 (struct flow_control_configuration *)o->rdata; in bnx2x_func_send_tx_start()
6374 dma_addr_t data_mapping = o->rdata_mapping; in bnx2x_func_send_tx_start()
6376 ¶ms->params.tx_start; in bnx2x_func_send_tx_start()
6381 rdata->dcb_enabled = tx_start_params->dcb_enabled; in bnx2x_func_send_tx_start()
6382 rdata->dcb_version = tx_start_params->dcb_version; in bnx2x_func_send_tx_start()
6383 rdata->dont_add_pri_0_en = tx_start_params->dont_add_pri_0_en; in bnx2x_func_send_tx_start()
6385 for (i = 0; i < ARRAY_SIZE(rdata->traffic_type_to_priority_cos); i++) in bnx2x_func_send_tx_start()
6386 rdata->traffic_type_to_priority_cos[i] = in bnx2x_func_send_tx_start()
6387 tx_start_params->traffic_type_to_priority_cos[i]; in bnx2x_func_send_tx_start()
6390 rdata->dcb_outer_pri[i] = tx_start_params->dcb_outer_pri[i]; in bnx2x_func_send_tx_start()
6406 struct bnx2x_func_sp_obj *o = params->f_obj; in bnx2x_func_send_set_timesync()
6408 (struct set_timesync_ramrod_data *)o->rdata; in bnx2x_func_send_set_timesync()
6409 dma_addr_t data_mapping = o->rdata_mapping; in bnx2x_func_send_set_timesync()
6411 ¶ms->params.set_timesync; in bnx2x_func_send_set_timesync()
6416 rdata->drift_adjust_cmd = set_timesync_params->drift_adjust_cmd; in bnx2x_func_send_set_timesync()
6417 rdata->offset_cmd = set_timesync_params->offset_cmd; in bnx2x_func_send_set_timesync()
6418 rdata->add_sub_drift_adjust_value = in bnx2x_func_send_set_timesync()
6419 set_timesync_params->add_sub_drift_adjust_value; in bnx2x_func_send_set_timesync()
6420 rdata->drift_adjust_value = set_timesync_params->drift_adjust_value; in bnx2x_func_send_set_timesync()
6421 rdata->drift_adjust_period = set_timesync_params->drift_adjust_period; in bnx2x_func_send_set_timesync()
6422 rdata->offset_delta.lo = in bnx2x_func_send_set_timesync()
6423 cpu_to_le32(U64_LO(set_timesync_params->offset_delta)); in bnx2x_func_send_set_timesync()
6424 rdata->offset_delta.hi = in bnx2x_func_send_set_timesync()
6425 cpu_to_le32(U64_HI(set_timesync_params->offset_delta)); in bnx2x_func_send_set_timesync()
6428 rdata->drift_adjust_cmd, rdata->offset_cmd, in bnx2x_func_send_set_timesync()
6429 rdata->add_sub_drift_adjust_value, rdata->drift_adjust_value, in bnx2x_func_send_set_timesync()
6430 rdata->drift_adjust_period, rdata->offset_delta.lo, in bnx2x_func_send_set_timesync()
6431 rdata->offset_delta.hi); in bnx2x_func_send_set_timesync()
6441 switch (params->cmd) { in bnx2x_func_send_cmd()
6463 BNX2X_ERR("Unknown command: %d\n", params->cmd); in bnx2x_func_send_cmd()
6464 return -EINVAL; in bnx2x_func_send_cmd()
6476 mutex_init(&obj->one_pending_mutex); in bnx2x_init_func_obj()
6478 obj->rdata = rdata; in bnx2x_init_func_obj()
6479 obj->rdata_mapping = rdata_mapping; in bnx2x_init_func_obj()
6480 obj->afex_rdata = afex_rdata; in bnx2x_init_func_obj()
6481 obj->afex_rdata_mapping = afex_rdata_mapping; in bnx2x_init_func_obj()
6482 obj->send_cmd = bnx2x_func_send_cmd; in bnx2x_init_func_obj()
6483 obj->check_transition = bnx2x_func_chk_transition; in bnx2x_init_func_obj()
6484 obj->complete_cmd = bnx2x_func_comp_cmd; in bnx2x_init_func_obj()
6485 obj->wait_comp = bnx2x_func_wait_comp; in bnx2x_init_func_obj()
6487 obj->drv = drv_iface; in bnx2x_init_func_obj()
6491 * bnx2x_func_state_change - perform Function state change transition
6500 * not set in params->ramrod_flags for asynchronous
6506 struct bnx2x_func_sp_obj *o = params->f_obj; in bnx2x_func_state_change()
6508 enum bnx2x_func_cmd cmd = params->cmd; in bnx2x_func_state_change()
6509 unsigned long *pending = &o->pending; in bnx2x_func_state_change()
6511 mutex_lock(&o->one_pending_mutex); in bnx2x_func_state_change()
6514 rc = o->check_transition(bp, o, params); in bnx2x_func_state_change()
6515 if ((rc == -EBUSY) && in bnx2x_func_state_change()
6516 (test_bit(RAMROD_RETRY, ¶ms->ramrod_flags))) { in bnx2x_func_state_change()
6517 while ((rc == -EBUSY) && (--cnt > 0)) { in bnx2x_func_state_change()
6518 mutex_unlock(&o->one_pending_mutex); in bnx2x_func_state_change()
6520 mutex_lock(&o->one_pending_mutex); in bnx2x_func_state_change()
6521 rc = o->check_transition(bp, o, params); in bnx2x_func_state_change()
6523 if (rc == -EBUSY) { in bnx2x_func_state_change()
6524 mutex_unlock(&o->one_pending_mutex); in bnx2x_func_state_change()
6529 mutex_unlock(&o->one_pending_mutex); in bnx2x_func_state_change()
6537 if (test_bit(RAMROD_DRV_CLR_ONLY, ¶ms->ramrod_flags)) { in bnx2x_func_state_change()
6539 mutex_unlock(&o->one_pending_mutex); in bnx2x_func_state_change()
6542 rc = o->send_cmd(bp, params); in bnx2x_func_state_change()
6544 mutex_unlock(&o->one_pending_mutex); in bnx2x_func_state_change()
6547 o->next_state = BNX2X_F_STATE_MAX; in bnx2x_func_state_change()
6553 if (test_bit(RAMROD_COMP_WAIT, ¶ms->ramrod_flags)) { in bnx2x_func_state_change()
6554 rc = o->wait_comp(bp, o, cmd); in bnx2x_func_state_change()