Lines Matching +full:mdi +full:- +full:x

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /* atlx_hw.h -- common hardware definitions for Attansic network drivers
4  * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
5  * Copyright(c) 2006 - 2007 Chris Snook <csnook@redhat.com>
6  * Copyright(c) 2006 - 2008 Jay Cliburn <jcliburn@gmail.com>
10  * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
149 /* IRQ Anti-Lost Timer Initial Value Register */
228 /* MAC Half-Duplex Control Register */
246 /* Wake-On-Lan control register */
331 #define MII_SR_100X_HD_CAPS		0x2000	/* 100X  Half Duplex Capable */
332 #define MII_SR_100X_FD_CAPS		0x4000	/* 100X  Full Duplex Capable */
337 #define MII_LPA_10HALF			0x0020	/* Can do 10mbps half-duplex */
338 #define MII_LPA_10FULL			0x0040	/* Can do 10mbps full-duplex */
339 #define MII_LPA_100HALF			0x0080	/* Can do 100mbps half-duplex */
340 #define MII_LPA_100FULL			0x0100	/* Can do 100mbps full-duplex */
341 #define MII_LPA_100BASE4		0x0200	/* 100BASE-T4 */
362 /* 1000BASE-T Control Register */
380 /* 1000BASE-T Status Register */
396 #define MII_ATLX_ESR_1000X_HD_CAPS	0x4000	/* 1000X HD capable */
397 #define MII_ATLX_ESR_1000X_FD_CAPS	0x8000	/* 1000X FD capable */
407 #define MII_ATLX_PSCR_MDI_MANUAL_MODE	0x0000	/* MDI Crossover Mode bits 6:5,
408 						 * Manual MDI configuration
411 #define MII_ATLX_PSCR_AUTO_X_1000T	0x0040	/* 1000BASE-T: Auto crossover
412 						 * 100BASE-TX/10BASE-T: MDI
418 							 * 10BASE-T distance
419 							 * (Lower 10BASE-T RX
421 							 * 0=Normal 10BASE-T RX
424 #define MII_ATLX_PSCR_MII_5BIT_ENABLE	0x0100	/* 1=5-Bit interface in
425 						 * 100BASE-TX
427 						 * 100BASE-TX
477 	/* op-code */