Lines Matching refs:ag
400 static bool ag71xx_is(struct ag71xx *ag, enum ag71xx_type type) in ag71xx_is() argument
402 return ag->dcfg->type == type; in ag71xx_is()
405 static void ag71xx_wr(struct ag71xx *ag, unsigned int reg, u32 value) in ag71xx_wr() argument
407 iowrite32(value, ag->mac_base + reg); in ag71xx_wr()
409 (void)ioread32(ag->mac_base + reg); in ag71xx_wr()
412 static u32 ag71xx_rr(struct ag71xx *ag, unsigned int reg) in ag71xx_rr() argument
414 return ioread32(ag->mac_base + reg); in ag71xx_rr()
417 static void ag71xx_sb(struct ag71xx *ag, unsigned int reg, u32 mask) in ag71xx_sb() argument
421 r = ag->mac_base + reg; in ag71xx_sb()
427 static void ag71xx_cb(struct ag71xx *ag, unsigned int reg, u32 mask) in ag71xx_cb() argument
431 r = ag->mac_base + reg; in ag71xx_cb()
437 static void ag71xx_int_enable(struct ag71xx *ag, u32 ints) in ag71xx_int_enable() argument
439 ag71xx_sb(ag, AG71XX_REG_INT_ENABLE, ints); in ag71xx_int_enable()
442 static void ag71xx_int_disable(struct ag71xx *ag, u32 ints) in ag71xx_int_disable() argument
444 ag71xx_cb(ag, AG71XX_REG_INT_ENABLE, ints); in ag71xx_int_disable()
449 struct ag71xx *ag = netdev_priv(ndev); in ag71xx_do_ioctl() local
451 return phylink_mii_ioctl(ag->phylink, ifr, cmd); in ag71xx_do_ioctl()
457 struct ag71xx *ag = netdev_priv(ndev); in ag71xx_get_drvinfo() local
460 strscpy(info->bus_info, of_node_full_name(ag->pdev->dev.of_node), in ag71xx_get_drvinfo()
467 struct ag71xx *ag = netdev_priv(ndev); in ag71xx_get_link_ksettings() local
469 return phylink_ethtool_ksettings_get(ag->phylink, kset); in ag71xx_get_link_ksettings()
475 struct ag71xx *ag = netdev_priv(ndev); in ag71xx_set_link_ksettings() local
477 return phylink_ethtool_ksettings_set(ag->phylink, kset); in ag71xx_set_link_ksettings()
482 struct ag71xx *ag = netdev_priv(ndev); in ag71xx_ethtool_nway_reset() local
484 return phylink_ethtool_nway_reset(ag->phylink); in ag71xx_ethtool_nway_reset()
490 struct ag71xx *ag = netdev_priv(ndev); in ag71xx_ethtool_get_pauseparam() local
492 phylink_ethtool_get_pauseparam(ag->phylink, pause); in ag71xx_ethtool_get_pauseparam()
498 struct ag71xx *ag = netdev_priv(ndev); in ag71xx_ethtool_set_pauseparam() local
500 return phylink_ethtool_set_pauseparam(ag->phylink, pause); in ag71xx_ethtool_set_pauseparam()
522 struct ag71xx *ag = netdev_priv(ndev); in ag71xx_ethtool_get_stats() local
526 *data++ = ag71xx_rr(ag, ag71xx_statistics[i].offset) in ag71xx_ethtool_get_stats()
557 static int ag71xx_mdio_wait_busy(struct ag71xx *ag) in ag71xx_mdio_wait_busy() argument
559 struct net_device *ndev = ag->ndev; in ag71xx_mdio_wait_busy()
567 busy = ag71xx_rr(ag, AG71XX_REG_MII_IND); in ag71xx_mdio_wait_busy()
574 netif_err(ag, link, ndev, "MDIO operation timed out\n"); in ag71xx_mdio_wait_busy()
581 struct ag71xx *ag = bus->priv; in ag71xx_mdio_mii_read() local
584 err = ag71xx_mdio_wait_busy(ag); in ag71xx_mdio_mii_read()
588 ag71xx_wr(ag, AG71XX_REG_MII_ADDR, in ag71xx_mdio_mii_read()
591 ag71xx_wr(ag, AG71XX_REG_MII_CMD, MII_CMD_READ); in ag71xx_mdio_mii_read()
593 err = ag71xx_mdio_wait_busy(ag); in ag71xx_mdio_mii_read()
597 val = ag71xx_rr(ag, AG71XX_REG_MII_STATUS); in ag71xx_mdio_mii_read()
599 ag71xx_wr(ag, AG71XX_REG_MII_CMD, 0); in ag71xx_mdio_mii_read()
601 netif_dbg(ag, link, ag->ndev, "mii_read: addr=%04x, reg=%04x, value=%04x\n", in ag71xx_mdio_mii_read()
610 struct ag71xx *ag = bus->priv; in ag71xx_mdio_mii_write() local
612 netif_dbg(ag, link, ag->ndev, "mii_write: addr=%04x, reg=%04x, value=%04x\n", in ag71xx_mdio_mii_write()
615 ag71xx_wr(ag, AG71XX_REG_MII_ADDR, in ag71xx_mdio_mii_write()
617 ag71xx_wr(ag, AG71XX_REG_MII_CTRL, val); in ag71xx_mdio_mii_write()
619 return ag71xx_mdio_wait_busy(ag); in ag71xx_mdio_mii_write()
634 static int ag71xx_mdio_get_divider(struct ag71xx *ag, u32 *div) in ag71xx_mdio_get_divider() argument
640 ref_clock = clk_get_rate(ag->clk_mdio); in ag71xx_mdio_get_divider()
644 if (ag71xx_is(ag, AR9330) || ag71xx_is(ag, AR9340)) { in ag71xx_mdio_get_divider()
647 } else if (ag71xx_is(ag, AR7240)) { in ag71xx_mdio_get_divider()
670 struct ag71xx *ag = bus->priv; in ag71xx_mdio_reset() local
674 err = ag71xx_mdio_get_divider(ag, &t); in ag71xx_mdio_reset()
678 ag71xx_wr(ag, AG71XX_REG_MII_CFG, t | MII_CFG_RESET); in ag71xx_mdio_reset()
681 ag71xx_wr(ag, AG71XX_REG_MII_CFG, t); in ag71xx_mdio_reset()
687 static int ag71xx_mdio_probe(struct ag71xx *ag) in ag71xx_mdio_probe() argument
689 struct device *dev = &ag->pdev->dev; in ag71xx_mdio_probe()
690 struct net_device *ndev = ag->ndev; in ag71xx_mdio_probe()
698 ag->clk_mdio = devm_clk_get_enabled(dev, "mdio"); in ag71xx_mdio_probe()
699 if (IS_ERR(ag->clk_mdio)) { in ag71xx_mdio_probe()
700 netif_err(ag, probe, ndev, "Failed to get mdio clk.\n"); in ag71xx_mdio_probe()
701 return PTR_ERR(ag->clk_mdio); in ag71xx_mdio_probe()
710 netif_err(ag, probe, ndev, "Failed to get reset mdio.\n"); in ag71xx_mdio_probe()
718 mii_bus->priv = ag; in ag71xx_mdio_probe()
720 snprintf(mii_bus->id, MII_BUS_ID_SIZE, "%s.%d", np->name, ag->mac_idx); in ag71xx_mdio_probe()
736 static void ag71xx_hw_stop(struct ag71xx *ag) in ag71xx_hw_stop() argument
739 ag71xx_wr(ag, AG71XX_REG_INT_ENABLE, 0); in ag71xx_hw_stop()
740 ag71xx_wr(ag, AG71XX_REG_RX_CTRL, 0); in ag71xx_hw_stop()
741 ag71xx_wr(ag, AG71XX_REG_TX_CTRL, 0); in ag71xx_hw_stop()
744 static bool ag71xx_check_dma_stuck(struct ag71xx *ag) in ag71xx_check_dma_stuck() argument
749 timestamp = READ_ONCE(netdev_get_tx_queue(ag->ndev, 0)->trans_start); in ag71xx_check_dma_stuck()
753 if (!netif_carrier_ok(ag->ndev)) in ag71xx_check_dma_stuck()
756 rx_sm = ag71xx_rr(ag, AG71XX_REG_RX_SM); in ag71xx_check_dma_stuck()
760 tx_sm = ag71xx_rr(ag, AG71XX_REG_TX_SM); in ag71xx_check_dma_stuck()
761 rx_fd = ag71xx_rr(ag, AG71XX_REG_FIFO_DEPTH); in ag71xx_check_dma_stuck()
769 static int ag71xx_tx_packets(struct ag71xx *ag, bool flush, int budget) in ag71xx_tx_packets() argument
771 struct ag71xx_ring *ring = &ag->tx_ring; in ag71xx_tx_packets()
773 struct net_device *ndev = ag->ndev; in ag71xx_tx_packets()
780 netif_dbg(ag, tx_queued, ndev, "processing TX ring\n"); in ag71xx_tx_packets()
792 if (ag->dcfg->tx_hang_workaround && in ag71xx_tx_packets()
793 ag71xx_check_dma_stuck(ag)) { in ag71xx_tx_packets()
794 schedule_delayed_work(&ag->restart_work, in ag71xx_tx_packets()
817 ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_PS); in ag71xx_tx_packets()
822 netif_dbg(ag, tx_done, ndev, "%d packets sent out\n", sent); in ag71xx_tx_packets()
827 ag->ndev->stats.tx_bytes += bytes_compl; in ag71xx_tx_packets()
828 ag->ndev->stats.tx_packets += sent; in ag71xx_tx_packets()
830 netdev_completed_queue(ag->ndev, sent, bytes_compl); in ag71xx_tx_packets()
832 netif_wake_queue(ag->ndev); in ag71xx_tx_packets()
835 cancel_delayed_work(&ag->restart_work); in ag71xx_tx_packets()
840 static void ag71xx_dma_wait_stop(struct ag71xx *ag) in ag71xx_dma_wait_stop() argument
842 struct net_device *ndev = ag->ndev; in ag71xx_dma_wait_stop()
850 rx = ag71xx_rr(ag, AG71XX_REG_RX_CTRL) & RX_CTRL_RXE; in ag71xx_dma_wait_stop()
851 tx = ag71xx_rr(ag, AG71XX_REG_TX_CTRL) & TX_CTRL_TXE; in ag71xx_dma_wait_stop()
856 netif_err(ag, hw, ndev, "DMA stop operation timed out\n"); in ag71xx_dma_wait_stop()
859 static void ag71xx_dma_reset(struct ag71xx *ag) in ag71xx_dma_reset() argument
861 struct net_device *ndev = ag->ndev; in ag71xx_dma_reset()
866 ag71xx_wr(ag, AG71XX_REG_RX_CTRL, 0); in ag71xx_dma_reset()
867 ag71xx_wr(ag, AG71XX_REG_TX_CTRL, 0); in ag71xx_dma_reset()
872 ag71xx_dma_wait_stop(ag); in ag71xx_dma_reset()
875 ag71xx_wr(ag, AG71XX_REG_TX_DESC, ag->stop_desc_dma); in ag71xx_dma_reset()
876 ag71xx_wr(ag, AG71XX_REG_RX_DESC, ag->stop_desc_dma); in ag71xx_dma_reset()
880 ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_PR); in ag71xx_dma_reset()
881 ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_PS); in ag71xx_dma_reset()
885 ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_BE | RX_STATUS_OF); in ag71xx_dma_reset()
886 ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_BE | TX_STATUS_UR); in ag71xx_dma_reset()
888 val = ag71xx_rr(ag, AG71XX_REG_RX_STATUS); in ag71xx_dma_reset()
890 netif_err(ag, hw, ndev, "unable to clear DMA Rx status: %08x\n", in ag71xx_dma_reset()
893 val = ag71xx_rr(ag, AG71XX_REG_TX_STATUS); in ag71xx_dma_reset()
899 netif_err(ag, hw, ndev, "unable to clear DMA Tx status: %08x\n", in ag71xx_dma_reset()
903 static void ag71xx_hw_setup(struct ag71xx *ag) in ag71xx_hw_setup() argument
908 ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, init); in ag71xx_hw_setup()
910 ag71xx_sb(ag, AG71XX_REG_MAC_CFG2, in ag71xx_hw_setup()
914 ag71xx_wr(ag, AG71XX_REG_MAC_MFL, 0); in ag71xx_hw_setup()
917 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG0, FIFO_CFG0_INIT); in ag71xx_hw_setup()
918 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG1, ag->fifodata[0]); in ag71xx_hw_setup()
919 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG2, ag->fifodata[1]); in ag71xx_hw_setup()
920 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG4, FIFO_CFG4_INIT); in ag71xx_hw_setup()
921 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, FIFO_CFG5_INIT); in ag71xx_hw_setup()
929 static void ag71xx_hw_set_macaddr(struct ag71xx *ag, const unsigned char *mac) in ag71xx_hw_set_macaddr() argument
936 ag71xx_wr(ag, AG71XX_REG_MAC_ADDR1, t); in ag71xx_hw_set_macaddr()
939 ag71xx_wr(ag, AG71XX_REG_MAC_ADDR2, t); in ag71xx_hw_set_macaddr()
942 static void ag71xx_fast_reset(struct ag71xx *ag) in ag71xx_fast_reset() argument
944 struct net_device *dev = ag->ndev; in ag71xx_fast_reset()
948 ag71xx_hw_stop(ag); in ag71xx_fast_reset()
950 mii_reg = ag71xx_rr(ag, AG71XX_REG_MII_CFG); in ag71xx_fast_reset()
951 rx_ds = ag71xx_rr(ag, AG71XX_REG_RX_DESC); in ag71xx_fast_reset()
953 ag71xx_tx_packets(ag, true, 0); in ag71xx_fast_reset()
955 reset_control_assert(ag->mac_reset); in ag71xx_fast_reset()
957 reset_control_deassert(ag->mac_reset); in ag71xx_fast_reset()
960 ag71xx_dma_reset(ag); in ag71xx_fast_reset()
961 ag71xx_hw_setup(ag); in ag71xx_fast_reset()
962 ag->tx_ring.curr = 0; in ag71xx_fast_reset()
963 ag->tx_ring.dirty = 0; in ag71xx_fast_reset()
964 netdev_reset_queue(ag->ndev); in ag71xx_fast_reset()
967 ag71xx_wr(ag, AG71XX_REG_MAC_MFL, in ag71xx_fast_reset()
968 ag71xx_max_frame_len(ag->ndev->mtu)); in ag71xx_fast_reset()
970 ag71xx_wr(ag, AG71XX_REG_RX_DESC, rx_ds); in ag71xx_fast_reset()
971 ag71xx_wr(ag, AG71XX_REG_TX_DESC, ag->tx_ring.descs_dma); in ag71xx_fast_reset()
972 ag71xx_wr(ag, AG71XX_REG_MII_CFG, mii_reg); in ag71xx_fast_reset()
974 ag71xx_hw_set_macaddr(ag, dev->dev_addr); in ag71xx_fast_reset()
977 static void ag71xx_hw_start(struct ag71xx *ag) in ag71xx_hw_start() argument
980 ag71xx_wr(ag, AG71XX_REG_RX_CTRL, RX_CTRL_RXE); in ag71xx_hw_start()
983 ag71xx_wr(ag, AG71XX_REG_INT_ENABLE, AG71XX_INT_INIT); in ag71xx_hw_start()
985 netif_wake_queue(ag->ndev); in ag71xx_hw_start()
991 struct ag71xx *ag = netdev_priv(to_net_dev(config->dev)); in ag71xx_mac_config() local
996 if (!ag71xx_is(ag, AR7100) && !ag71xx_is(ag, AR9130)) in ag71xx_mac_config()
997 ag71xx_fast_reset(ag); in ag71xx_mac_config()
999 if (ag->tx_ring.desc_split) { in ag71xx_mac_config()
1000 ag->fifodata[2] &= 0xffff; in ag71xx_mac_config()
1001 ag->fifodata[2] |= ((2048 - ag->tx_ring.desc_split) / 4) << 16; in ag71xx_mac_config()
1004 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, ag->fifodata[2]); in ag71xx_mac_config()
1010 struct ag71xx *ag = netdev_priv(to_net_dev(config->dev)); in ag71xx_mac_link_down() local
1012 ag71xx_hw_stop(ag); in ag71xx_mac_link_down()
1021 struct ag71xx *ag = netdev_priv(to_net_dev(config->dev)); in ag71xx_mac_link_up() local
1026 cfg2 = ag71xx_rr(ag, AG71XX_REG_MAC_CFG2); in ag71xx_mac_link_up()
1030 ifctl = ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL); in ag71xx_mac_link_up()
1033 fifo5 = ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5); in ag71xx_mac_link_up()
1052 ag71xx_wr(ag, AG71XX_REG_MAC_CFG2, cfg2); in ag71xx_mac_link_up()
1053 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, fifo5); in ag71xx_mac_link_up()
1054 ag71xx_wr(ag, AG71XX_REG_MAC_IFCTL, ifctl); in ag71xx_mac_link_up()
1056 cfg1 = ag71xx_rr(ag, AG71XX_REG_MAC_CFG1); in ag71xx_mac_link_up()
1063 ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, cfg1); in ag71xx_mac_link_up()
1065 ag71xx_hw_start(ag); in ag71xx_mac_link_up()
1074 static int ag71xx_phylink_setup(struct ag71xx *ag) in ag71xx_phylink_setup() argument
1078 ag->phylink_config.dev = &ag->ndev->dev; in ag71xx_phylink_setup()
1079 ag->phylink_config.type = PHYLINK_NETDEV; in ag71xx_phylink_setup()
1080 ag->phylink_config.mac_capabilities = MAC_SYM_PAUSE | MAC_ASYM_PAUSE | in ag71xx_phylink_setup()
1083 if ((ag71xx_is(ag, AR9330) && ag->mac_idx == 0) || in ag71xx_phylink_setup()
1084 ag71xx_is(ag, AR9340) || in ag71xx_phylink_setup()
1085 ag71xx_is(ag, QCA9530) || in ag71xx_phylink_setup()
1086 (ag71xx_is(ag, QCA9550) && ag->mac_idx == 1)) in ag71xx_phylink_setup()
1088 ag->phylink_config.supported_interfaces); in ag71xx_phylink_setup()
1090 if ((ag71xx_is(ag, AR9330) && ag->mac_idx == 1) || in ag71xx_phylink_setup()
1091 (ag71xx_is(ag, AR9340) && ag->mac_idx == 1) || in ag71xx_phylink_setup()
1092 (ag71xx_is(ag, QCA9530) && ag->mac_idx == 1)) in ag71xx_phylink_setup()
1094 ag->phylink_config.supported_interfaces); in ag71xx_phylink_setup()
1096 if (ag71xx_is(ag, QCA9550) && ag->mac_idx == 0) in ag71xx_phylink_setup()
1098 ag->phylink_config.supported_interfaces); in ag71xx_phylink_setup()
1100 if (ag71xx_is(ag, AR9340) && ag->mac_idx == 0) in ag71xx_phylink_setup()
1102 ag->phylink_config.supported_interfaces); in ag71xx_phylink_setup()
1104 if ((ag71xx_is(ag, AR9340) && ag->mac_idx == 0) || in ag71xx_phylink_setup()
1105 (ag71xx_is(ag, QCA9550) && ag->mac_idx == 1)) in ag71xx_phylink_setup()
1107 ag->phylink_config.supported_interfaces); in ag71xx_phylink_setup()
1109 phylink = phylink_create(&ag->phylink_config, ag->pdev->dev.fwnode, in ag71xx_phylink_setup()
1110 ag->phy_if_mode, &ag71xx_phylink_mac_ops); in ag71xx_phylink_setup()
1114 ag->phylink = phylink; in ag71xx_phylink_setup()
1118 static void ag71xx_ring_tx_clean(struct ag71xx *ag) in ag71xx_ring_tx_clean() argument
1120 struct ag71xx_ring *ring = &ag->tx_ring; in ag71xx_ring_tx_clean()
1123 struct net_device *ndev = ag->ndev; in ag71xx_ring_tx_clean()
1150 static void ag71xx_ring_tx_init(struct ag71xx *ag) in ag71xx_ring_tx_init() argument
1152 struct ag71xx_ring *ring = &ag->tx_ring; in ag71xx_ring_tx_init()
1172 netdev_reset_queue(ag->ndev); in ag71xx_ring_tx_init()
1175 static void ag71xx_ring_rx_clean(struct ag71xx *ag) in ag71xx_ring_rx_clean() argument
1177 struct ag71xx_ring *ring = &ag->rx_ring; in ag71xx_ring_rx_clean()
1186 dma_unmap_single(&ag->pdev->dev, in ag71xx_ring_rx_clean()
1188 ag->rx_buf_size, DMA_FROM_DEVICE); in ag71xx_ring_rx_clean()
1193 static int ag71xx_buffer_size(struct ag71xx *ag) in ag71xx_buffer_size() argument
1195 return ag->rx_buf_size + in ag71xx_buffer_size()
1199 static bool ag71xx_fill_rx_buf(struct ag71xx *ag, struct ag71xx_buf *buf, in ag71xx_fill_rx_buf() argument
1203 struct ag71xx_ring *ring = &ag->rx_ring; in ag71xx_fill_rx_buf()
1209 data = alloc(ag71xx_buffer_size(ag)); in ag71xx_fill_rx_buf()
1214 buf->rx.dma_addr = dma_map_single(&ag->pdev->dev, data, ag->rx_buf_size, in ag71xx_fill_rx_buf()
1216 if (dma_mapping_error(&ag->pdev->dev, buf->rx.dma_addr)) { in ag71xx_fill_rx_buf()
1225 static int ag71xx_ring_rx_init(struct ag71xx *ag) in ag71xx_ring_rx_init() argument
1227 struct ag71xx_ring *ring = &ag->rx_ring; in ag71xx_ring_rx_init()
1228 struct net_device *ndev = ag->ndev; in ag71xx_ring_rx_init()
1241 netif_dbg(ag, rx_status, ndev, "RX desc at %p, next is %08x\n", in ag71xx_ring_rx_init()
1248 if (!ag71xx_fill_rx_buf(ag, &ring->buf[i], ag->rx_buf_offset, in ag71xx_ring_rx_init()
1266 static int ag71xx_ring_rx_refill(struct ag71xx *ag) in ag71xx_ring_rx_refill() argument
1268 struct ag71xx_ring *ring = &ag->rx_ring; in ag71xx_ring_rx_refill()
1270 int offset = ag->rx_buf_offset; in ag71xx_ring_rx_refill()
1282 !ag71xx_fill_rx_buf(ag, &ring->buf[i], offset, in ag71xx_ring_rx_refill()
1293 netif_dbg(ag, rx_status, ag->ndev, "%u rx descriptors refilled\n", in ag71xx_ring_rx_refill()
1299 static int ag71xx_rings_init(struct ag71xx *ag) in ag71xx_rings_init() argument
1301 struct ag71xx_ring *tx = &ag->tx_ring; in ag71xx_rings_init()
1302 struct ag71xx_ring *rx = &ag->rx_ring; in ag71xx_rings_init()
1312 tx->descs_cpu = dma_alloc_coherent(&ag->pdev->dev, in ag71xx_rings_init()
1325 ag71xx_ring_tx_init(ag); in ag71xx_rings_init()
1326 return ag71xx_ring_rx_init(ag); in ag71xx_rings_init()
1329 static void ag71xx_rings_free(struct ag71xx *ag) in ag71xx_rings_free() argument
1331 struct ag71xx_ring *tx = &ag->tx_ring; in ag71xx_rings_free()
1332 struct ag71xx_ring *rx = &ag->rx_ring; in ag71xx_rings_free()
1338 dma_free_coherent(&ag->pdev->dev, ring_size * AG71XX_DESC_SIZE, in ag71xx_rings_free()
1349 static void ag71xx_rings_cleanup(struct ag71xx *ag) in ag71xx_rings_cleanup() argument
1351 ag71xx_ring_rx_clean(ag); in ag71xx_rings_cleanup()
1352 ag71xx_ring_tx_clean(ag); in ag71xx_rings_cleanup()
1353 ag71xx_rings_free(ag); in ag71xx_rings_cleanup()
1355 netdev_reset_queue(ag->ndev); in ag71xx_rings_cleanup()
1358 static void ag71xx_hw_init(struct ag71xx *ag) in ag71xx_hw_init() argument
1360 ag71xx_hw_stop(ag); in ag71xx_hw_init()
1362 ag71xx_sb(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_SR); in ag71xx_hw_init()
1365 reset_control_assert(ag->mac_reset); in ag71xx_hw_init()
1367 reset_control_deassert(ag->mac_reset); in ag71xx_hw_init()
1370 ag71xx_hw_setup(ag); in ag71xx_hw_init()
1372 ag71xx_dma_reset(ag); in ag71xx_hw_init()
1375 static int ag71xx_hw_enable(struct ag71xx *ag) in ag71xx_hw_enable() argument
1379 ret = ag71xx_rings_init(ag); in ag71xx_hw_enable()
1383 napi_enable(&ag->napi); in ag71xx_hw_enable()
1384 ag71xx_wr(ag, AG71XX_REG_TX_DESC, ag->tx_ring.descs_dma); in ag71xx_hw_enable()
1385 ag71xx_wr(ag, AG71XX_REG_RX_DESC, ag->rx_ring.descs_dma); in ag71xx_hw_enable()
1386 netif_start_queue(ag->ndev); in ag71xx_hw_enable()
1391 static void ag71xx_hw_disable(struct ag71xx *ag) in ag71xx_hw_disable() argument
1393 netif_stop_queue(ag->ndev); in ag71xx_hw_disable()
1395 ag71xx_hw_stop(ag); in ag71xx_hw_disable()
1396 ag71xx_dma_reset(ag); in ag71xx_hw_disable()
1398 napi_disable(&ag->napi); in ag71xx_hw_disable()
1399 timer_delete_sync(&ag->oom_timer); in ag71xx_hw_disable()
1401 ag71xx_rings_cleanup(ag); in ag71xx_hw_disable()
1406 struct ag71xx *ag = netdev_priv(ndev); in ag71xx_open() local
1410 ret = phylink_of_phy_connect(ag->phylink, ag->pdev->dev.of_node, 0); in ag71xx_open()
1412 netif_err(ag, link, ndev, "phylink_of_phy_connect filed with err: %i\n", in ag71xx_open()
1418 ag->rx_buf_size = in ag71xx_open()
1422 ag71xx_wr(ag, AG71XX_REG_MAC_MFL, max_frame_len); in ag71xx_open()
1423 ag71xx_hw_set_macaddr(ag, ndev->dev_addr); in ag71xx_open()
1425 ret = ag71xx_hw_enable(ag); in ag71xx_open()
1429 phylink_start(ag->phylink); in ag71xx_open()
1434 ag71xx_rings_cleanup(ag); in ag71xx_open()
1435 phylink_disconnect_phy(ag->phylink); in ag71xx_open()
1441 struct ag71xx *ag = netdev_priv(ndev); in ag71xx_stop() local
1443 phylink_stop(ag->phylink); in ag71xx_stop()
1444 phylink_disconnect_phy(ag->phylink); in ag71xx_stop()
1445 ag71xx_hw_disable(ag); in ag71xx_stop()
1503 struct ag71xx *ag = netdev_priv(ndev); in ag71xx_hard_start_xmit() local
1508 ring = &ag->tx_ring; in ag71xx_hard_start_xmit()
1513 netif_dbg(ag, tx_err, ndev, "packet len is too small\n"); in ag71xx_hard_start_xmit()
1517 dma_addr = dma_map_single(&ag->pdev->dev, skb->data, skb->len, in ag71xx_hard_start_xmit()
1519 if (dma_mapping_error(&ag->pdev->dev, dma_addr)) { in ag71xx_hard_start_xmit()
1520 netif_dbg(ag, tx_err, ndev, "DMA mapping error\n"); in ag71xx_hard_start_xmit()
1529 skb->len & ag->dcfg->desc_pktlen_mask); in ag71xx_hard_start_xmit()
1552 netif_dbg(ag, tx_err, ndev, "tx queue full\n"); in ag71xx_hard_start_xmit()
1556 netif_dbg(ag, tx_queued, ndev, "packet injected into TX queue\n"); in ag71xx_hard_start_xmit()
1559 ag71xx_wr(ag, AG71XX_REG_TX_CTRL, TX_CTRL_TXE); in ag71xx_hard_start_xmit()
1564 dma_unmap_single(&ag->pdev->dev, dma_addr, skb->len, DMA_TO_DEVICE); in ag71xx_hard_start_xmit()
1575 struct ag71xx *ag = timer_container_of(ag, t, oom_timer); in ag71xx_oom_timer_handler() local
1577 napi_schedule(&ag->napi); in ag71xx_oom_timer_handler()
1582 struct ag71xx *ag = netdev_priv(ndev); in ag71xx_tx_timeout() local
1584 netif_err(ag, tx_err, ndev, "tx timeout\n"); in ag71xx_tx_timeout()
1586 schedule_delayed_work(&ag->restart_work, 1); in ag71xx_tx_timeout()
1591 struct ag71xx *ag = container_of(work, struct ag71xx, in ag71xx_restart_work_func() local
1595 ag71xx_hw_disable(ag); in ag71xx_restart_work_func()
1596 ag71xx_hw_enable(ag); in ag71xx_restart_work_func()
1598 phylink_stop(ag->phylink); in ag71xx_restart_work_func()
1599 phylink_start(ag->phylink); in ag71xx_restart_work_func()
1604 static int ag71xx_rx_packets(struct ag71xx *ag, int limit) in ag71xx_rx_packets() argument
1606 struct net_device *ndev = ag->ndev; in ag71xx_rx_packets()
1613 ring = &ag->rx_ring; in ag71xx_rx_packets()
1614 pktlen_mask = ag->dcfg->desc_pktlen_mask; in ag71xx_rx_packets()
1615 offset = ag->rx_buf_offset; in ag71xx_rx_packets()
1619 netif_dbg(ag, rx_status, ndev, "rx packets, limit=%d, curr=%u, dirty=%u\n", in ag71xx_rx_packets()
1635 ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_PR); in ag71xx_rx_packets()
1640 dma_unmap_single(&ag->pdev->dev, ring->buf[i].rx.dma_addr, in ag71xx_rx_packets()
1641 ag->rx_buf_size, DMA_FROM_DEVICE); in ag71xx_rx_packets()
1646 skb = napi_build_skb(ring->buf[i].rx.rx_buf, ag71xx_buffer_size(ag)); in ag71xx_rx_packets()
1668 ag71xx_ring_rx_refill(ag); in ag71xx_rx_packets()
1672 netif_dbg(ag, rx_status, ndev, "rx finish, curr=%u, dirty=%u, done=%d\n", in ag71xx_rx_packets()
1680 struct ag71xx *ag = container_of(napi, struct ag71xx, napi); in ag71xx_poll() local
1681 struct ag71xx_ring *rx_ring = &ag->rx_ring; in ag71xx_poll()
1683 struct net_device *ndev = ag->ndev; in ag71xx_poll()
1687 tx_done = ag71xx_tx_packets(ag, false, limit); in ag71xx_poll()
1689 netif_dbg(ag, rx_status, ndev, "processing RX ring\n"); in ag71xx_poll()
1690 rx_done = ag71xx_rx_packets(ag, limit); in ag71xx_poll()
1695 status = ag71xx_rr(ag, AG71XX_REG_RX_STATUS); in ag71xx_poll()
1697 ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_OF); in ag71xx_poll()
1701 ag71xx_wr(ag, AG71XX_REG_RX_CTRL, RX_CTRL_RXE); in ag71xx_poll()
1708 status = ag71xx_rr(ag, AG71XX_REG_TX_STATUS); in ag71xx_poll()
1712 netif_dbg(ag, rx_status, ndev, "disable polling mode, rx=%d, tx=%d,limit=%d\n", in ag71xx_poll()
1718 ag71xx_int_enable(ag, AG71XX_INT_POLL); in ag71xx_poll()
1723 netif_dbg(ag, rx_status, ndev, "stay in polling mode, rx=%d, tx=%d, limit=%d\n", in ag71xx_poll()
1728 netif_err(ag, rx_err, ndev, "out of memory\n"); in ag71xx_poll()
1730 mod_timer(&ag->oom_timer, jiffies + AG71XX_OOM_REFILL); in ag71xx_poll()
1738 struct ag71xx *ag; in ag71xx_interrupt() local
1741 ag = netdev_priv(ndev); in ag71xx_interrupt()
1742 status = ag71xx_rr(ag, AG71XX_REG_INT_STATUS); in ag71xx_interrupt()
1749 ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_BE); in ag71xx_interrupt()
1750 netif_err(ag, intr, ndev, "TX BUS error\n"); in ag71xx_interrupt()
1753 ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_BE); in ag71xx_interrupt()
1754 netif_err(ag, intr, ndev, "RX BUS error\n"); in ag71xx_interrupt()
1759 ag71xx_int_disable(ag, AG71XX_INT_POLL); in ag71xx_interrupt()
1760 netif_dbg(ag, intr, ndev, "enable polling mode\n"); in ag71xx_interrupt()
1761 napi_schedule(&ag->napi); in ag71xx_interrupt()
1769 struct ag71xx *ag = netdev_priv(ndev); in ag71xx_change_mtu() local
1772 ag71xx_wr(ag, AG71XX_REG_MAC_MFL, in ag71xx_change_mtu()
1801 struct ag71xx *ag; in ag71xx_probe() local
1806 ndev = devm_alloc_etherdev(&pdev->dev, sizeof(*ag)); in ag71xx_probe()
1818 ag = netdev_priv(ndev); in ag71xx_probe()
1819 ag->mac_idx = -1; in ag71xx_probe()
1822 ag->mac_idx = i; in ag71xx_probe()
1825 if (ag->mac_idx < 0) { in ag71xx_probe()
1826 netif_err(ag, probe, ndev, "unknown mac idx\n"); in ag71xx_probe()
1837 ag->pdev = pdev; in ag71xx_probe()
1838 ag->ndev = ndev; in ag71xx_probe()
1839 ag->dcfg = dcfg; in ag71xx_probe()
1840 ag->msg_enable = netif_msg_init(-1, AG71XX_DEFAULT_MSG_ENABLE); in ag71xx_probe()
1841 memcpy(ag->fifodata, dcfg->fifodata, sizeof(ag->fifodata)); in ag71xx_probe()
1843 ag->mac_reset = devm_reset_control_get(&pdev->dev, "mac"); in ag71xx_probe()
1844 if (IS_ERR(ag->mac_reset)) in ag71xx_probe()
1845 return dev_err_probe(&pdev->dev, PTR_ERR(ag->mac_reset), in ag71xx_probe()
1848 ag->mac_base = devm_ioremap_resource(&pdev->dev, res); in ag71xx_probe()
1849 if (IS_ERR(ag->mac_base)) in ag71xx_probe()
1850 return PTR_ERR(ag->mac_base); in ag71xx_probe()
1856 ag71xx_int_disable(ag, AG71XX_INT_POLL); in ag71xx_probe()
1862 netif_err(ag, probe, ndev, "unable to request IRQ %d\n", in ag71xx_probe()
1870 INIT_DELAYED_WORK(&ag->restart_work, ag71xx_restart_work_func); in ag71xx_probe()
1871 timer_setup(&ag->oom_timer, ag71xx_oom_timer_handler, 0); in ag71xx_probe()
1874 ag->rx_ring.order = ag71xx_ring_size_order(AG71XX_RX_RING_SIZE_DEFAULT); in ag71xx_probe()
1879 ag->rx_buf_offset = NET_SKB_PAD; in ag71xx_probe()
1880 if (!ag71xx_is(ag, AR7100) && !ag71xx_is(ag, AR9130)) in ag71xx_probe()
1881 ag->rx_buf_offset += NET_IP_ALIGN; in ag71xx_probe()
1883 if (ag71xx_is(ag, AR7100)) { in ag71xx_probe()
1884 ag->tx_ring.desc_split = AG71XX_TX_RING_SPLIT; in ag71xx_probe()
1887 ag->tx_ring.order = ag71xx_ring_size_order(tx_size); in ag71xx_probe()
1889 ag->stop_desc = dmam_alloc_coherent(&pdev->dev, in ag71xx_probe()
1891 &ag->stop_desc_dma, GFP_KERNEL); in ag71xx_probe()
1892 if (!ag->stop_desc) in ag71xx_probe()
1895 ag->stop_desc->data = 0; in ag71xx_probe()
1896 ag->stop_desc->ctrl = 0; in ag71xx_probe()
1897 ag->stop_desc->next = (u32)ag->stop_desc_dma; in ag71xx_probe()
1903 netif_err(ag, probe, ndev, "invalid MAC address, using random address\n"); in ag71xx_probe()
1907 err = of_get_phy_mode(np, &ag->phy_if_mode); in ag71xx_probe()
1909 netif_err(ag, probe, ndev, "missing phy-mode property in DT\n"); in ag71xx_probe()
1913 netif_napi_add_weight(ndev, &ag->napi, ag71xx_poll, in ag71xx_probe()
1916 ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, 0); in ag71xx_probe()
1918 ag71xx_hw_init(ag); in ag71xx_probe()
1920 err = ag71xx_mdio_probe(ag); in ag71xx_probe()
1924 err = ag71xx_phylink_setup(ag); in ag71xx_probe()
1931 netif_err(ag, probe, ndev, "unable to register net device\n"); in ag71xx_probe()
1935 netif_info(ag, probe, ndev, "Atheros AG71xx at 0x%08lx, irq %d, mode:%s\n", in ag71xx_probe()
1936 (unsigned long)ag->mac_base, ndev->irq, in ag71xx_probe()
1937 phy_modes(ag->phy_if_mode)); in ag71xx_probe()