Lines Matching +full:switch +full:- +full:x +full:- +full:sgmii
1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3 * Copyright (c) 2014-2025, Advanced Micro Devices, Inc.
16 #include "xgbe-common.h"
40 /* Rate-change complete wait/retry count */
167 ((_x)->extd[XGBE_SFP_EXTD_SFF_8472] && \
168 !((_x)->extd[XGBE_SFP_EXTD_DIAG] & XGBE_SFP_EXTD_DIAG_ADDR_CHANGE))
175 #define XGBE_BEL_FUSE_VENDOR "BEL-FUSE "
176 #define XGBE_BEL_FUSE_PARTNO "1GBT-SFP06 "
197 /* Re-driver related definitions */
266 /* Re-driver support */
290 return pdata->i2c_if.i2c_xfer(pdata, i2c_op); in xgbe_phy_i2c_xfer()
296 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_redrv_write()
321 i2c_op.target = phy_data->redrv_addr; in xgbe_phy_redrv_write()
326 if ((ret == -EAGAIN) && retry--) in xgbe_phy_redrv_write()
335 i2c_op.target = phy_data->redrv_addr; in xgbe_phy_redrv_write()
340 if ((ret == -EAGAIN) && retry--) in xgbe_phy_redrv_write()
347 netif_dbg(pdata, drv, pdata->netdev, in xgbe_phy_redrv_write()
349 ret = -EIO; in xgbe_phy_redrv_write()
369 if ((ret == -EAGAIN) && retry--) in xgbe_phy_i2c_write()
391 if ((ret == -EAGAIN) && retry--) in xgbe_phy_i2c_read()
405 if ((ret == -EAGAIN) && retry--) in xgbe_phy_i2c_read()
413 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_put_mux()
417 if (phy_data->sfp_comm == XGBE_SFP_COMM_DIRECT) in xgbe_phy_sfp_put_mux()
423 i2c_op.target = phy_data->sfp_mux_address; in xgbe_phy_sfp_put_mux()
432 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_get_mux()
436 if (phy_data->sfp_comm == XGBE_SFP_COMM_DIRECT) in xgbe_phy_sfp_get_mux()
440 mux_channel = 1 << phy_data->sfp_mux_channel; in xgbe_phy_sfp_get_mux()
442 i2c_op.target = phy_data->sfp_mux_address; in xgbe_phy_sfp_get_mux()
456 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_get_comm_ownership()
472 XP_SET_BITS(mutex_id, XP_I2C_MUTEX, ID, phy_data->port_id); in xgbe_phy_get_comm_ownership()
493 netdev_err(pdata->netdev, "unable to obtain hardware mutexes\n"); in xgbe_phy_get_comm_ownership()
495 return -ETIMEDOUT; in xgbe_phy_get_comm_ownership()
501 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mdio_mii_write_c22()
503 if (phy_data->phydev_mode != XGBE_MDIO_MODE_CL22) in xgbe_phy_mdio_mii_write_c22()
504 return -EOPNOTSUPP; in xgbe_phy_mdio_mii_write_c22()
506 return pdata->hw_if.write_ext_mii_regs_c22(pdata, addr, reg, val); in xgbe_phy_mdio_mii_write_c22()
512 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mdio_mii_write_c45()
514 if (phy_data->phydev_mode != XGBE_MDIO_MODE_CL45) in xgbe_phy_mdio_mii_write_c45()
515 return -EOPNOTSUPP; in xgbe_phy_mdio_mii_write_c45()
517 return pdata->hw_if.write_ext_mii_regs_c45(pdata, addr, devad, in xgbe_phy_mdio_mii_write_c45()
546 struct xgbe_prv_data *pdata = mii->priv; in xgbe_phy_mii_write_c22()
547 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mii_write_c22()
554 if (phy_data->conn_type == XGBE_CONN_TYPE_SFP) in xgbe_phy_mii_write_c22()
556 else if (phy_data->conn_type & XGBE_CONN_TYPE_MDIO) in xgbe_phy_mii_write_c22()
559 ret = -EOPNOTSUPP; in xgbe_phy_mii_write_c22()
569 struct xgbe_prv_data *pdata = mii->priv; in xgbe_phy_mii_write_c45()
570 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mii_write_c45()
577 if (phy_data->conn_type == XGBE_CONN_TYPE_SFP) in xgbe_phy_mii_write_c45()
578 ret = -EOPNOTSUPP; in xgbe_phy_mii_write_c45()
579 else if (phy_data->conn_type & XGBE_CONN_TYPE_MDIO) in xgbe_phy_mii_write_c45()
582 ret = -EOPNOTSUPP; in xgbe_phy_mii_write_c45()
592 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mdio_mii_read_c22()
594 if (phy_data->phydev_mode != XGBE_MDIO_MODE_CL22) in xgbe_phy_mdio_mii_read_c22()
595 return -EOPNOTSUPP; in xgbe_phy_mdio_mii_read_c22()
597 return pdata->hw_if.read_ext_mii_regs_c22(pdata, addr, reg); in xgbe_phy_mdio_mii_read_c22()
603 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mdio_mii_read_c45()
605 if (phy_data->phydev_mode != XGBE_MDIO_MODE_CL45) in xgbe_phy_mdio_mii_read_c45()
606 return -EOPNOTSUPP; in xgbe_phy_mdio_mii_read_c45()
608 return pdata->hw_if.read_ext_mii_regs_c45(pdata, addr, devad, reg); in xgbe_phy_mdio_mii_read_c45()
635 struct xgbe_prv_data *pdata = mii->priv; in xgbe_phy_mii_read_c22()
636 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mii_read_c22()
643 if (phy_data->conn_type == XGBE_CONN_TYPE_SFP) in xgbe_phy_mii_read_c22()
645 else if (phy_data->conn_type & XGBE_CONN_TYPE_MDIO) in xgbe_phy_mii_read_c22()
648 ret = -EOPNOTSUPP; in xgbe_phy_mii_read_c22()
658 struct xgbe_prv_data *pdata = mii->priv; in xgbe_phy_mii_read_c45()
659 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mii_read_c45()
666 if (phy_data->conn_type == XGBE_CONN_TYPE_SFP) in xgbe_phy_mii_read_c45()
667 ret = -EOPNOTSUPP; in xgbe_phy_mii_read_c45()
668 else if (phy_data->conn_type & XGBE_CONN_TYPE_MDIO) in xgbe_phy_mii_read_c45()
671 ret = -ENOTSUPP; in xgbe_phy_mii_read_c45()
680 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_sfp_phy_settings()
681 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_phy_settings()
683 if (!phy_data->sfp_mod_absent && !phy_data->sfp_changed) in xgbe_phy_sfp_phy_settings()
688 if (phy_data->sfp_mod_absent) { in xgbe_phy_sfp_phy_settings()
689 pdata->phy.speed = SPEED_UNKNOWN; in xgbe_phy_sfp_phy_settings()
690 pdata->phy.duplex = DUPLEX_UNKNOWN; in xgbe_phy_sfp_phy_settings()
691 pdata->phy.autoneg = AUTONEG_ENABLE; in xgbe_phy_sfp_phy_settings()
692 pdata->phy.pause_autoneg = AUTONEG_ENABLE; in xgbe_phy_sfp_phy_settings()
705 switch (phy_data->sfp_base) { in xgbe_phy_sfp_phy_settings()
710 pdata->phy.speed = SPEED_UNKNOWN; in xgbe_phy_sfp_phy_settings()
711 pdata->phy.duplex = DUPLEX_UNKNOWN; in xgbe_phy_sfp_phy_settings()
712 pdata->phy.autoneg = AUTONEG_ENABLE; in xgbe_phy_sfp_phy_settings()
713 pdata->phy.pause_autoneg = AUTONEG_ENABLE; in xgbe_phy_sfp_phy_settings()
717 if (phy_data->sfp_base == XGBE_SFP_BASE_1000_T) { in xgbe_phy_sfp_phy_settings()
718 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) in xgbe_phy_sfp_phy_settings()
720 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) in xgbe_phy_sfp_phy_settings()
722 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) in xgbe_phy_sfp_phy_settings()
725 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) in xgbe_phy_sfp_phy_settings()
734 pdata->phy.speed = SPEED_10000; in xgbe_phy_sfp_phy_settings()
735 pdata->phy.duplex = DUPLEX_FULL; in xgbe_phy_sfp_phy_settings()
736 pdata->phy.autoneg = AUTONEG_DISABLE; in xgbe_phy_sfp_phy_settings()
737 pdata->phy.pause_autoneg = AUTONEG_DISABLE; in xgbe_phy_sfp_phy_settings()
738 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) { in xgbe_phy_sfp_phy_settings()
739 switch (phy_data->sfp_base) { in xgbe_phy_sfp_phy_settings()
761 pdata->phy.speed = SPEED_UNKNOWN; in xgbe_phy_sfp_phy_settings()
762 pdata->phy.duplex = DUPLEX_UNKNOWN; in xgbe_phy_sfp_phy_settings()
763 pdata->phy.autoneg = AUTONEG_DISABLE; in xgbe_phy_sfp_phy_settings()
764 pdata->phy.pause_autoneg = AUTONEG_DISABLE; in xgbe_phy_sfp_phy_settings()
768 switch (phy_data->sfp_base) { in xgbe_phy_sfp_phy_settings()
787 sfp_base = sfp_eeprom->base; in xgbe_phy_sfp_bit_rate()
789 switch (sfp_speed) { in xgbe_phy_sfp_bit_rate()
805 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_free_phy_device()
807 if (phy_data->phydev) { in xgbe_phy_free_phy_device()
808 phy_detach(phy_data->phydev); in xgbe_phy_free_phy_device()
809 phy_device_remove(phy_data->phydev); in xgbe_phy_free_phy_device()
810 phy_device_free(phy_data->phydev); in xgbe_phy_free_phy_device()
811 phy_data->phydev = NULL; in xgbe_phy_free_phy_device()
817 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_finisar_phy_quirks()
818 unsigned int phy_id = phy_data->phydev->phy_id; in xgbe_phy_finisar_phy_quirks()
820 if (phy_data->port_mode != XGBE_PORT_MODE_SFP) in xgbe_phy_finisar_phy_quirks()
826 /* Enable Base-T AN */ in xgbe_phy_finisar_phy_quirks()
827 phy_write(phy_data->phydev, 0x16, 0x0001); in xgbe_phy_finisar_phy_quirks()
828 phy_write(phy_data->phydev, 0x00, 0x9140); in xgbe_phy_finisar_phy_quirks()
829 phy_write(phy_data->phydev, 0x16, 0x0000); in xgbe_phy_finisar_phy_quirks()
831 /* Enable SGMII at 100Base-T/1000Base-T Full Duplex */ in xgbe_phy_finisar_phy_quirks()
832 phy_write(phy_data->phydev, 0x1b, 0x9084); in xgbe_phy_finisar_phy_quirks()
833 phy_write(phy_data->phydev, 0x09, 0x0e00); in xgbe_phy_finisar_phy_quirks()
834 phy_write(phy_data->phydev, 0x00, 0x8140); in xgbe_phy_finisar_phy_quirks()
835 phy_write(phy_data->phydev, 0x04, 0x0d01); in xgbe_phy_finisar_phy_quirks()
836 phy_write(phy_data->phydev, 0x00, 0x9140); in xgbe_phy_finisar_phy_quirks()
838 linkmode_copy(phy_data->phydev->supported, PHY_GBIT_FEATURES); in xgbe_phy_finisar_phy_quirks()
840 phy_support_asym_pause(phy_data->phydev); in xgbe_phy_finisar_phy_quirks()
842 netif_dbg(pdata, drv, pdata->netdev, in xgbe_phy_finisar_phy_quirks()
850 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_belfuse_phy_quirks()
851 struct xgbe_sfp_eeprom *sfp_eeprom = &phy_data->sfp_eeprom; in xgbe_phy_belfuse_phy_quirks()
852 unsigned int phy_id = phy_data->phydev->phy_id; in xgbe_phy_belfuse_phy_quirks()
855 if (phy_data->port_mode != XGBE_PORT_MODE_SFP) in xgbe_phy_belfuse_phy_quirks()
858 if (memcmp(&sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_NAME], in xgbe_phy_belfuse_phy_quirks()
862 /* For Bel-Fuse, use the extra AN flag */ in xgbe_phy_belfuse_phy_quirks()
863 pdata->an_again = 1; in xgbe_phy_belfuse_phy_quirks()
865 if (memcmp(&sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_PN], in xgbe_phy_belfuse_phy_quirks()
872 /* Reset PHY - wait for self-clearing reset bit to clear */ in xgbe_phy_belfuse_phy_quirks()
873 genphy_soft_reset(phy_data->phydev); in xgbe_phy_belfuse_phy_quirks()
876 phy_write(phy_data->phydev, 0x18, 0x7007); in xgbe_phy_belfuse_phy_quirks()
877 reg = phy_read(phy_data->phydev, 0x18); in xgbe_phy_belfuse_phy_quirks()
878 phy_write(phy_data->phydev, 0x18, reg & ~0x0080); in xgbe_phy_belfuse_phy_quirks()
881 phy_write(phy_data->phydev, 0x1c, 0x7c00); in xgbe_phy_belfuse_phy_quirks()
882 reg = phy_read(phy_data->phydev, 0x1c); in xgbe_phy_belfuse_phy_quirks()
885 phy_write(phy_data->phydev, 0x1c, 0x8000 | 0x7c00 | reg | 0x0001); in xgbe_phy_belfuse_phy_quirks()
888 reg = phy_read(phy_data->phydev, 0x00); in xgbe_phy_belfuse_phy_quirks()
889 phy_write(phy_data->phydev, 0x00, reg | 0x00800); in xgbe_phy_belfuse_phy_quirks()
891 /* Configure SGMII-to-Copper mode */ in xgbe_phy_belfuse_phy_quirks()
892 phy_write(phy_data->phydev, 0x1c, 0x7c00); in xgbe_phy_belfuse_phy_quirks()
893 reg = phy_read(phy_data->phydev, 0x1c); in xgbe_phy_belfuse_phy_quirks()
896 phy_write(phy_data->phydev, 0x1c, 0x8000 | 0x7c00 | reg | 0x0004); in xgbe_phy_belfuse_phy_quirks()
899 reg = phy_read(phy_data->phydev, 0x00); in xgbe_phy_belfuse_phy_quirks()
900 phy_write(phy_data->phydev, 0x00, reg & ~0x00800); in xgbe_phy_belfuse_phy_quirks()
903 phy_write(phy_data->phydev, 0x1c, 0x7c00); in xgbe_phy_belfuse_phy_quirks()
904 reg = phy_read(phy_data->phydev, 0x1c); in xgbe_phy_belfuse_phy_quirks()
907 phy_write(phy_data->phydev, 0x1c, 0x8000 | 0x7c00 | reg); in xgbe_phy_belfuse_phy_quirks()
910 reg = phy_read(phy_data->phydev, 0x00); in xgbe_phy_belfuse_phy_quirks()
911 phy_write(phy_data->phydev, 0x00, reg & ~0x00800); in xgbe_phy_belfuse_phy_quirks()
913 linkmode_copy(phy_data->phydev->supported, PHY_GBIT_FEATURES); in xgbe_phy_belfuse_phy_quirks()
914 phy_support_asym_pause(phy_data->phydev); in xgbe_phy_belfuse_phy_quirks()
916 netif_dbg(pdata, drv, pdata->netdev, in xgbe_phy_belfuse_phy_quirks()
933 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_find_phy_device()
934 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_find_phy_device()
939 if (phy_data->phydev) in xgbe_phy_find_phy_device()
943 pdata->an_again = 0; in xgbe_phy_find_phy_device()
946 if (phy_data->phydev_mode == XGBE_MDIO_MODE_NONE) in xgbe_phy_find_phy_device()
950 if ((phy_data->port_mode == XGBE_PORT_MODE_SFP) && in xgbe_phy_find_phy_device()
951 !phy_data->sfp_phy_avail) in xgbe_phy_find_phy_device()
955 ret = pdata->hw_if.set_ext_mii_mode(pdata, phy_data->mdio_addr, in xgbe_phy_find_phy_device()
956 phy_data->phydev_mode); in xgbe_phy_find_phy_device()
958 netdev_err(pdata->netdev, in xgbe_phy_find_phy_device()
960 phy_data->mdio_addr, phy_data->phydev_mode); in xgbe_phy_find_phy_device()
965 phydev = get_phy_device(phy_data->mii, phy_data->mdio_addr, in xgbe_phy_find_phy_device()
966 (phy_data->phydev_mode == XGBE_MDIO_MODE_CL45)); in xgbe_phy_find_phy_device()
968 netdev_err(pdata->netdev, "get_phy_device failed\n"); in xgbe_phy_find_phy_device()
969 return -ENODEV; in xgbe_phy_find_phy_device()
971 netif_dbg(pdata, drv, pdata->netdev, "external PHY id is %#010x\n", in xgbe_phy_find_phy_device()
972 phydev->phy_id); in xgbe_phy_find_phy_device()
978 netdev_err(pdata->netdev, "phy_device_register failed\n"); in xgbe_phy_find_phy_device()
983 ret = phy_attach_direct(pdata->netdev, phydev, phydev->dev_flags, in xgbe_phy_find_phy_device()
986 netdev_err(pdata->netdev, "phy_attach_direct failed\n"); in xgbe_phy_find_phy_device()
991 phy_data->phydev = phydev; in xgbe_phy_find_phy_device()
995 linkmode_and(phydev->advertising, phydev->advertising, in xgbe_phy_find_phy_device()
996 lks->link_modes.advertising); in xgbe_phy_find_phy_device()
998 phy_start_aneg(phy_data->phydev); in xgbe_phy_find_phy_device()
1005 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_external_phy()
1008 if (!phy_data->sfp_changed) in xgbe_phy_sfp_external_phy()
1011 phy_data->sfp_phy_avail = 0; in xgbe_phy_sfp_external_phy()
1013 if (phy_data->sfp_base != XGBE_SFP_BASE_1000_T) in xgbe_phy_sfp_external_phy()
1022 phy_data->sfp_phy_avail = 1; in xgbe_phy_sfp_external_phy()
1027 u8 *sfp_extd = phy_data->sfp_eeprom.extd; in xgbe_phy_check_sfp_rx_los()
1032 if (phy_data->sfp_gpio_mask & XGBE_GPIO_NO_RX_LOS) in xgbe_phy_check_sfp_rx_los()
1035 if (phy_data->sfp_gpio_inputs & (1 << phy_data->sfp_gpio_rx_los)) in xgbe_phy_check_sfp_rx_los()
1043 u8 *sfp_extd = phy_data->sfp_eeprom.extd; in xgbe_phy_check_sfp_tx_fault()
1048 if (phy_data->sfp_gpio_mask & XGBE_GPIO_NO_TX_FAULT) in xgbe_phy_check_sfp_tx_fault()
1051 if (phy_data->sfp_gpio_inputs & (1 << phy_data->sfp_gpio_tx_fault)) in xgbe_phy_check_sfp_tx_fault()
1059 if (phy_data->sfp_gpio_mask & XGBE_GPIO_NO_MOD_ABSENT) in xgbe_phy_check_sfp_mod_absent()
1062 if (phy_data->sfp_gpio_inputs & (1 << phy_data->sfp_gpio_mod_absent)) in xgbe_phy_check_sfp_mod_absent()
1070 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_parse_eeprom()
1071 struct xgbe_sfp_eeprom *sfp_eeprom = &phy_data->sfp_eeprom; in xgbe_phy_sfp_parse_eeprom()
1074 sfp_base = sfp_eeprom->base; in xgbe_phy_sfp_parse_eeprom()
1083 phy_data->sfp_tx_fault = xgbe_phy_check_sfp_tx_fault(phy_data); in xgbe_phy_sfp_parse_eeprom()
1084 phy_data->sfp_rx_los = xgbe_phy_check_sfp_rx_los(phy_data); in xgbe_phy_sfp_parse_eeprom()
1088 phy_data->sfp_cable = XGBE_SFP_CABLE_PASSIVE; in xgbe_phy_sfp_parse_eeprom()
1089 phy_data->sfp_cable_len = sfp_base[XGBE_SFP_BASE_CU_CABLE_LEN]; in xgbe_phy_sfp_parse_eeprom()
1091 phy_data->sfp_cable = XGBE_SFP_CABLE_ACTIVE; in xgbe_phy_sfp_parse_eeprom()
1093 phy_data->sfp_cable = XGBE_SFP_CABLE_FIBER; in xgbe_phy_sfp_parse_eeprom()
1097 if (phy_data->sfp_cable != XGBE_SFP_CABLE_FIBER && in xgbe_phy_sfp_parse_eeprom()
1099 phy_data->sfp_base = XGBE_SFP_BASE_10000_CR; in xgbe_phy_sfp_parse_eeprom()
1101 phy_data->sfp_base = XGBE_SFP_BASE_10000_SR; in xgbe_phy_sfp_parse_eeprom()
1103 phy_data->sfp_base = XGBE_SFP_BASE_10000_LR; in xgbe_phy_sfp_parse_eeprom()
1105 phy_data->sfp_base = XGBE_SFP_BASE_10000_LRM; in xgbe_phy_sfp_parse_eeprom()
1107 phy_data->sfp_base = XGBE_SFP_BASE_10000_ER; in xgbe_phy_sfp_parse_eeprom()
1109 phy_data->sfp_base = XGBE_SFP_BASE_1000_SX; in xgbe_phy_sfp_parse_eeprom()
1111 phy_data->sfp_base = XGBE_SFP_BASE_1000_LX; in xgbe_phy_sfp_parse_eeprom()
1113 phy_data->sfp_base = XGBE_SFP_BASE_1000_CX; in xgbe_phy_sfp_parse_eeprom()
1115 phy_data->sfp_base = XGBE_SFP_BASE_1000_T; in xgbe_phy_sfp_parse_eeprom()
1117 switch (phy_data->sfp_base) { in xgbe_phy_sfp_parse_eeprom()
1119 phy_data->sfp_speed = XGBE_SFP_SPEED_100_1000; in xgbe_phy_sfp_parse_eeprom()
1124 phy_data->sfp_speed = XGBE_SFP_SPEED_1000; in xgbe_phy_sfp_parse_eeprom()
1131 phy_data->sfp_speed = XGBE_SFP_SPEED_10000; in xgbe_phy_sfp_parse_eeprom()
1144 netif_dbg(pdata, drv, pdata->netdev, "SFP detected:\n"); in xgbe_phy_sfp_eeprom_info()
1145 memcpy(sfp_data, &sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_NAME], in xgbe_phy_sfp_eeprom_info()
1148 netif_dbg(pdata, drv, pdata->netdev, " vendor: %s\n", in xgbe_phy_sfp_eeprom_info()
1151 memcpy(sfp_data, &sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_PN], in xgbe_phy_sfp_eeprom_info()
1154 netif_dbg(pdata, drv, pdata->netdev, " part number: %s\n", in xgbe_phy_sfp_eeprom_info()
1157 memcpy(sfp_data, &sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_REV], in xgbe_phy_sfp_eeprom_info()
1160 netif_dbg(pdata, drv, pdata->netdev, " revision level: %s\n", in xgbe_phy_sfp_eeprom_info()
1163 memcpy(sfp_data, &sfp_eeprom->extd[XGBE_SFP_BASE_VENDOR_SN], in xgbe_phy_sfp_eeprom_info()
1166 netif_dbg(pdata, drv, pdata->netdev, " serial number: %s\n", in xgbe_phy_sfp_eeprom_info()
1174 for (cc = 0; len; buf++, len--) in xgbe_phy_sfp_verify_eeprom()
1182 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_read_eeprom()
1189 dev_err_once(pdata->dev, "%s: I2C error setting SFP MUX\n", in xgbe_phy_sfp_read_eeprom()
1190 netdev_name(pdata->netdev)); in xgbe_phy_sfp_read_eeprom()
1200 dev_err_once(pdata->dev, "%s: I2C error reading SFP EEPROM\n", in xgbe_phy_sfp_read_eeprom()
1201 netdev_name(pdata->netdev)); in xgbe_phy_sfp_read_eeprom()
1208 sizeof(sfp_eeprom.base) - 1)) { in xgbe_phy_sfp_read_eeprom()
1209 ret = -EINVAL; in xgbe_phy_sfp_read_eeprom()
1215 sizeof(sfp_eeprom.extd) - 1)) { in xgbe_phy_sfp_read_eeprom()
1216 ret = -EINVAL; in xgbe_phy_sfp_read_eeprom()
1221 if (memcmp(&phy_data->sfp_eeprom, &sfp_eeprom, sizeof(sfp_eeprom))) { in xgbe_phy_sfp_read_eeprom()
1222 phy_data->sfp_changed = 1; in xgbe_phy_sfp_read_eeprom()
1227 memcpy(&phy_data->sfp_eeprom, &sfp_eeprom, sizeof(sfp_eeprom)); in xgbe_phy_sfp_read_eeprom()
1231 phy_data->sfp_changed = 0; in xgbe_phy_sfp_read_eeprom()
1242 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_signals()
1248 ret = xgbe_phy_i2c_read(pdata, phy_data->sfp_gpio_address, in xgbe_phy_sfp_signals()
1252 dev_err_once(pdata->dev, "%s: I2C error reading SFP GPIOs\n", in xgbe_phy_sfp_signals()
1253 netdev_name(pdata->netdev)); in xgbe_phy_sfp_signals()
1257 phy_data->sfp_gpio_inputs = (gpio_ports[1] << 8) | gpio_ports[0]; in xgbe_phy_sfp_signals()
1259 phy_data->sfp_mod_absent = xgbe_phy_check_sfp_mod_absent(phy_data); in xgbe_phy_sfp_signals()
1264 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_mod_absent()
1268 phy_data->sfp_mod_absent = 1; in xgbe_phy_sfp_mod_absent()
1269 phy_data->sfp_phy_avail = 0; in xgbe_phy_sfp_mod_absent()
1270 memset(&phy_data->sfp_eeprom, 0, sizeof(phy_data->sfp_eeprom)); in xgbe_phy_sfp_mod_absent()
1275 phy_data->sfp_rx_los = 0; in xgbe_phy_sfp_reset()
1276 phy_data->sfp_tx_fault = 0; in xgbe_phy_sfp_reset()
1277 phy_data->sfp_mod_absent = 1; in xgbe_phy_sfp_reset()
1278 phy_data->sfp_base = XGBE_SFP_BASE_UNKNOWN; in xgbe_phy_sfp_reset()
1279 phy_data->sfp_cable = XGBE_SFP_CABLE_UNKNOWN; in xgbe_phy_sfp_reset()
1280 phy_data->sfp_speed = XGBE_SFP_SPEED_UNKNOWN; in xgbe_phy_sfp_reset()
1285 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_detect()
1297 if (phy_data->sfp_mod_absent) { in xgbe_phy_sfp_detect()
1323 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_module_eeprom()
1329 rem = eeprom->len; in xgbe_phy_module_eeprom()
1331 if (!eeprom->len) { in xgbe_phy_module_eeprom()
1332 ret = -EINVAL; in xgbe_phy_module_eeprom()
1336 if ((eeprom->offset + eeprom->len) > XGBE_SFP_EEPROM_MAX) { in xgbe_phy_module_eeprom()
1337 ret = -EINVAL; in xgbe_phy_module_eeprom()
1341 if (phy_data->port_mode != XGBE_PORT_MODE_SFP) { in xgbe_phy_module_eeprom()
1342 ret = -ENXIO; in xgbe_phy_module_eeprom()
1346 if (!netif_running(pdata->netdev)) { in xgbe_phy_module_eeprom()
1347 ret = -EIO; in xgbe_phy_module_eeprom()
1351 if (phy_data->sfp_mod_absent) { in xgbe_phy_module_eeprom()
1352 ret = -EIO; in xgbe_phy_module_eeprom()
1358 ret = -EIO; in xgbe_phy_module_eeprom()
1364 netdev_err(pdata->netdev, "I2C error setting SFP MUX\n"); in xgbe_phy_module_eeprom()
1365 ret = -EIO; in xgbe_phy_module_eeprom()
1375 netdev_err(pdata->netdev, in xgbe_phy_module_eeprom()
1377 ret = -EIO; in xgbe_phy_module_eeprom()
1391 netdev_err(pdata->netdev, in xgbe_phy_module_eeprom()
1393 ret = -EIO; in xgbe_phy_module_eeprom()
1398 for (i = 0, j = eeprom->offset; i < eeprom->len; i++, j++) { in xgbe_phy_module_eeprom()
1404 rem--; in xgbe_phy_module_eeprom()
1414 eeprom->len -= rem; in xgbe_phy_module_eeprom()
1422 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_module_info()
1424 if (phy_data->port_mode != XGBE_PORT_MODE_SFP) in xgbe_phy_module_info()
1425 return -ENXIO; in xgbe_phy_module_info()
1427 if (!netif_running(pdata->netdev)) in xgbe_phy_module_info()
1428 return -EIO; in xgbe_phy_module_info()
1430 if (phy_data->sfp_mod_absent) in xgbe_phy_module_info()
1431 return -EIO; in xgbe_phy_module_info()
1433 if (XGBE_SFP_DIAGS_SUPPORTED(&phy_data->sfp_eeprom)) { in xgbe_phy_module_info()
1434 modinfo->type = ETH_MODULE_SFF_8472; in xgbe_phy_module_info()
1435 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; in xgbe_phy_module_info()
1437 modinfo->type = ETH_MODULE_SFF_8079; in xgbe_phy_module_info()
1438 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; in xgbe_phy_module_info()
1446 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_phydev_flowctrl()
1447 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_phydev_flowctrl()
1451 pdata->phy.tx_pause = 0; in xgbe_phy_phydev_flowctrl()
1452 pdata->phy.rx_pause = 0; in xgbe_phy_phydev_flowctrl()
1454 if (!phy_data->phydev) in xgbe_phy_phydev_flowctrl()
1457 lcl_adv = linkmode_adv_to_lcl_adv_t(phy_data->phydev->advertising); in xgbe_phy_phydev_flowctrl()
1459 if (phy_data->phydev->pause) { in xgbe_phy_phydev_flowctrl()
1463 if (phy_data->phydev->asym_pause) { in xgbe_phy_phydev_flowctrl()
1470 pdata->phy.tx_pause = 1; in xgbe_phy_phydev_flowctrl()
1472 pdata->phy.rx_pause = 1; in xgbe_phy_phydev_flowctrl()
1477 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_an37_sgmii_outcome()
1484 if (pdata->phy.pause_autoneg) in xgbe_phy_an37_sgmii_outcome()
1487 switch (pdata->an_status & XGBE_SGMII_AN_LINK_SPEED) { in xgbe_phy_an37_sgmii_outcome()
1489 if (pdata->an_status & XGBE_SGMII_AN_LINK_DUPLEX) { in xgbe_phy_an37_sgmii_outcome()
1493 /* Half-duplex not supported */ in xgbe_phy_an37_sgmii_outcome()
1499 if (pdata->an_status & XGBE_SGMII_AN_LINK_DUPLEX) { in xgbe_phy_an37_sgmii_outcome()
1503 /* Half-duplex not supported */ in xgbe_phy_an37_sgmii_outcome()
1509 if (pdata->an_status & XGBE_SGMII_AN_LINK_DUPLEX) { in xgbe_phy_an37_sgmii_outcome()
1513 /* Half-duplex not supported */ in xgbe_phy_an37_sgmii_outcome()
1527 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_an37_outcome()
1542 if (pdata->phy.pause_autoneg) { in xgbe_phy_an37_outcome()
1543 /* Set flow control based on auto-negotiation result */ in xgbe_phy_an37_outcome()
1544 pdata->phy.tx_pause = 0; in xgbe_phy_an37_outcome()
1545 pdata->phy.rx_pause = 0; in xgbe_phy_an37_outcome()
1548 pdata->phy.tx_pause = 1; in xgbe_phy_an37_outcome()
1549 pdata->phy.rx_pause = 1; in xgbe_phy_an37_outcome()
1552 pdata->phy.rx_pause = 1; in xgbe_phy_an37_outcome()
1554 pdata->phy.tx_pause = 1; in xgbe_phy_an37_outcome()
1570 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_an73_redrv_outcome()
1571 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an73_redrv_outcome()
1579 if (pdata->phy.pause_autoneg) in xgbe_phy_an73_redrv_outcome()
1592 switch (phy_data->port_mode) { in xgbe_phy_an73_redrv_outcome()
1602 switch (phy_data->port_mode) { in xgbe_phy_an73_redrv_outcome()
1611 switch (phy_data->sfp_base) { in xgbe_phy_an73_redrv_outcome()
1613 if (phy_data->phydev && in xgbe_phy_an73_redrv_outcome()
1614 (phy_data->phydev->speed == SPEED_10)) in xgbe_phy_an73_redrv_outcome()
1616 else if (phy_data->phydev && in xgbe_phy_an73_redrv_outcome()
1617 (phy_data->phydev->speed == SPEED_100)) in xgbe_phy_an73_redrv_outcome()
1631 if (phy_data->phydev && in xgbe_phy_an73_redrv_outcome()
1632 (phy_data->phydev->speed == SPEED_10)) in xgbe_phy_an73_redrv_outcome()
1634 else if (phy_data->phydev && in xgbe_phy_an73_redrv_outcome()
1635 (phy_data->phydev->speed == SPEED_100)) in xgbe_phy_an73_redrv_outcome()
1656 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_an73_outcome()
1671 if (pdata->phy.pause_autoneg) { in xgbe_phy_an73_outcome()
1672 /* Set flow control based on auto-negotiation result */ in xgbe_phy_an73_outcome()
1673 pdata->phy.tx_pause = 0; in xgbe_phy_an73_outcome()
1674 pdata->phy.rx_pause = 0; in xgbe_phy_an73_outcome()
1677 pdata->phy.tx_pause = 1; in xgbe_phy_an73_outcome()
1678 pdata->phy.rx_pause = 1; in xgbe_phy_an73_outcome()
1681 pdata->phy.rx_pause = 1; in xgbe_phy_an73_outcome()
1683 pdata->phy.tx_pause = 1; in xgbe_phy_an73_outcome()
1714 switch (pdata->an_mode) { in xgbe_phy_an_outcome()
1731 struct ethtool_link_ksettings *slks = &pdata->phy.lks; in xgbe_phy_an_advertising()
1732 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an_advertising()
1736 /* Without a re-driver, just return current advertising */ in xgbe_phy_an_advertising()
1737 if (!phy_data->redrv) in xgbe_phy_an_advertising()
1740 /* With the KR re-driver we need to advertise a single speed */ in xgbe_phy_an_advertising()
1745 if (pdata->fec_ability & MDIO_PMA_10GBR_FECABLE_ABLE) in xgbe_phy_an_advertising()
1748 switch (phy_data->port_mode) { in xgbe_phy_an_advertising()
1762 if (phy_data->phydev && in xgbe_phy_an_advertising()
1763 (phy_data->phydev->speed == SPEED_10000)) in xgbe_phy_an_advertising()
1765 else if (phy_data->phydev && in xgbe_phy_an_advertising()
1766 (phy_data->phydev->speed == SPEED_2500)) in xgbe_phy_an_advertising()
1775 switch (phy_data->sfp_base) { in xgbe_phy_an_advertising()
1795 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_an_config()
1796 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an_config()
1803 if (!phy_data->phydev) in xgbe_phy_an_config()
1806 phy_data->phydev->autoneg = pdata->phy.autoneg; in xgbe_phy_an_config()
1807 linkmode_and(phy_data->phydev->advertising, in xgbe_phy_an_config()
1808 phy_data->phydev->supported, in xgbe_phy_an_config()
1809 lks->link_modes.advertising); in xgbe_phy_an_config()
1811 if (pdata->phy.autoneg != AUTONEG_ENABLE) { in xgbe_phy_an_config()
1812 phy_data->phydev->speed = pdata->phy.speed; in xgbe_phy_an_config()
1813 phy_data->phydev->duplex = pdata->phy.duplex; in xgbe_phy_an_config()
1816 ret = phy_start_aneg(phy_data->phydev); in xgbe_phy_an_config()
1823 switch (phy_data->sfp_base) { in xgbe_phy_an_sfp_mode()
1837 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an_mode()
1839 /* A KR re-driver will always require CL73 AN */ in xgbe_phy_an_mode()
1840 if (phy_data->redrv) in xgbe_phy_an_mode()
1843 switch (phy_data->port_mode) { in xgbe_phy_an_mode()
1869 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_set_redrv_mode_mdio()
1872 redrv_reg = XGBE_PHY_REDRV_MODE_REG + (phy_data->redrv_lane * 0x1000); in xgbe_phy_set_redrv_mode_mdio()
1875 return pdata->hw_if.write_ext_mii_regs_c22(pdata, phy_data->redrv_addr, in xgbe_phy_set_redrv_mode_mdio()
1882 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_set_redrv_mode_i2c()
1887 redrv_reg = XGBE_PHY_REDRV_MODE_REG + (phy_data->redrv_lane * 0x1000); in xgbe_phy_set_redrv_mode_i2c()
1896 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_set_redrv_mode()
1900 if (!phy_data->redrv) in xgbe_phy_set_redrv_mode()
1904 if ((phy_data->port_mode == XGBE_PORT_MODE_SFP) && in xgbe_phy_set_redrv_mode()
1905 (phy_data->sfp_base != XGBE_SFP_BASE_1000_CX) && in xgbe_phy_set_redrv_mode()
1906 (phy_data->sfp_base != XGBE_SFP_BASE_10000_CR)) in xgbe_phy_set_redrv_mode()
1913 if (phy_data->redrv_if) in xgbe_phy_set_redrv_mode()
1928 if (pdata->rx_adapt_retries++ >= MAX_RX_ADAPT_RETRIES) { in xgbe_set_rx_adap_mode()
1929 pdata->rx_adapt_retries = 0; in xgbe_set_rx_adap_mode()
1942 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_rx_adaptation()
1974 netif_dbg(pdata, link, pdata->netdev, "Block_lock done"); in xgbe_rx_adaptation()
1975 pdata->rx_adapt_done = true; in xgbe_rx_adaptation()
1976 pdata->mode_set = false; in xgbe_rx_adaptation()
1981 xgbe_set_rx_adap_mode(pdata, phy_data->cur_mode); in xgbe_rx_adaptation()
1994 netif_dbg(pdata, link, pdata->netdev, in xgbe_phy_rx_adaptation()
1997 if (pdata->rx_adapt_retries++ >= MAX_RX_ADAPT_RETRIES) { in xgbe_phy_rx_adaptation()
1998 pdata->rx_adapt_retries = 0; in xgbe_phy_rx_adaptation()
2025 netif_err(pdata, link, pdata->netdev, "firmware mailbox reset performed\n"); in xgbe_phy_rx_reset()
2031 /* PLL_CTRL feature needs to be enabled for fixed PHY modes (Non-Autoneg) only */ in xgbe_phy_pll_ctrl()
2032 if (pdata->phy.autoneg != AUTONEG_DISABLE) in xgbe_phy_pll_ctrl()
2050 /* Disable PLL re-initialization during FW command processing */ in xgbe_phy_perform_ratechange()
2055 netif_dbg(pdata, link, pdata->netdev, in xgbe_phy_perform_ratechange()
2071 while (wait--) { in xgbe_phy_perform_ratechange()
2078 netif_dbg(pdata, link, pdata->netdev, in xgbe_phy_perform_ratechange()
2086 if (pdata->en_rx_adap && sub_cmd == XGBE_MB_SUBCMD_RX_ADAP && in xgbe_phy_perform_ratechange()
2088 netif_dbg(pdata, link, pdata->netdev, in xgbe_phy_perform_ratechange()
2090 pdata->mode_set = true; in xgbe_phy_perform_ratechange()
2099 /* Enable PLL re-initialization, not needed for PHY Power Off and RRC cmds */ in xgbe_phy_perform_ratechange()
2110 netif_dbg(pdata, link, pdata->netdev, "receiver reset complete\n"); in xgbe_phy_rrc()
2115 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_power_off()
2120 phy_data->cur_mode = XGBE_MODE_UNKNOWN; in xgbe_phy_power_off()
2122 netif_dbg(pdata, link, pdata->netdev, "phy powered off\n"); in xgbe_phy_power_off()
2127 struct xgbe_phy_data *phy_data = pdata->phy_data; in enable_rx_adap()
2130 /* Rx-Adaptation is not supported on older platforms(< 0x30H) */ in enable_rx_adap()
2131 ver = XGMAC_GET_BITS(pdata->hw_feat.version, MAC_VR, SNPSVER); in enable_rx_adap()
2135 /* Re-driver models 4223 && 4227 do not support Rx-Adaptation */ in enable_rx_adap()
2136 if (phy_data->redrv && in enable_rx_adap()
2137 (phy_data->redrv_model == XGBE_PHY_REDRV_MODEL_4223 || in enable_rx_adap()
2138 phy_data->redrv_model == XGBE_PHY_REDRV_MODEL_4227)) in enable_rx_adap()
2141 /* 10G KR mode with AN does not support Rx-Adaptation */ in enable_rx_adap()
2143 phy_data->port_mode != XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG) in enable_rx_adap()
2146 pdata->en_rx_adap = 1; in enable_rx_adap()
2152 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfi_mode()
2157 if (phy_data->sfp_cable != XGBE_SFP_CABLE_PASSIVE) { in xgbe_phy_sfi_mode()
2158 pdata->en_rx_adap = 0; in xgbe_phy_sfi_mode()
2160 } else if ((phy_data->sfp_cable == XGBE_SFP_CABLE_PASSIVE) && in xgbe_phy_sfi_mode()
2165 if (phy_data->sfp_cable_len <= 1) in xgbe_phy_sfi_mode()
2168 else if (phy_data->sfp_cable_len <= 3) in xgbe_phy_sfi_mode()
2176 phy_data->cur_mode = XGBE_MODE_SFI; in xgbe_phy_sfi_mode()
2178 netif_dbg(pdata, link, pdata->netdev, "10GbE SFI mode set\n"); in xgbe_phy_sfi_mode()
2183 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_x_mode()
2187 /* 1G/X */ in xgbe_phy_x_mode()
2190 phy_data->cur_mode = XGBE_MODE_X; in xgbe_phy_x_mode()
2192 netif_dbg(pdata, link, pdata->netdev, "1GbE X mode set\n"); in xgbe_phy_x_mode()
2197 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sgmii_1000_mode()
2201 /* 1G/SGMII */ in xgbe_phy_sgmii_1000_mode()
2204 phy_data->cur_mode = XGBE_MODE_SGMII_1000; in xgbe_phy_sgmii_1000_mode()
2206 netif_dbg(pdata, link, pdata->netdev, "1GbE SGMII mode set\n"); in xgbe_phy_sgmii_1000_mode()
2211 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sgmii_100_mode()
2215 /* 100M/SGMII */ in xgbe_phy_sgmii_100_mode()
2218 phy_data->cur_mode = XGBE_MODE_SGMII_100; in xgbe_phy_sgmii_100_mode()
2220 netif_dbg(pdata, link, pdata->netdev, "100MbE SGMII mode set\n"); in xgbe_phy_sgmii_100_mode()
2225 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sgmii_10_mode()
2229 /* 10M/SGMII */ in xgbe_phy_sgmii_10_mode()
2232 phy_data->cur_mode = XGBE_MODE_SGMII_10; in xgbe_phy_sgmii_10_mode()
2234 netif_dbg(pdata, link, pdata->netdev, "10MbE SGMII mode set\n"); in xgbe_phy_sgmii_10_mode()
2239 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_kr_mode()
2251 phy_data->cur_mode = XGBE_MODE_KR; in xgbe_phy_kr_mode()
2253 netif_dbg(pdata, link, pdata->netdev, "10GbE KR mode set\n"); in xgbe_phy_kr_mode()
2258 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_kx_2500_mode()
2265 phy_data->cur_mode = XGBE_MODE_KX_2500; in xgbe_phy_kx_2500_mode()
2267 netif_dbg(pdata, link, pdata->netdev, "2.5GbE KX mode set\n"); in xgbe_phy_kx_2500_mode()
2272 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_kx_1000_mode()
2279 phy_data->cur_mode = XGBE_MODE_KX_1000; in xgbe_phy_kx_1000_mode()
2281 netif_dbg(pdata, link, pdata->netdev, "1GbE KX mode set\n"); in xgbe_phy_kx_1000_mode()
2286 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_cur_mode()
2288 return phy_data->cur_mode; in xgbe_phy_cur_mode()
2293 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_switch_baset_mode()
2295 /* No switching if not 10GBase-T */ in xgbe_phy_switch_baset_mode()
2296 if (phy_data->port_mode != XGBE_PORT_MODE_10GBASE_T) in xgbe_phy_switch_baset_mode()
2299 switch (xgbe_phy_cur_mode(pdata)) { in xgbe_phy_switch_baset_mode()
2319 /* If we are in KR switch to KX, and vice-versa */ in xgbe_phy_switch_bp_mode()
2320 switch (xgbe_phy_cur_mode(pdata)) { in xgbe_phy_switch_bp_mode()
2331 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_switch_mode()
2333 switch (phy_data->port_mode) { in xgbe_phy_switch_mode()
2356 switch (speed) { in xgbe_phy_get_basex_mode()
2369 switch (speed) { in xgbe_phy_get_baset_mode()
2388 switch (speed) { in xgbe_phy_get_sfp_mode()
2394 if (phy_data->sfp_base == XGBE_SFP_BASE_1000_T) in xgbe_phy_get_sfp_mode()
2408 switch (speed) { in xgbe_phy_get_bp_2500_mode()
2418 switch (speed) { in xgbe_phy_get_bp_mode()
2431 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_get_mode()
2433 switch (phy_data->port_mode) { in xgbe_phy_get_mode()
2455 switch (mode) { in xgbe_phy_set_mode()
2488 if (pdata->phy.autoneg == AUTONEG_ENABLE) { in xgbe_phy_check_mode()
2493 cur_mode = xgbe_phy_get_mode(pdata, pdata->phy.speed); in xgbe_phy_check_mode()
2504 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_use_basex_mode()
2506 switch (mode) { in xgbe_phy_use_basex_mode()
2521 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_use_baset_mode()
2523 switch (mode) { in xgbe_phy_use_baset_mode()
2547 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_use_sfp_mode()
2548 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_use_sfp_mode()
2550 switch (mode) { in xgbe_phy_use_sfp_mode()
2552 if (phy_data->sfp_base == XGBE_SFP_BASE_1000_T) in xgbe_phy_use_sfp_mode()
2557 if (phy_data->sfp_base != XGBE_SFP_BASE_1000_T) in xgbe_phy_use_sfp_mode()
2562 if (phy_data->sfp_base != XGBE_SFP_BASE_1000_T) in xgbe_phy_use_sfp_mode()
2567 if (phy_data->sfp_base != XGBE_SFP_BASE_1000_T) in xgbe_phy_use_sfp_mode()
2572 if (phy_data->sfp_mod_absent) in xgbe_phy_use_sfp_mode()
2588 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_use_bp_2500_mode()
2590 switch (mode) { in xgbe_phy_use_bp_2500_mode()
2602 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_use_bp_mode()
2604 switch (mode) { in xgbe_phy_use_bp_mode()
2618 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_use_mode()
2620 switch (phy_data->port_mode) { in xgbe_phy_use_mode()
2643 switch (speed) { in xgbe_phy_valid_speed_basex_mode()
2645 return (phy_data->port_mode == XGBE_PORT_MODE_1000BASE_X); in xgbe_phy_valid_speed_basex_mode()
2647 return (phy_data->port_mode == XGBE_PORT_MODE_10GBASE_R); in xgbe_phy_valid_speed_basex_mode()
2656 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_valid_speed_baset_mode()
2659 switch (speed) { in xgbe_phy_valid_speed_baset_mode()
2662 ver = XGMAC_GET_BITS(pdata->hw_feat.version, MAC_VR, SNPSVER); in xgbe_phy_valid_speed_baset_mode()
2668 return ((phy_data->port_mode == XGBE_PORT_MODE_10GBASE_T) || in xgbe_phy_valid_speed_baset_mode()
2669 (phy_data->port_mode == XGBE_PORT_MODE_NBASE_T)); in xgbe_phy_valid_speed_baset_mode()
2671 return (phy_data->port_mode == XGBE_PORT_MODE_10GBASE_T); in xgbe_phy_valid_speed_baset_mode()
2680 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_valid_speed_sfp_mode()
2683 switch (speed) { in xgbe_phy_valid_speed_sfp_mode()
2686 ver = XGMAC_GET_BITS(pdata->hw_feat.version, MAC_VR, SNPSVER); in xgbe_phy_valid_speed_sfp_mode()
2688 (phy_data->sfp_speed == XGBE_SFP_SPEED_100_1000)); in xgbe_phy_valid_speed_sfp_mode()
2690 return (phy_data->sfp_speed == XGBE_SFP_SPEED_100_1000); in xgbe_phy_valid_speed_sfp_mode()
2692 return ((phy_data->sfp_speed == XGBE_SFP_SPEED_100_1000) || in xgbe_phy_valid_speed_sfp_mode()
2693 (phy_data->sfp_speed == XGBE_SFP_SPEED_1000)); in xgbe_phy_valid_speed_sfp_mode()
2695 return (phy_data->sfp_speed == XGBE_SFP_SPEED_10000); in xgbe_phy_valid_speed_sfp_mode()
2703 switch (speed) { in xgbe_phy_valid_speed_bp_2500_mode()
2713 switch (speed) { in xgbe_phy_valid_speed_bp_mode()
2724 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_valid_speed()
2726 switch (phy_data->port_mode) { in xgbe_phy_valid_speed()
2748 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_link_status()
2753 if (phy_data->port_mode == XGBE_PORT_MODE_SFP) { in xgbe_phy_link_status()
2757 if (phy_data->sfp_changed) { in xgbe_phy_link_status()
2762 if (phy_data->sfp_mod_absent || phy_data->sfp_rx_los) { in xgbe_phy_link_status()
2763 if (pdata->en_rx_adap) in xgbe_phy_link_status()
2764 pdata->rx_adapt_done = false; in xgbe_phy_link_status()
2769 if (phy_data->phydev) { in xgbe_phy_link_status()
2771 ret = phy_read_status(phy_data->phydev); in xgbe_phy_link_status()
2775 if ((pdata->phy.autoneg == AUTONEG_ENABLE) && in xgbe_phy_link_status()
2776 !phy_aneg_done(phy_data->phydev)) in xgbe_phy_link_status()
2779 if (!phy_data->phydev->link) in xgbe_phy_link_status()
2792 if (!pdata->phy.link && !(reg & MDIO_STAT1_LSTATUS)) { in xgbe_phy_link_status()
2798 if (pdata->en_rx_adap) { in xgbe_phy_link_status()
2802 if ((reg & MDIO_STAT1_LSTATUS) && pdata->rx_adapt_done) in xgbe_phy_link_status()
2808 if (pdata->mode_set) { in xgbe_phy_link_status()
2811 pdata->rx_adapt_done = false; in xgbe_phy_link_status()
2812 xgbe_phy_set_mode(pdata, phy_data->cur_mode); in xgbe_phy_link_status()
2815 if (pdata->rx_adapt_done) in xgbe_phy_link_status()
2820 if (pdata->phy.autoneg == AUTONEG_ENABLE && in xgbe_phy_link_status()
2821 phy_data->port_mode == XGBE_PORT_MODE_BACKPLANE) { in xgbe_phy_link_status()
2822 if (!test_bit(XGBE_LINK_INIT, &pdata->dev_state)) { in xgbe_phy_link_status()
2823 netif_carrier_off(pdata->netdev); in xgbe_phy_link_status()
2829 if (pdata->vdata->enable_rrc && phy_data->rrc_count++ > XGBE_RRC_FREQUENCY) { in xgbe_phy_link_status()
2830 phy_data->rrc_count = 0; in xgbe_phy_link_status()
2839 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_gpio_setup()
2841 phy_data->sfp_gpio_address = XGBE_GPIO_ADDRESS_PCA9555 + in xgbe_phy_sfp_gpio_setup()
2842 XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
2845 phy_data->sfp_gpio_mask = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
2848 phy_data->sfp_gpio_rx_los = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
2850 phy_data->sfp_gpio_tx_fault = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
2852 phy_data->sfp_gpio_mod_absent = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
2854 phy_data->sfp_gpio_rate_select = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
2858 dev_dbg(pdata->dev, "SFP: gpio_address=%#x\n", in xgbe_phy_sfp_gpio_setup()
2859 phy_data->sfp_gpio_address); in xgbe_phy_sfp_gpio_setup()
2860 dev_dbg(pdata->dev, "SFP: gpio_mask=%#x\n", in xgbe_phy_sfp_gpio_setup()
2861 phy_data->sfp_gpio_mask); in xgbe_phy_sfp_gpio_setup()
2862 dev_dbg(pdata->dev, "SFP: gpio_rx_los=%u\n", in xgbe_phy_sfp_gpio_setup()
2863 phy_data->sfp_gpio_rx_los); in xgbe_phy_sfp_gpio_setup()
2864 dev_dbg(pdata->dev, "SFP: gpio_tx_fault=%u\n", in xgbe_phy_sfp_gpio_setup()
2865 phy_data->sfp_gpio_tx_fault); in xgbe_phy_sfp_gpio_setup()
2866 dev_dbg(pdata->dev, "SFP: gpio_mod_absent=%u\n", in xgbe_phy_sfp_gpio_setup()
2867 phy_data->sfp_gpio_mod_absent); in xgbe_phy_sfp_gpio_setup()
2868 dev_dbg(pdata->dev, "SFP: gpio_rate_select=%u\n", in xgbe_phy_sfp_gpio_setup()
2869 phy_data->sfp_gpio_rate_select); in xgbe_phy_sfp_gpio_setup()
2875 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_comm_setup()
2878 mux_addr_hi = XP_GET_BITS(pdata->pp4, XP_PROP_4, MUX_ADDR_HI); in xgbe_phy_sfp_comm_setup()
2879 mux_addr_lo = XP_GET_BITS(pdata->pp4, XP_PROP_4, MUX_ADDR_LO); in xgbe_phy_sfp_comm_setup()
2883 phy_data->sfp_comm = XGBE_SFP_COMM_PCA9545; in xgbe_phy_sfp_comm_setup()
2884 phy_data->sfp_mux_address = (mux_addr_hi << 2) + mux_addr_lo; in xgbe_phy_sfp_comm_setup()
2885 phy_data->sfp_mux_channel = XP_GET_BITS(pdata->pp4, XP_PROP_4, in xgbe_phy_sfp_comm_setup()
2889 dev_dbg(pdata->dev, "SFP: mux_address=%#x\n", in xgbe_phy_sfp_comm_setup()
2890 phy_data->sfp_mux_address); in xgbe_phy_sfp_comm_setup()
2891 dev_dbg(pdata->dev, "SFP: mux_channel=%u\n", in xgbe_phy_sfp_comm_setup()
2892 phy_data->sfp_mux_channel); in xgbe_phy_sfp_comm_setup()
2904 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_int_mdio_reset()
2907 ret = pdata->hw_if.set_gpio(pdata, phy_data->mdio_reset_gpio); in xgbe_phy_int_mdio_reset()
2911 ret = pdata->hw_if.clr_gpio(pdata, phy_data->mdio_reset_gpio); in xgbe_phy_int_mdio_reset()
2918 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_i2c_mdio_reset()
2924 ret = xgbe_phy_i2c_read(pdata, phy_data->mdio_reset_addr, in xgbe_phy_i2c_mdio_reset()
2936 if (phy_data->mdio_reset_gpio < 8) in xgbe_phy_i2c_mdio_reset()
2937 gpio_data[1] |= (1 << (phy_data->mdio_reset_gpio % 8)); in xgbe_phy_i2c_mdio_reset()
2939 gpio_data[2] |= (1 << (phy_data->mdio_reset_gpio % 8)); in xgbe_phy_i2c_mdio_reset()
2942 ret = xgbe_phy_i2c_write(pdata, phy_data->mdio_reset_addr, in xgbe_phy_i2c_mdio_reset()
2948 if (phy_data->mdio_reset_gpio < 8) in xgbe_phy_i2c_mdio_reset()
2949 gpio_data[1] &= ~(1 << (phy_data->mdio_reset_gpio % 8)); in xgbe_phy_i2c_mdio_reset()
2951 gpio_data[2] &= ~(1 << (phy_data->mdio_reset_gpio % 8)); in xgbe_phy_i2c_mdio_reset()
2954 ret = xgbe_phy_i2c_write(pdata, phy_data->mdio_reset_addr, in xgbe_phy_i2c_mdio_reset()
2962 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mdio_reset()
2965 if (phy_data->conn_type != XGBE_CONN_TYPE_MDIO) in xgbe_phy_mdio_reset()
2972 if (phy_data->mdio_reset == XGBE_MDIO_RESET_I2C_GPIO) in xgbe_phy_mdio_reset()
2974 else if (phy_data->mdio_reset == XGBE_MDIO_RESET_INT_GPIO) in xgbe_phy_mdio_reset()
2984 if (!phy_data->redrv) in xgbe_phy_redrv_error()
2987 if (phy_data->redrv_if >= XGBE_PHY_REDRV_IF_MAX) in xgbe_phy_redrv_error()
2990 switch (phy_data->redrv_model) { in xgbe_phy_redrv_error()
2992 if (phy_data->redrv_lane > 3) in xgbe_phy_redrv_error()
2996 if (phy_data->redrv_lane > 1) in xgbe_phy_redrv_error()
3008 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mdio_reset_setup()
3010 if (phy_data->conn_type != XGBE_CONN_TYPE_MDIO) in xgbe_phy_mdio_reset_setup()
3013 phy_data->mdio_reset = XP_GET_BITS(pdata->pp3, XP_PROP_3, MDIO_RESET); in xgbe_phy_mdio_reset_setup()
3014 switch (phy_data->mdio_reset) { in xgbe_phy_mdio_reset_setup()
3020 dev_err(pdata->dev, "unsupported MDIO reset (%#x)\n", in xgbe_phy_mdio_reset_setup()
3021 phy_data->mdio_reset); in xgbe_phy_mdio_reset_setup()
3022 return -EINVAL; in xgbe_phy_mdio_reset_setup()
3025 if (phy_data->mdio_reset == XGBE_MDIO_RESET_I2C_GPIO) { in xgbe_phy_mdio_reset_setup()
3026 phy_data->mdio_reset_addr = XGBE_GPIO_ADDRESS_PCA9555 + in xgbe_phy_mdio_reset_setup()
3027 XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_mdio_reset_setup()
3029 phy_data->mdio_reset_gpio = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_mdio_reset_setup()
3031 } else if (phy_data->mdio_reset == XGBE_MDIO_RESET_INT_GPIO) { in xgbe_phy_mdio_reset_setup()
3032 phy_data->mdio_reset_gpio = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_mdio_reset_setup()
3041 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_port_mode_mismatch()
3045 ver = XGMAC_GET_BITS(pdata->hw_feat.version, MAC_VR, SNPSVER); in xgbe_phy_port_mode_mismatch()
3046 if ((ver < 0x30 && ver != 0x21) && (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10)) in xgbe_phy_port_mode_mismatch()
3049 switch (phy_data->port_mode) { in xgbe_phy_port_mode_mismatch()
3052 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) || in xgbe_phy_port_mode_mismatch()
3053 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000)) in xgbe_phy_port_mode_mismatch()
3057 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500) in xgbe_phy_port_mode_mismatch()
3061 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) || in xgbe_phy_port_mode_mismatch()
3062 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) || in xgbe_phy_port_mode_mismatch()
3063 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000)) in xgbe_phy_port_mode_mismatch()
3067 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) in xgbe_phy_port_mode_mismatch()
3071 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) || in xgbe_phy_port_mode_mismatch()
3072 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) || in xgbe_phy_port_mode_mismatch()
3073 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) || in xgbe_phy_port_mode_mismatch()
3074 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500)) in xgbe_phy_port_mode_mismatch()
3078 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) || in xgbe_phy_port_mode_mismatch()
3079 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) || in xgbe_phy_port_mode_mismatch()
3080 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) || in xgbe_phy_port_mode_mismatch()
3081 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500) || in xgbe_phy_port_mode_mismatch()
3082 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000)) in xgbe_phy_port_mode_mismatch()
3086 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) in xgbe_phy_port_mode_mismatch()
3090 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) || in xgbe_phy_port_mode_mismatch()
3091 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) || in xgbe_phy_port_mode_mismatch()
3092 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) || in xgbe_phy_port_mode_mismatch()
3093 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000)) in xgbe_phy_port_mode_mismatch()
3105 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_conn_type_mismatch()
3107 switch (phy_data->port_mode) { in xgbe_phy_conn_type_mismatch()
3111 if (phy_data->conn_type == XGBE_CONN_TYPE_BACKPLANE) in xgbe_phy_conn_type_mismatch()
3119 if (phy_data->conn_type == XGBE_CONN_TYPE_MDIO) in xgbe_phy_conn_type_mismatch()
3123 if (phy_data->conn_type == XGBE_CONN_TYPE_SFP) in xgbe_phy_conn_type_mismatch()
3135 if (!XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_SPEEDS)) in xgbe_phy_port_enabled()
3137 if (!XP_GET_BITS(pdata->pp0, XP_PROP_0, CONN_TYPE)) in xgbe_phy_port_enabled()
3145 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_cdr_track()
3147 if (!pdata->debugfs_an_cdr_workaround) in xgbe_phy_cdr_track()
3150 if (!phy_data->phy_cdr_notrack) in xgbe_phy_cdr_track()
3153 usleep_range(phy_data->phy_cdr_delay, in xgbe_phy_cdr_track()
3154 phy_data->phy_cdr_delay + 500); in xgbe_phy_cdr_track()
3160 phy_data->phy_cdr_notrack = 0; in xgbe_phy_cdr_track()
3165 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_cdr_notrack()
3167 if (!pdata->debugfs_an_cdr_workaround) in xgbe_phy_cdr_notrack()
3170 if (phy_data->phy_cdr_notrack) in xgbe_phy_cdr_notrack()
3179 phy_data->phy_cdr_notrack = 1; in xgbe_phy_cdr_notrack()
3184 if (!pdata->debugfs_an_cdr_track_early) in xgbe_phy_kr_training_post()
3190 if (pdata->debugfs_an_cdr_track_early) in xgbe_phy_kr_training_pre()
3196 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an_post()
3198 switch (pdata->an_mode) { in xgbe_phy_an_post()
3201 if (phy_data->cur_mode != XGBE_MODE_KR) in xgbe_phy_an_post()
3206 switch (pdata->an_result) { in xgbe_phy_an_post()
3211 if (phy_data->phy_cdr_delay < XGBE_CDR_DELAY_MAX) in xgbe_phy_an_post()
3212 phy_data->phy_cdr_delay += XGBE_CDR_DELAY_INC; in xgbe_phy_an_post()
3214 phy_data->phy_cdr_delay = XGBE_CDR_DELAY_INIT; in xgbe_phy_an_post()
3225 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an_pre()
3227 switch (pdata->an_mode) { in xgbe_phy_an_pre()
3230 if (phy_data->cur_mode != XGBE_MODE_KR) in xgbe_phy_an_pre()
3242 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_stop()
3258 pdata->i2c_if.i2c_stop(pdata); in xgbe_phy_stop()
3263 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_start()
3267 ret = pdata->i2c_if.i2c_start(pdata); in xgbe_phy_start()
3271 /* Set the proper MDIO mode for the re-driver */ in xgbe_phy_start()
3272 if (phy_data->redrv && !phy_data->redrv_if) { in xgbe_phy_start()
3273 ret = pdata->hw_if.set_ext_mii_mode(pdata, phy_data->redrv_addr, in xgbe_phy_start()
3276 netdev_err(pdata->netdev, in xgbe_phy_start()
3278 phy_data->redrv_addr); in xgbe_phy_start()
3284 xgbe_phy_set_mode(pdata, phy_data->start_mode); in xgbe_phy_start()
3290 switch (phy_data->port_mode) { in xgbe_phy_start()
3306 pdata->i2c_if.i2c_stop(pdata); in xgbe_phy_start()
3313 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_reset()
3318 cur_mode = phy_data->cur_mode; in xgbe_phy_reset()
3322 if (!phy_data->phydev) in xgbe_phy_reset()
3330 return phy_init_hw(phy_data->phydev); in xgbe_phy_reset()
3335 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_exit()
3338 mdiobus_unregister(phy_data->mii); in xgbe_phy_exit()
3343 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_init()
3350 dev_info(pdata->dev, "device is not enabled\n"); in xgbe_phy_init()
3351 return -ENODEV; in xgbe_phy_init()
3355 ret = pdata->i2c_if.i2c_init(pdata); in xgbe_phy_init()
3359 phy_data = devm_kzalloc(pdata->dev, sizeof(*phy_data), GFP_KERNEL); in xgbe_phy_init()
3361 return -ENOMEM; in xgbe_phy_init()
3362 pdata->phy_data = phy_data; in xgbe_phy_init()
3364 phy_data->port_mode = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_MODE); in xgbe_phy_init()
3365 phy_data->port_id = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_ID); in xgbe_phy_init()
3366 phy_data->port_speeds = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_SPEEDS); in xgbe_phy_init()
3367 phy_data->conn_type = XP_GET_BITS(pdata->pp0, XP_PROP_0, CONN_TYPE); in xgbe_phy_init()
3368 phy_data->mdio_addr = XP_GET_BITS(pdata->pp0, XP_PROP_0, MDIO_ADDR); in xgbe_phy_init()
3370 dev_dbg(pdata->dev, "port mode=%u\n", phy_data->port_mode); in xgbe_phy_init()
3371 dev_dbg(pdata->dev, "port id=%u\n", phy_data->port_id); in xgbe_phy_init()
3372 dev_dbg(pdata->dev, "port speeds=%#x\n", phy_data->port_speeds); in xgbe_phy_init()
3373 dev_dbg(pdata->dev, "conn type=%u\n", phy_data->conn_type); in xgbe_phy_init()
3374 dev_dbg(pdata->dev, "mdio addr=%u\n", phy_data->mdio_addr); in xgbe_phy_init()
3377 phy_data->redrv = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_PRESENT); in xgbe_phy_init()
3378 phy_data->redrv_if = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_IF); in xgbe_phy_init()
3379 phy_data->redrv_addr = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_ADDR); in xgbe_phy_init()
3380 phy_data->redrv_lane = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_LANE); in xgbe_phy_init()
3381 phy_data->redrv_model = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_MODEL); in xgbe_phy_init()
3382 if (phy_data->redrv && netif_msg_probe(pdata)) { in xgbe_phy_init()
3383 dev_dbg(pdata->dev, "redrv present\n"); in xgbe_phy_init()
3384 dev_dbg(pdata->dev, "redrv i/f=%u\n", phy_data->redrv_if); in xgbe_phy_init()
3385 dev_dbg(pdata->dev, "redrv addr=%#x\n", phy_data->redrv_addr); in xgbe_phy_init()
3386 dev_dbg(pdata->dev, "redrv lane=%u\n", phy_data->redrv_lane); in xgbe_phy_init()
3387 dev_dbg(pdata->dev, "redrv model=%u\n", phy_data->redrv_model); in xgbe_phy_init()
3392 dev_err(pdata->dev, "phy mode/connection mismatch (%#x/%#x)\n", in xgbe_phy_init()
3393 phy_data->port_mode, phy_data->conn_type); in xgbe_phy_init()
3394 return -EINVAL; in xgbe_phy_init()
3399 dev_err(pdata->dev, "phy mode/speed mismatch (%#x/%#x)\n", in xgbe_phy_init()
3400 phy_data->port_mode, phy_data->port_speeds); in xgbe_phy_init()
3401 return -EINVAL; in xgbe_phy_init()
3409 /* Validate the re-driver information */ in xgbe_phy_init()
3411 dev_err(pdata->dev, "phy re-driver settings error\n"); in xgbe_phy_init()
3412 return -EINVAL; in xgbe_phy_init()
3414 pdata->kr_redrv = phy_data->redrv; in xgbe_phy_init()
3417 phy_data->cur_mode = XGBE_MODE_UNKNOWN; in xgbe_phy_init()
3422 switch (phy_data->port_mode) { in xgbe_phy_init()
3431 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) { in xgbe_phy_init()
3433 phy_data->start_mode = XGBE_MODE_KX_1000; in xgbe_phy_init()
3435 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) { in xgbe_phy_init()
3437 if (pdata->fec_ability & MDIO_PMA_10GBR_FECABLE_ABLE) in xgbe_phy_init()
3439 phy_data->start_mode = XGBE_MODE_KR; in xgbe_phy_init()
3442 phy_data->phydev_mode = XGBE_MDIO_MODE_NONE; in xgbe_phy_init()
3449 phy_data->start_mode = XGBE_MODE_KX_2500; in xgbe_phy_init()
3451 phy_data->phydev_mode = XGBE_MDIO_MODE_NONE; in xgbe_phy_init()
3454 /* MDIO 1GBase-T support */ in xgbe_phy_init()
3460 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) { in xgbe_phy_init()
3462 phy_data->start_mode = XGBE_MODE_SGMII_10; in xgbe_phy_init()
3464 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) { in xgbe_phy_init()
3466 phy_data->start_mode = XGBE_MODE_SGMII_100; in xgbe_phy_init()
3468 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) { in xgbe_phy_init()
3470 phy_data->start_mode = XGBE_MODE_SGMII_1000; in xgbe_phy_init()
3473 phy_data->phydev_mode = XGBE_MDIO_MODE_CL22; in xgbe_phy_init()
3476 /* MDIO Base-X support */ in xgbe_phy_init()
3483 phy_data->start_mode = XGBE_MODE_X; in xgbe_phy_init()
3485 phy_data->phydev_mode = XGBE_MDIO_MODE_CL22; in xgbe_phy_init()
3488 /* MDIO NBase-T support */ in xgbe_phy_init()
3494 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) { in xgbe_phy_init()
3496 phy_data->start_mode = XGBE_MODE_SGMII_10; in xgbe_phy_init()
3498 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) { in xgbe_phy_init()
3500 phy_data->start_mode = XGBE_MODE_SGMII_100; in xgbe_phy_init()
3502 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) { in xgbe_phy_init()
3504 phy_data->start_mode = XGBE_MODE_SGMII_1000; in xgbe_phy_init()
3506 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500) { in xgbe_phy_init()
3508 phy_data->start_mode = XGBE_MODE_KX_2500; in xgbe_phy_init()
3511 phy_data->phydev_mode = XGBE_MDIO_MODE_CL45; in xgbe_phy_init()
3514 /* 10GBase-T support */ in xgbe_phy_init()
3520 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) { in xgbe_phy_init()
3522 phy_data->start_mode = XGBE_MODE_SGMII_10; in xgbe_phy_init()
3524 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) { in xgbe_phy_init()
3526 phy_data->start_mode = XGBE_MODE_SGMII_100; in xgbe_phy_init()
3528 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) { in xgbe_phy_init()
3530 phy_data->start_mode = XGBE_MODE_SGMII_1000; in xgbe_phy_init()
3532 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500) { in xgbe_phy_init()
3534 phy_data->start_mode = XGBE_MODE_KX_2500; in xgbe_phy_init()
3536 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) { in xgbe_phy_init()
3538 phy_data->start_mode = XGBE_MODE_KR; in xgbe_phy_init()
3541 phy_data->phydev_mode = XGBE_MDIO_MODE_CL45; in xgbe_phy_init()
3544 /* 10GBase-R support */ in xgbe_phy_init()
3554 if (pdata->fec_ability & MDIO_PMA_10GBR_FECABLE_ABLE) in xgbe_phy_init()
3556 phy_data->start_mode = XGBE_MODE_SFI; in xgbe_phy_init()
3558 phy_data->phydev_mode = XGBE_MDIO_MODE_NONE; in xgbe_phy_init()
3568 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) in xgbe_phy_init()
3569 phy_data->start_mode = XGBE_MODE_SGMII_10; in xgbe_phy_init()
3570 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) in xgbe_phy_init()
3571 phy_data->start_mode = XGBE_MODE_SGMII_100; in xgbe_phy_init()
3572 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) in xgbe_phy_init()
3573 phy_data->start_mode = XGBE_MODE_SGMII_1000; in xgbe_phy_init()
3574 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) in xgbe_phy_init()
3575 phy_data->start_mode = XGBE_MODE_SFI; in xgbe_phy_init()
3577 phy_data->phydev_mode = XGBE_MDIO_MODE_CL22; in xgbe_phy_init()
3582 return -EINVAL; in xgbe_phy_init()
3586 dev_dbg(pdata->dev, "phy supported=0x%*pb\n", in xgbe_phy_init()
3588 lks->link_modes.supported); in xgbe_phy_init()
3590 if ((phy_data->conn_type & XGBE_CONN_TYPE_MDIO) && in xgbe_phy_init()
3591 (phy_data->phydev_mode != XGBE_MDIO_MODE_NONE)) { in xgbe_phy_init()
3592 ret = pdata->hw_if.set_ext_mii_mode(pdata, phy_data->mdio_addr, in xgbe_phy_init()
3593 phy_data->phydev_mode); in xgbe_phy_init()
3595 dev_err(pdata->dev, in xgbe_phy_init()
3597 phy_data->mdio_addr, phy_data->phydev_mode); in xgbe_phy_init()
3598 return -EINVAL; in xgbe_phy_init()
3602 if (phy_data->redrv && !phy_data->redrv_if) { in xgbe_phy_init()
3603 ret = pdata->hw_if.set_ext_mii_mode(pdata, phy_data->redrv_addr, in xgbe_phy_init()
3606 dev_err(pdata->dev, in xgbe_phy_init()
3608 phy_data->redrv_addr); in xgbe_phy_init()
3609 return -EINVAL; in xgbe_phy_init()
3613 phy_data->phy_cdr_delay = XGBE_CDR_DELAY_INIT; in xgbe_phy_init()
3616 mii = devm_mdiobus_alloc(pdata->dev); in xgbe_phy_init()
3618 dev_err(pdata->dev, "mdiobus_alloc failed\n"); in xgbe_phy_init()
3619 return -ENOMEM; in xgbe_phy_init()
3622 mii->priv = pdata; in xgbe_phy_init()
3623 mii->name = "amd-xgbe-mii"; in xgbe_phy_init()
3624 mii->read = xgbe_phy_mii_read_c22; in xgbe_phy_init()
3625 mii->write = xgbe_phy_mii_write_c22; in xgbe_phy_init()
3626 mii->read_c45 = xgbe_phy_mii_read_c45; in xgbe_phy_init()
3627 mii->write_c45 = xgbe_phy_mii_write_c45; in xgbe_phy_init()
3628 mii->parent = pdata->dev; in xgbe_phy_init()
3629 mii->phy_mask = ~0; in xgbe_phy_init()
3630 snprintf(mii->id, sizeof(mii->id), "%s", dev_name(pdata->dev)); in xgbe_phy_init()
3633 dev_err(pdata->dev, "mdiobus_register failed\n"); in xgbe_phy_init()
3636 phy_data->mii = mii; in xgbe_phy_init()
3643 struct xgbe_phy_impl_if *phy_impl = &phy_if->phy_impl; in xgbe_init_function_ptrs_phy_v2()
3645 phy_impl->init = xgbe_phy_init; in xgbe_init_function_ptrs_phy_v2()
3646 phy_impl->exit = xgbe_phy_exit; in xgbe_init_function_ptrs_phy_v2()
3648 phy_impl->reset = xgbe_phy_reset; in xgbe_init_function_ptrs_phy_v2()
3649 phy_impl->start = xgbe_phy_start; in xgbe_init_function_ptrs_phy_v2()
3650 phy_impl->stop = xgbe_phy_stop; in xgbe_init_function_ptrs_phy_v2()
3652 phy_impl->link_status = xgbe_phy_link_status; in xgbe_init_function_ptrs_phy_v2()
3654 phy_impl->valid_speed = xgbe_phy_valid_speed; in xgbe_init_function_ptrs_phy_v2()
3656 phy_impl->use_mode = xgbe_phy_use_mode; in xgbe_init_function_ptrs_phy_v2()
3657 phy_impl->set_mode = xgbe_phy_set_mode; in xgbe_init_function_ptrs_phy_v2()
3658 phy_impl->get_mode = xgbe_phy_get_mode; in xgbe_init_function_ptrs_phy_v2()
3659 phy_impl->switch_mode = xgbe_phy_switch_mode; in xgbe_init_function_ptrs_phy_v2()
3660 phy_impl->cur_mode = xgbe_phy_cur_mode; in xgbe_init_function_ptrs_phy_v2()
3662 phy_impl->an_mode = xgbe_phy_an_mode; in xgbe_init_function_ptrs_phy_v2()
3664 phy_impl->an_config = xgbe_phy_an_config; in xgbe_init_function_ptrs_phy_v2()
3666 phy_impl->an_advertising = xgbe_phy_an_advertising; in xgbe_init_function_ptrs_phy_v2()
3668 phy_impl->an_outcome = xgbe_phy_an_outcome; in xgbe_init_function_ptrs_phy_v2()
3670 phy_impl->an_pre = xgbe_phy_an_pre; in xgbe_init_function_ptrs_phy_v2()
3671 phy_impl->an_post = xgbe_phy_an_post; in xgbe_init_function_ptrs_phy_v2()
3673 phy_impl->kr_training_pre = xgbe_phy_kr_training_pre; in xgbe_init_function_ptrs_phy_v2()
3674 phy_impl->kr_training_post = xgbe_phy_kr_training_post; in xgbe_init_function_ptrs_phy_v2()
3676 phy_impl->module_info = xgbe_phy_module_info; in xgbe_init_function_ptrs_phy_v2()
3677 phy_impl->module_eeprom = xgbe_phy_module_eeprom; in xgbe_init_function_ptrs_phy_v2()