Lines Matching +full:5 +full:gbase +full:- +full:kr
125 #include "xgbe-common.h"
149 /* Rate-change complete wait/retry count */
152 /* CDR delay values for KR support (in usec) */
225 #define XGBE_SFP_BASE_10GBE_CC_LR BIT(5)
276 ((_x)->extd[XGBE_SFP_EXTD_SFF_8472] && \
277 !((_x)->extd[XGBE_SFP_EXTD_DIAG] & XGBE_SFP_EXTD_DIAG_ADDR_CHANGE))
284 #define XGBE_BEL_FUSE_VENDOR "BEL-FUSE "
285 #define XGBE_BEL_FUSE_PARTNO "1GBT-SFP06 "
306 /* Re-driver related definitions */
320 XGBE_PHY_REDRV_MODE_CX = 5,
375 /* Re-driver support */
382 /* KR AN support */
399 return pdata->i2c_if.i2c_xfer(pdata, i2c_op); in xgbe_phy_i2c_xfer()
405 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_redrv_write()
408 u8 redrv_data[5], csum; in xgbe_phy_redrv_write()
430 i2c_op.target = phy_data->redrv_addr; in xgbe_phy_redrv_write()
435 if ((ret == -EAGAIN) && retry--) in xgbe_phy_redrv_write()
444 i2c_op.target = phy_data->redrv_addr; in xgbe_phy_redrv_write()
449 if ((ret == -EAGAIN) && retry--) in xgbe_phy_redrv_write()
456 netif_dbg(pdata, drv, pdata->netdev, in xgbe_phy_redrv_write()
458 ret = -EIO; in xgbe_phy_redrv_write()
478 if ((ret == -EAGAIN) && retry--) in xgbe_phy_i2c_write()
500 if ((ret == -EAGAIN) && retry--) in xgbe_phy_i2c_read()
514 if ((ret == -EAGAIN) && retry--) in xgbe_phy_i2c_read()
522 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_put_mux()
526 if (phy_data->sfp_comm == XGBE_SFP_COMM_DIRECT) in xgbe_phy_sfp_put_mux()
532 i2c_op.target = phy_data->sfp_mux_address; in xgbe_phy_sfp_put_mux()
541 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_get_mux()
545 if (phy_data->sfp_comm == XGBE_SFP_COMM_DIRECT) in xgbe_phy_sfp_get_mux()
549 mux_channel = 1 << phy_data->sfp_mux_channel; in xgbe_phy_sfp_get_mux()
551 i2c_op.target = phy_data->sfp_mux_address; in xgbe_phy_sfp_get_mux()
565 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_get_comm_ownership()
581 XP_SET_BITS(mutex_id, XP_I2C_MUTEX, ID, phy_data->port_id); in xgbe_phy_get_comm_ownership()
584 timeout = jiffies + (5 * HZ); in xgbe_phy_get_comm_ownership()
602 netdev_err(pdata->netdev, "unable to obtain hardware mutexes\n"); in xgbe_phy_get_comm_ownership()
604 return -ETIMEDOUT; in xgbe_phy_get_comm_ownership()
610 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mdio_mii_write_c22()
612 if (phy_data->phydev_mode != XGBE_MDIO_MODE_CL22) in xgbe_phy_mdio_mii_write_c22()
613 return -EOPNOTSUPP; in xgbe_phy_mdio_mii_write_c22()
615 return pdata->hw_if.write_ext_mii_regs_c22(pdata, addr, reg, val); in xgbe_phy_mdio_mii_write_c22()
621 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mdio_mii_write_c45()
623 if (phy_data->phydev_mode != XGBE_MDIO_MODE_CL45) in xgbe_phy_mdio_mii_write_c45()
624 return -EOPNOTSUPP; in xgbe_phy_mdio_mii_write_c45()
626 return pdata->hw_if.write_ext_mii_regs_c45(pdata, addr, devad, in xgbe_phy_mdio_mii_write_c45()
655 struct xgbe_prv_data *pdata = mii->priv; in xgbe_phy_mii_write_c22()
656 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mii_write_c22()
663 if (phy_data->conn_type == XGBE_CONN_TYPE_SFP) in xgbe_phy_mii_write_c22()
665 else if (phy_data->conn_type & XGBE_CONN_TYPE_MDIO) in xgbe_phy_mii_write_c22()
668 ret = -EOPNOTSUPP; in xgbe_phy_mii_write_c22()
678 struct xgbe_prv_data *pdata = mii->priv; in xgbe_phy_mii_write_c45()
679 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mii_write_c45()
686 if (phy_data->conn_type == XGBE_CONN_TYPE_SFP) in xgbe_phy_mii_write_c45()
687 ret = -EOPNOTSUPP; in xgbe_phy_mii_write_c45()
688 else if (phy_data->conn_type & XGBE_CONN_TYPE_MDIO) in xgbe_phy_mii_write_c45()
691 ret = -EOPNOTSUPP; in xgbe_phy_mii_write_c45()
701 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mdio_mii_read_c22()
703 if (phy_data->phydev_mode != XGBE_MDIO_MODE_CL22) in xgbe_phy_mdio_mii_read_c22()
704 return -EOPNOTSUPP; in xgbe_phy_mdio_mii_read_c22()
706 return pdata->hw_if.read_ext_mii_regs_c22(pdata, addr, reg); in xgbe_phy_mdio_mii_read_c22()
712 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mdio_mii_read_c45()
714 if (phy_data->phydev_mode != XGBE_MDIO_MODE_CL45) in xgbe_phy_mdio_mii_read_c45()
715 return -EOPNOTSUPP; in xgbe_phy_mdio_mii_read_c45()
717 return pdata->hw_if.read_ext_mii_regs_c45(pdata, addr, devad, reg); in xgbe_phy_mdio_mii_read_c45()
744 struct xgbe_prv_data *pdata = mii->priv; in xgbe_phy_mii_read_c22()
745 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mii_read_c22()
752 if (phy_data->conn_type == XGBE_CONN_TYPE_SFP) in xgbe_phy_mii_read_c22()
754 else if (phy_data->conn_type & XGBE_CONN_TYPE_MDIO) in xgbe_phy_mii_read_c22()
757 ret = -EOPNOTSUPP; in xgbe_phy_mii_read_c22()
767 struct xgbe_prv_data *pdata = mii->priv; in xgbe_phy_mii_read_c45()
768 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mii_read_c45()
775 if (phy_data->conn_type == XGBE_CONN_TYPE_SFP) in xgbe_phy_mii_read_c45()
776 ret = -EOPNOTSUPP; in xgbe_phy_mii_read_c45()
777 else if (phy_data->conn_type & XGBE_CONN_TYPE_MDIO) in xgbe_phy_mii_read_c45()
780 ret = -ENOTSUPP; in xgbe_phy_mii_read_c45()
789 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_sfp_phy_settings()
790 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_phy_settings()
792 if (!phy_data->sfp_mod_absent && !phy_data->sfp_changed) in xgbe_phy_sfp_phy_settings()
797 if (phy_data->sfp_mod_absent) { in xgbe_phy_sfp_phy_settings()
798 pdata->phy.speed = SPEED_UNKNOWN; in xgbe_phy_sfp_phy_settings()
799 pdata->phy.duplex = DUPLEX_UNKNOWN; in xgbe_phy_sfp_phy_settings()
800 pdata->phy.autoneg = AUTONEG_ENABLE; in xgbe_phy_sfp_phy_settings()
801 pdata->phy.pause_autoneg = AUTONEG_ENABLE; in xgbe_phy_sfp_phy_settings()
814 switch (phy_data->sfp_base) { in xgbe_phy_sfp_phy_settings()
819 pdata->phy.speed = SPEED_UNKNOWN; in xgbe_phy_sfp_phy_settings()
820 pdata->phy.duplex = DUPLEX_UNKNOWN; in xgbe_phy_sfp_phy_settings()
821 pdata->phy.autoneg = AUTONEG_ENABLE; in xgbe_phy_sfp_phy_settings()
822 pdata->phy.pause_autoneg = AUTONEG_ENABLE; in xgbe_phy_sfp_phy_settings()
826 if (phy_data->sfp_base == XGBE_SFP_BASE_1000_T) { in xgbe_phy_sfp_phy_settings()
827 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) in xgbe_phy_sfp_phy_settings()
829 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) in xgbe_phy_sfp_phy_settings()
831 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) in xgbe_phy_sfp_phy_settings()
834 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) in xgbe_phy_sfp_phy_settings()
843 pdata->phy.speed = SPEED_10000; in xgbe_phy_sfp_phy_settings()
844 pdata->phy.duplex = DUPLEX_FULL; in xgbe_phy_sfp_phy_settings()
845 pdata->phy.autoneg = AUTONEG_DISABLE; in xgbe_phy_sfp_phy_settings()
846 pdata->phy.pause_autoneg = AUTONEG_DISABLE; in xgbe_phy_sfp_phy_settings()
847 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) { in xgbe_phy_sfp_phy_settings()
848 switch (phy_data->sfp_base) { in xgbe_phy_sfp_phy_settings()
870 pdata->phy.speed = SPEED_UNKNOWN; in xgbe_phy_sfp_phy_settings()
871 pdata->phy.duplex = DUPLEX_UNKNOWN; in xgbe_phy_sfp_phy_settings()
872 pdata->phy.autoneg = AUTONEG_DISABLE; in xgbe_phy_sfp_phy_settings()
873 pdata->phy.pause_autoneg = AUTONEG_DISABLE; in xgbe_phy_sfp_phy_settings()
877 switch (phy_data->sfp_base) { in xgbe_phy_sfp_phy_settings()
896 sfp_base = sfp_eeprom->base; in xgbe_phy_sfp_bit_rate()
914 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_free_phy_device()
916 if (phy_data->phydev) { in xgbe_phy_free_phy_device()
917 phy_detach(phy_data->phydev); in xgbe_phy_free_phy_device()
918 phy_device_remove(phy_data->phydev); in xgbe_phy_free_phy_device()
919 phy_device_free(phy_data->phydev); in xgbe_phy_free_phy_device()
920 phy_data->phydev = NULL; in xgbe_phy_free_phy_device()
927 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_finisar_phy_quirks()
928 unsigned int phy_id = phy_data->phydev->phy_id; in xgbe_phy_finisar_phy_quirks()
930 if (phy_data->port_mode != XGBE_PORT_MODE_SFP) in xgbe_phy_finisar_phy_quirks()
936 /* Enable Base-T AN */ in xgbe_phy_finisar_phy_quirks()
937 phy_write(phy_data->phydev, 0x16, 0x0001); in xgbe_phy_finisar_phy_quirks()
938 phy_write(phy_data->phydev, 0x00, 0x9140); in xgbe_phy_finisar_phy_quirks()
939 phy_write(phy_data->phydev, 0x16, 0x0000); in xgbe_phy_finisar_phy_quirks()
941 /* Enable SGMII at 100Base-T/1000Base-T Full Duplex */ in xgbe_phy_finisar_phy_quirks()
942 phy_write(phy_data->phydev, 0x1b, 0x9084); in xgbe_phy_finisar_phy_quirks()
943 phy_write(phy_data->phydev, 0x09, 0x0e00); in xgbe_phy_finisar_phy_quirks()
944 phy_write(phy_data->phydev, 0x00, 0x8140); in xgbe_phy_finisar_phy_quirks()
945 phy_write(phy_data->phydev, 0x04, 0x0d01); in xgbe_phy_finisar_phy_quirks()
946 phy_write(phy_data->phydev, 0x00, 0x9140); in xgbe_phy_finisar_phy_quirks()
955 linkmode_copy(phy_data->phydev->supported, supported); in xgbe_phy_finisar_phy_quirks()
957 phy_support_asym_pause(phy_data->phydev); in xgbe_phy_finisar_phy_quirks()
959 netif_dbg(pdata, drv, pdata->netdev, in xgbe_phy_finisar_phy_quirks()
968 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_belfuse_phy_quirks()
969 struct xgbe_sfp_eeprom *sfp_eeprom = &phy_data->sfp_eeprom; in xgbe_phy_belfuse_phy_quirks()
970 unsigned int phy_id = phy_data->phydev->phy_id; in xgbe_phy_belfuse_phy_quirks()
973 if (phy_data->port_mode != XGBE_PORT_MODE_SFP) in xgbe_phy_belfuse_phy_quirks()
976 if (memcmp(&sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_NAME], in xgbe_phy_belfuse_phy_quirks()
980 /* For Bel-Fuse, use the extra AN flag */ in xgbe_phy_belfuse_phy_quirks()
981 pdata->an_again = 1; in xgbe_phy_belfuse_phy_quirks()
983 if (memcmp(&sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_PN], in xgbe_phy_belfuse_phy_quirks()
990 /* Reset PHY - wait for self-clearing reset bit to clear */ in xgbe_phy_belfuse_phy_quirks()
991 genphy_soft_reset(phy_data->phydev); in xgbe_phy_belfuse_phy_quirks()
994 phy_write(phy_data->phydev, 0x18, 0x7007); in xgbe_phy_belfuse_phy_quirks()
995 reg = phy_read(phy_data->phydev, 0x18); in xgbe_phy_belfuse_phy_quirks()
996 phy_write(phy_data->phydev, 0x18, reg & ~0x0080); in xgbe_phy_belfuse_phy_quirks()
999 phy_write(phy_data->phydev, 0x1c, 0x7c00); in xgbe_phy_belfuse_phy_quirks()
1000 reg = phy_read(phy_data->phydev, 0x1c); in xgbe_phy_belfuse_phy_quirks()
1003 phy_write(phy_data->phydev, 0x1c, 0x8000 | 0x7c00 | reg | 0x0001); in xgbe_phy_belfuse_phy_quirks()
1006 reg = phy_read(phy_data->phydev, 0x00); in xgbe_phy_belfuse_phy_quirks()
1007 phy_write(phy_data->phydev, 0x00, reg | 0x00800); in xgbe_phy_belfuse_phy_quirks()
1009 /* Configure SGMII-to-Copper mode */ in xgbe_phy_belfuse_phy_quirks()
1010 phy_write(phy_data->phydev, 0x1c, 0x7c00); in xgbe_phy_belfuse_phy_quirks()
1011 reg = phy_read(phy_data->phydev, 0x1c); in xgbe_phy_belfuse_phy_quirks()
1014 phy_write(phy_data->phydev, 0x1c, 0x8000 | 0x7c00 | reg | 0x0004); in xgbe_phy_belfuse_phy_quirks()
1017 reg = phy_read(phy_data->phydev, 0x00); in xgbe_phy_belfuse_phy_quirks()
1018 phy_write(phy_data->phydev, 0x00, reg & ~0x00800); in xgbe_phy_belfuse_phy_quirks()
1021 phy_write(phy_data->phydev, 0x1c, 0x7c00); in xgbe_phy_belfuse_phy_quirks()
1022 reg = phy_read(phy_data->phydev, 0x1c); in xgbe_phy_belfuse_phy_quirks()
1025 phy_write(phy_data->phydev, 0x1c, 0x8000 | 0x7c00 | reg); in xgbe_phy_belfuse_phy_quirks()
1028 reg = phy_read(phy_data->phydev, 0x00); in xgbe_phy_belfuse_phy_quirks()
1029 phy_write(phy_data->phydev, 0x00, reg & ~0x00800); in xgbe_phy_belfuse_phy_quirks()
1037 linkmode_copy(phy_data->phydev->supported, supported); in xgbe_phy_belfuse_phy_quirks()
1038 phy_support_asym_pause(phy_data->phydev); in xgbe_phy_belfuse_phy_quirks()
1040 netif_dbg(pdata, drv, pdata->netdev, in xgbe_phy_belfuse_phy_quirks()
1057 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_find_phy_device()
1058 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_find_phy_device()
1063 if (phy_data->phydev) in xgbe_phy_find_phy_device()
1067 pdata->an_again = 0; in xgbe_phy_find_phy_device()
1070 if (phy_data->phydev_mode == XGBE_MDIO_MODE_NONE) in xgbe_phy_find_phy_device()
1074 if ((phy_data->port_mode == XGBE_PORT_MODE_SFP) && in xgbe_phy_find_phy_device()
1075 !phy_data->sfp_phy_avail) in xgbe_phy_find_phy_device()
1079 ret = pdata->hw_if.set_ext_mii_mode(pdata, phy_data->mdio_addr, in xgbe_phy_find_phy_device()
1080 phy_data->phydev_mode); in xgbe_phy_find_phy_device()
1082 netdev_err(pdata->netdev, in xgbe_phy_find_phy_device()
1084 phy_data->mdio_addr, phy_data->phydev_mode); in xgbe_phy_find_phy_device()
1089 phydev = get_phy_device(phy_data->mii, phy_data->mdio_addr, in xgbe_phy_find_phy_device()
1090 (phy_data->phydev_mode == XGBE_MDIO_MODE_CL45)); in xgbe_phy_find_phy_device()
1092 netdev_err(pdata->netdev, "get_phy_device failed\n"); in xgbe_phy_find_phy_device()
1093 return -ENODEV; in xgbe_phy_find_phy_device()
1095 netif_dbg(pdata, drv, pdata->netdev, "external PHY id is %#010x\n", in xgbe_phy_find_phy_device()
1096 phydev->phy_id); in xgbe_phy_find_phy_device()
1102 netdev_err(pdata->netdev, "phy_device_register failed\n"); in xgbe_phy_find_phy_device()
1107 ret = phy_attach_direct(pdata->netdev, phydev, phydev->dev_flags, in xgbe_phy_find_phy_device()
1110 netdev_err(pdata->netdev, "phy_attach_direct failed\n"); in xgbe_phy_find_phy_device()
1115 phy_data->phydev = phydev; in xgbe_phy_find_phy_device()
1119 linkmode_and(phydev->advertising, phydev->advertising, in xgbe_phy_find_phy_device()
1120 lks->link_modes.advertising); in xgbe_phy_find_phy_device()
1122 phy_start_aneg(phy_data->phydev); in xgbe_phy_find_phy_device()
1129 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_external_phy()
1132 if (!phy_data->sfp_changed) in xgbe_phy_sfp_external_phy()
1135 phy_data->sfp_phy_avail = 0; in xgbe_phy_sfp_external_phy()
1137 if (phy_data->sfp_base != XGBE_SFP_BASE_1000_T) in xgbe_phy_sfp_external_phy()
1146 phy_data->sfp_phy_avail = 1; in xgbe_phy_sfp_external_phy()
1151 u8 *sfp_extd = phy_data->sfp_eeprom.extd; in xgbe_phy_check_sfp_rx_los()
1156 if (phy_data->sfp_gpio_mask & XGBE_GPIO_NO_RX_LOS) in xgbe_phy_check_sfp_rx_los()
1159 if (phy_data->sfp_gpio_inputs & (1 << phy_data->sfp_gpio_rx_los)) in xgbe_phy_check_sfp_rx_los()
1167 u8 *sfp_extd = phy_data->sfp_eeprom.extd; in xgbe_phy_check_sfp_tx_fault()
1172 if (phy_data->sfp_gpio_mask & XGBE_GPIO_NO_TX_FAULT) in xgbe_phy_check_sfp_tx_fault()
1175 if (phy_data->sfp_gpio_inputs & (1 << phy_data->sfp_gpio_tx_fault)) in xgbe_phy_check_sfp_tx_fault()
1183 if (phy_data->sfp_gpio_mask & XGBE_GPIO_NO_MOD_ABSENT) in xgbe_phy_check_sfp_mod_absent()
1186 if (phy_data->sfp_gpio_inputs & (1 << phy_data->sfp_gpio_mod_absent)) in xgbe_phy_check_sfp_mod_absent()
1194 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_parse_eeprom()
1195 struct xgbe_sfp_eeprom *sfp_eeprom = &phy_data->sfp_eeprom; in xgbe_phy_sfp_parse_eeprom()
1198 sfp_base = sfp_eeprom->base; in xgbe_phy_sfp_parse_eeprom()
1207 phy_data->sfp_tx_fault = xgbe_phy_check_sfp_tx_fault(phy_data); in xgbe_phy_sfp_parse_eeprom()
1208 phy_data->sfp_rx_los = xgbe_phy_check_sfp_rx_los(phy_data); in xgbe_phy_sfp_parse_eeprom()
1212 phy_data->sfp_cable = XGBE_SFP_CABLE_PASSIVE; in xgbe_phy_sfp_parse_eeprom()
1213 phy_data->sfp_cable_len = sfp_base[XGBE_SFP_BASE_CU_CABLE_LEN]; in xgbe_phy_sfp_parse_eeprom()
1215 phy_data->sfp_cable = XGBE_SFP_CABLE_ACTIVE; in xgbe_phy_sfp_parse_eeprom()
1217 phy_data->sfp_cable = XGBE_SFP_CABLE_FIBER; in xgbe_phy_sfp_parse_eeprom()
1221 if (phy_data->sfp_cable != XGBE_SFP_CABLE_FIBER && in xgbe_phy_sfp_parse_eeprom()
1223 phy_data->sfp_base = XGBE_SFP_BASE_10000_CR; in xgbe_phy_sfp_parse_eeprom()
1225 phy_data->sfp_base = XGBE_SFP_BASE_10000_SR; in xgbe_phy_sfp_parse_eeprom()
1227 phy_data->sfp_base = XGBE_SFP_BASE_10000_LR; in xgbe_phy_sfp_parse_eeprom()
1229 phy_data->sfp_base = XGBE_SFP_BASE_10000_LRM; in xgbe_phy_sfp_parse_eeprom()
1231 phy_data->sfp_base = XGBE_SFP_BASE_10000_ER; in xgbe_phy_sfp_parse_eeprom()
1233 phy_data->sfp_base = XGBE_SFP_BASE_1000_SX; in xgbe_phy_sfp_parse_eeprom()
1235 phy_data->sfp_base = XGBE_SFP_BASE_1000_LX; in xgbe_phy_sfp_parse_eeprom()
1237 phy_data->sfp_base = XGBE_SFP_BASE_1000_CX; in xgbe_phy_sfp_parse_eeprom()
1239 phy_data->sfp_base = XGBE_SFP_BASE_1000_T; in xgbe_phy_sfp_parse_eeprom()
1241 switch (phy_data->sfp_base) { in xgbe_phy_sfp_parse_eeprom()
1243 phy_data->sfp_speed = XGBE_SFP_SPEED_100_1000; in xgbe_phy_sfp_parse_eeprom()
1248 phy_data->sfp_speed = XGBE_SFP_SPEED_1000; in xgbe_phy_sfp_parse_eeprom()
1255 phy_data->sfp_speed = XGBE_SFP_SPEED_10000; in xgbe_phy_sfp_parse_eeprom()
1268 netif_dbg(pdata, drv, pdata->netdev, "SFP detected:\n"); in xgbe_phy_sfp_eeprom_info()
1269 memcpy(sfp_data, &sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_NAME], in xgbe_phy_sfp_eeprom_info()
1272 netif_dbg(pdata, drv, pdata->netdev, " vendor: %s\n", in xgbe_phy_sfp_eeprom_info()
1275 memcpy(sfp_data, &sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_PN], in xgbe_phy_sfp_eeprom_info()
1278 netif_dbg(pdata, drv, pdata->netdev, " part number: %s\n", in xgbe_phy_sfp_eeprom_info()
1281 memcpy(sfp_data, &sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_REV], in xgbe_phy_sfp_eeprom_info()
1284 netif_dbg(pdata, drv, pdata->netdev, " revision level: %s\n", in xgbe_phy_sfp_eeprom_info()
1287 memcpy(sfp_data, &sfp_eeprom->extd[XGBE_SFP_BASE_VENDOR_SN], in xgbe_phy_sfp_eeprom_info()
1290 netif_dbg(pdata, drv, pdata->netdev, " serial number: %s\n", in xgbe_phy_sfp_eeprom_info()
1298 for (cc = 0; len; buf++, len--) in xgbe_phy_sfp_verify_eeprom()
1306 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_read_eeprom()
1313 dev_err_once(pdata->dev, "%s: I2C error setting SFP MUX\n", in xgbe_phy_sfp_read_eeprom()
1314 netdev_name(pdata->netdev)); in xgbe_phy_sfp_read_eeprom()
1324 dev_err_once(pdata->dev, "%s: I2C error reading SFP EEPROM\n", in xgbe_phy_sfp_read_eeprom()
1325 netdev_name(pdata->netdev)); in xgbe_phy_sfp_read_eeprom()
1332 sizeof(sfp_eeprom.base) - 1)) { in xgbe_phy_sfp_read_eeprom()
1333 ret = -EINVAL; in xgbe_phy_sfp_read_eeprom()
1339 sizeof(sfp_eeprom.extd) - 1)) { in xgbe_phy_sfp_read_eeprom()
1340 ret = -EINVAL; in xgbe_phy_sfp_read_eeprom()
1345 if (memcmp(&phy_data->sfp_eeprom, &sfp_eeprom, sizeof(sfp_eeprom))) { in xgbe_phy_sfp_read_eeprom()
1346 phy_data->sfp_changed = 1; in xgbe_phy_sfp_read_eeprom()
1351 memcpy(&phy_data->sfp_eeprom, &sfp_eeprom, sizeof(sfp_eeprom)); in xgbe_phy_sfp_read_eeprom()
1355 phy_data->sfp_changed = 0; in xgbe_phy_sfp_read_eeprom()
1366 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_signals()
1372 ret = xgbe_phy_i2c_read(pdata, phy_data->sfp_gpio_address, in xgbe_phy_sfp_signals()
1376 dev_err_once(pdata->dev, "%s: I2C error reading SFP GPIOs\n", in xgbe_phy_sfp_signals()
1377 netdev_name(pdata->netdev)); in xgbe_phy_sfp_signals()
1381 phy_data->sfp_gpio_inputs = (gpio_ports[1] << 8) | gpio_ports[0]; in xgbe_phy_sfp_signals()
1383 phy_data->sfp_mod_absent = xgbe_phy_check_sfp_mod_absent(phy_data); in xgbe_phy_sfp_signals()
1388 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_mod_absent()
1392 phy_data->sfp_mod_absent = 1; in xgbe_phy_sfp_mod_absent()
1393 phy_data->sfp_phy_avail = 0; in xgbe_phy_sfp_mod_absent()
1394 memset(&phy_data->sfp_eeprom, 0, sizeof(phy_data->sfp_eeprom)); in xgbe_phy_sfp_mod_absent()
1399 phy_data->sfp_rx_los = 0; in xgbe_phy_sfp_reset()
1400 phy_data->sfp_tx_fault = 0; in xgbe_phy_sfp_reset()
1401 phy_data->sfp_mod_absent = 1; in xgbe_phy_sfp_reset()
1402 phy_data->sfp_base = XGBE_SFP_BASE_UNKNOWN; in xgbe_phy_sfp_reset()
1403 phy_data->sfp_cable = XGBE_SFP_CABLE_UNKNOWN; in xgbe_phy_sfp_reset()
1404 phy_data->sfp_speed = XGBE_SFP_SPEED_UNKNOWN; in xgbe_phy_sfp_reset()
1409 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_detect()
1421 if (phy_data->sfp_mod_absent) { in xgbe_phy_sfp_detect()
1447 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_module_eeprom()
1453 rem = eeprom->len; in xgbe_phy_module_eeprom()
1455 if (!eeprom->len) { in xgbe_phy_module_eeprom()
1456 ret = -EINVAL; in xgbe_phy_module_eeprom()
1460 if ((eeprom->offset + eeprom->len) > XGBE_SFP_EEPROM_MAX) { in xgbe_phy_module_eeprom()
1461 ret = -EINVAL; in xgbe_phy_module_eeprom()
1465 if (phy_data->port_mode != XGBE_PORT_MODE_SFP) { in xgbe_phy_module_eeprom()
1466 ret = -ENXIO; in xgbe_phy_module_eeprom()
1470 if (!netif_running(pdata->netdev)) { in xgbe_phy_module_eeprom()
1471 ret = -EIO; in xgbe_phy_module_eeprom()
1475 if (phy_data->sfp_mod_absent) { in xgbe_phy_module_eeprom()
1476 ret = -EIO; in xgbe_phy_module_eeprom()
1482 ret = -EIO; in xgbe_phy_module_eeprom()
1488 netdev_err(pdata->netdev, "I2C error setting SFP MUX\n"); in xgbe_phy_module_eeprom()
1489 ret = -EIO; in xgbe_phy_module_eeprom()
1499 netdev_err(pdata->netdev, in xgbe_phy_module_eeprom()
1501 ret = -EIO; in xgbe_phy_module_eeprom()
1515 netdev_err(pdata->netdev, in xgbe_phy_module_eeprom()
1517 ret = -EIO; in xgbe_phy_module_eeprom()
1522 for (i = 0, j = eeprom->offset; i < eeprom->len; i++, j++) { in xgbe_phy_module_eeprom()
1528 rem--; in xgbe_phy_module_eeprom()
1538 eeprom->len -= rem; in xgbe_phy_module_eeprom()
1546 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_module_info()
1548 if (phy_data->port_mode != XGBE_PORT_MODE_SFP) in xgbe_phy_module_info()
1549 return -ENXIO; in xgbe_phy_module_info()
1551 if (!netif_running(pdata->netdev)) in xgbe_phy_module_info()
1552 return -EIO; in xgbe_phy_module_info()
1554 if (phy_data->sfp_mod_absent) in xgbe_phy_module_info()
1555 return -EIO; in xgbe_phy_module_info()
1557 if (XGBE_SFP_DIAGS_SUPPORTED(&phy_data->sfp_eeprom)) { in xgbe_phy_module_info()
1558 modinfo->type = ETH_MODULE_SFF_8472; in xgbe_phy_module_info()
1559 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; in xgbe_phy_module_info()
1561 modinfo->type = ETH_MODULE_SFF_8079; in xgbe_phy_module_info()
1562 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; in xgbe_phy_module_info()
1570 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_phydev_flowctrl()
1571 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_phydev_flowctrl()
1575 pdata->phy.tx_pause = 0; in xgbe_phy_phydev_flowctrl()
1576 pdata->phy.rx_pause = 0; in xgbe_phy_phydev_flowctrl()
1578 if (!phy_data->phydev) in xgbe_phy_phydev_flowctrl()
1581 lcl_adv = linkmode_adv_to_lcl_adv_t(phy_data->phydev->advertising); in xgbe_phy_phydev_flowctrl()
1583 if (phy_data->phydev->pause) { in xgbe_phy_phydev_flowctrl()
1587 if (phy_data->phydev->asym_pause) { in xgbe_phy_phydev_flowctrl()
1594 pdata->phy.tx_pause = 1; in xgbe_phy_phydev_flowctrl()
1596 pdata->phy.rx_pause = 1; in xgbe_phy_phydev_flowctrl()
1601 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_an37_sgmii_outcome()
1608 if (pdata->phy.pause_autoneg) in xgbe_phy_an37_sgmii_outcome()
1611 switch (pdata->an_status & XGBE_SGMII_AN_LINK_SPEED) { in xgbe_phy_an37_sgmii_outcome()
1613 if (pdata->an_status & XGBE_SGMII_AN_LINK_DUPLEX) { in xgbe_phy_an37_sgmii_outcome()
1617 /* Half-duplex not supported */ in xgbe_phy_an37_sgmii_outcome()
1623 if (pdata->an_status & XGBE_SGMII_AN_LINK_DUPLEX) { in xgbe_phy_an37_sgmii_outcome()
1627 /* Half-duplex not supported */ in xgbe_phy_an37_sgmii_outcome()
1633 if (pdata->an_status & XGBE_SGMII_AN_LINK_DUPLEX) { in xgbe_phy_an37_sgmii_outcome()
1637 /* Half-duplex not supported */ in xgbe_phy_an37_sgmii_outcome()
1651 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_an37_outcome()
1666 if (pdata->phy.pause_autoneg) { in xgbe_phy_an37_outcome()
1667 /* Set flow control based on auto-negotiation result */ in xgbe_phy_an37_outcome()
1668 pdata->phy.tx_pause = 0; in xgbe_phy_an37_outcome()
1669 pdata->phy.rx_pause = 0; in xgbe_phy_an37_outcome()
1672 pdata->phy.tx_pause = 1; in xgbe_phy_an37_outcome()
1673 pdata->phy.rx_pause = 1; in xgbe_phy_an37_outcome()
1676 pdata->phy.rx_pause = 1; in xgbe_phy_an37_outcome()
1678 pdata->phy.tx_pause = 1; in xgbe_phy_an37_outcome()
1694 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_an73_redrv_outcome()
1695 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an73_redrv_outcome()
1703 if (pdata->phy.pause_autoneg) in xgbe_phy_an73_redrv_outcome()
1716 switch (phy_data->port_mode) { in xgbe_phy_an73_redrv_outcome()
1726 switch (phy_data->port_mode) { in xgbe_phy_an73_redrv_outcome()
1735 switch (phy_data->sfp_base) { in xgbe_phy_an73_redrv_outcome()
1737 if (phy_data->phydev && in xgbe_phy_an73_redrv_outcome()
1738 (phy_data->phydev->speed == SPEED_10)) in xgbe_phy_an73_redrv_outcome()
1740 else if (phy_data->phydev && in xgbe_phy_an73_redrv_outcome()
1741 (phy_data->phydev->speed == SPEED_100)) in xgbe_phy_an73_redrv_outcome()
1755 if (phy_data->phydev && in xgbe_phy_an73_redrv_outcome()
1756 (phy_data->phydev->speed == SPEED_10)) in xgbe_phy_an73_redrv_outcome()
1758 else if (phy_data->phydev && in xgbe_phy_an73_redrv_outcome()
1759 (phy_data->phydev->speed == SPEED_100)) in xgbe_phy_an73_redrv_outcome()
1780 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_an73_outcome()
1795 if (pdata->phy.pause_autoneg) { in xgbe_phy_an73_outcome()
1796 /* Set flow control based on auto-negotiation result */ in xgbe_phy_an73_outcome()
1797 pdata->phy.tx_pause = 0; in xgbe_phy_an73_outcome()
1798 pdata->phy.rx_pause = 0; in xgbe_phy_an73_outcome()
1801 pdata->phy.tx_pause = 1; in xgbe_phy_an73_outcome()
1802 pdata->phy.rx_pause = 1; in xgbe_phy_an73_outcome()
1805 pdata->phy.rx_pause = 1; in xgbe_phy_an73_outcome()
1807 pdata->phy.tx_pause = 1; in xgbe_phy_an73_outcome()
1838 switch (pdata->an_mode) { in xgbe_phy_an_outcome()
1855 struct ethtool_link_ksettings *slks = &pdata->phy.lks; in xgbe_phy_an_advertising()
1856 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an_advertising()
1860 /* Without a re-driver, just return current advertising */ in xgbe_phy_an_advertising()
1861 if (!phy_data->redrv) in xgbe_phy_an_advertising()
1864 /* With the KR re-driver we need to advertise a single speed */ in xgbe_phy_an_advertising()
1869 if (pdata->fec_ability & MDIO_PMA_10GBR_FECABLE_ABLE) in xgbe_phy_an_advertising()
1872 switch (phy_data->port_mode) { in xgbe_phy_an_advertising()
1886 if (phy_data->phydev && in xgbe_phy_an_advertising()
1887 (phy_data->phydev->speed == SPEED_10000)) in xgbe_phy_an_advertising()
1889 else if (phy_data->phydev && in xgbe_phy_an_advertising()
1890 (phy_data->phydev->speed == SPEED_2500)) in xgbe_phy_an_advertising()
1899 switch (phy_data->sfp_base) { in xgbe_phy_an_advertising()
1919 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_an_config()
1920 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an_config()
1927 if (!phy_data->phydev) in xgbe_phy_an_config()
1930 phy_data->phydev->autoneg = pdata->phy.autoneg; in xgbe_phy_an_config()
1931 linkmode_and(phy_data->phydev->advertising, in xgbe_phy_an_config()
1932 phy_data->phydev->supported, in xgbe_phy_an_config()
1933 lks->link_modes.advertising); in xgbe_phy_an_config()
1935 if (pdata->phy.autoneg != AUTONEG_ENABLE) { in xgbe_phy_an_config()
1936 phy_data->phydev->speed = pdata->phy.speed; in xgbe_phy_an_config()
1937 phy_data->phydev->duplex = pdata->phy.duplex; in xgbe_phy_an_config()
1940 ret = phy_start_aneg(phy_data->phydev); in xgbe_phy_an_config()
1947 switch (phy_data->sfp_base) { in xgbe_phy_an_sfp_mode()
1961 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an_mode()
1963 /* A KR re-driver will always require CL73 AN */ in xgbe_phy_an_mode()
1964 if (phy_data->redrv) in xgbe_phy_an_mode()
1967 switch (phy_data->port_mode) { in xgbe_phy_an_mode()
1993 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_set_redrv_mode_mdio()
1996 redrv_reg = XGBE_PHY_REDRV_MODE_REG + (phy_data->redrv_lane * 0x1000); in xgbe_phy_set_redrv_mode_mdio()
1999 return pdata->hw_if.write_ext_mii_regs_c22(pdata, phy_data->redrv_addr, in xgbe_phy_set_redrv_mode_mdio()
2006 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_set_redrv_mode_i2c()
2011 redrv_reg = XGBE_PHY_REDRV_MODE_REG + (phy_data->redrv_lane * 0x1000); in xgbe_phy_set_redrv_mode_i2c()
2020 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_set_redrv_mode()
2024 if (!phy_data->redrv) in xgbe_phy_set_redrv_mode()
2028 if ((phy_data->port_mode == XGBE_PORT_MODE_SFP) && in xgbe_phy_set_redrv_mode()
2029 (phy_data->sfp_base != XGBE_SFP_BASE_1000_CX) && in xgbe_phy_set_redrv_mode()
2030 (phy_data->sfp_base != XGBE_SFP_BASE_10000_CR)) in xgbe_phy_set_redrv_mode()
2037 if (phy_data->redrv_if) in xgbe_phy_set_redrv_mode()
2052 if (pdata->rx_adapt_retries++ >= MAX_RX_ADAPT_RETRIES) { in xgbe_set_rx_adap_mode()
2053 pdata->rx_adapt_retries = 0; in xgbe_set_rx_adap_mode()
2066 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_rx_adaptation()
2098 netif_dbg(pdata, link, pdata->netdev, "Block_lock done"); in xgbe_rx_adaptation()
2099 pdata->rx_adapt_done = true; in xgbe_rx_adaptation()
2100 pdata->mode_set = false; in xgbe_rx_adaptation()
2105 xgbe_set_rx_adap_mode(pdata, phy_data->cur_mode); in xgbe_rx_adaptation()
2118 netif_dbg(pdata, link, pdata->netdev, in xgbe_phy_rx_adaptation()
2121 if (pdata->rx_adapt_retries++ >= MAX_RX_ADAPT_RETRIES) { in xgbe_phy_rx_adaptation()
2122 pdata->rx_adapt_retries = 0; in xgbe_phy_rx_adaptation()
2149 netif_err(pdata, link, pdata->netdev, "firmware mailbox reset performed\n"); in xgbe_phy_rx_reset()
2155 /* PLL_CTRL feature needs to be enabled for fixed PHY modes (Non-Autoneg) only */ in xgbe_phy_pll_ctrl()
2156 if (pdata->phy.autoneg != AUTONEG_DISABLE) in xgbe_phy_pll_ctrl()
2174 /* Disable PLL re-initialization during FW command processing */ in xgbe_phy_perform_ratechange()
2179 netif_dbg(pdata, link, pdata->netdev, in xgbe_phy_perform_ratechange()
2195 while (wait--) { in xgbe_phy_perform_ratechange()
2202 netif_dbg(pdata, link, pdata->netdev, in xgbe_phy_perform_ratechange()
2210 if (pdata->en_rx_adap && sub_cmd == XGBE_MB_SUBCMD_RX_ADAP && in xgbe_phy_perform_ratechange()
2212 netif_dbg(pdata, link, pdata->netdev, in xgbe_phy_perform_ratechange()
2214 pdata->mode_set = true; in xgbe_phy_perform_ratechange()
2223 /* Enable PLL re-initialization, not needed for PHY Power Off and RRC cmds */ in xgbe_phy_perform_ratechange()
2234 netif_dbg(pdata, link, pdata->netdev, "receiver reset complete\n"); in xgbe_phy_rrc()
2239 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_power_off()
2244 phy_data->cur_mode = XGBE_MODE_UNKNOWN; in xgbe_phy_power_off()
2246 netif_dbg(pdata, link, pdata->netdev, "phy powered off\n"); in xgbe_phy_power_off()
2251 struct xgbe_phy_data *phy_data = pdata->phy_data; in enable_rx_adap()
2254 /* Rx-Adaptation is not supported on older platforms(< 0x30H) */ in enable_rx_adap()
2255 ver = XGMAC_GET_BITS(pdata->hw_feat.version, MAC_VR, SNPSVER); in enable_rx_adap()
2259 /* Re-driver models 4223 && 4227 do not support Rx-Adaptation */ in enable_rx_adap()
2260 if (phy_data->redrv && in enable_rx_adap()
2261 (phy_data->redrv_model == XGBE_PHY_REDRV_MODEL_4223 || in enable_rx_adap()
2262 phy_data->redrv_model == XGBE_PHY_REDRV_MODEL_4227)) in enable_rx_adap()
2265 /* 10G KR mode with AN does not support Rx-Adaptation */ in enable_rx_adap()
2267 phy_data->port_mode != XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG) in enable_rx_adap()
2270 pdata->en_rx_adap = 1; in enable_rx_adap()
2276 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfi_mode()
2281 if (phy_data->sfp_cable != XGBE_SFP_CABLE_PASSIVE) { in xgbe_phy_sfi_mode()
2282 pdata->en_rx_adap = 0; in xgbe_phy_sfi_mode()
2284 } else if ((phy_data->sfp_cable == XGBE_SFP_CABLE_PASSIVE) && in xgbe_phy_sfi_mode()
2289 if (phy_data->sfp_cable_len <= 1) in xgbe_phy_sfi_mode()
2292 else if (phy_data->sfp_cable_len <= 3) in xgbe_phy_sfi_mode()
2300 phy_data->cur_mode = XGBE_MODE_SFI; in xgbe_phy_sfi_mode()
2302 netif_dbg(pdata, link, pdata->netdev, "10GbE SFI mode set\n"); in xgbe_phy_sfi_mode()
2307 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_x_mode()
2314 phy_data->cur_mode = XGBE_MODE_X; in xgbe_phy_x_mode()
2316 netif_dbg(pdata, link, pdata->netdev, "1GbE X mode set\n"); in xgbe_phy_x_mode()
2321 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sgmii_1000_mode()
2328 phy_data->cur_mode = XGBE_MODE_SGMII_1000; in xgbe_phy_sgmii_1000_mode()
2330 netif_dbg(pdata, link, pdata->netdev, "1GbE SGMII mode set\n"); in xgbe_phy_sgmii_1000_mode()
2335 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sgmii_100_mode()
2342 phy_data->cur_mode = XGBE_MODE_SGMII_100; in xgbe_phy_sgmii_100_mode()
2344 netif_dbg(pdata, link, pdata->netdev, "100MbE SGMII mode set\n"); in xgbe_phy_sgmii_100_mode()
2349 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sgmii_10_mode()
2356 phy_data->cur_mode = XGBE_MODE_SGMII_10; in xgbe_phy_sgmii_10_mode()
2358 netif_dbg(pdata, link, pdata->netdev, "10MbE SGMII mode set\n"); in xgbe_phy_sgmii_10_mode()
2363 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_kr_mode()
2367 /* 10G/KR */ in xgbe_phy_kr_mode()
2375 phy_data->cur_mode = XGBE_MODE_KR; in xgbe_phy_kr_mode()
2377 netif_dbg(pdata, link, pdata->netdev, "10GbE KR mode set\n"); in xgbe_phy_kr_mode()
2382 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_kx_2500_mode()
2389 phy_data->cur_mode = XGBE_MODE_KX_2500; in xgbe_phy_kx_2500_mode()
2391 netif_dbg(pdata, link, pdata->netdev, "2.5GbE KX mode set\n"); in xgbe_phy_kx_2500_mode()
2396 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_kx_1000_mode()
2403 phy_data->cur_mode = XGBE_MODE_KX_1000; in xgbe_phy_kx_1000_mode()
2405 netif_dbg(pdata, link, pdata->netdev, "1GbE KX mode set\n"); in xgbe_phy_kx_1000_mode()
2410 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_cur_mode()
2412 return phy_data->cur_mode; in xgbe_phy_cur_mode()
2417 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_switch_baset_mode()
2419 /* No switching if not 10GBase-T */ in xgbe_phy_switch_baset_mode()
2420 if (phy_data->port_mode != XGBE_PORT_MODE_10GBASE_T) in xgbe_phy_switch_baset_mode()
2443 /* If we are in KR switch to KX, and vice-versa */ in xgbe_phy_switch_bp_mode()
2455 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_switch_mode()
2457 switch (phy_data->port_mode) { in xgbe_phy_switch_mode()
2518 if (phy_data->sfp_base == XGBE_SFP_BASE_1000_T) in xgbe_phy_get_sfp_mode()
2555 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_get_mode()
2557 switch (phy_data->port_mode) { in xgbe_phy_get_mode()
2612 if (pdata->phy.autoneg == AUTONEG_ENABLE) { in xgbe_phy_check_mode()
2617 cur_mode = xgbe_phy_get_mode(pdata, pdata->phy.speed); in xgbe_phy_check_mode()
2628 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_use_basex_mode()
2645 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_use_baset_mode()
2671 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_use_sfp_mode()
2672 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_use_sfp_mode()
2676 if (phy_data->sfp_base == XGBE_SFP_BASE_1000_T) in xgbe_phy_use_sfp_mode()
2681 if (phy_data->sfp_base != XGBE_SFP_BASE_1000_T) in xgbe_phy_use_sfp_mode()
2686 if (phy_data->sfp_base != XGBE_SFP_BASE_1000_T) in xgbe_phy_use_sfp_mode()
2691 if (phy_data->sfp_base != XGBE_SFP_BASE_1000_T) in xgbe_phy_use_sfp_mode()
2696 if (phy_data->sfp_mod_absent) in xgbe_phy_use_sfp_mode()
2712 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_use_bp_2500_mode()
2726 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_use_bp_mode()
2742 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_use_mode()
2744 switch (phy_data->port_mode) { in xgbe_phy_use_mode()
2769 return (phy_data->port_mode == XGBE_PORT_MODE_1000BASE_X); in xgbe_phy_valid_speed_basex_mode()
2771 return (phy_data->port_mode == XGBE_PORT_MODE_10GBASE_R); in xgbe_phy_valid_speed_basex_mode()
2780 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_valid_speed_baset_mode()
2786 ver = XGMAC_GET_BITS(pdata->hw_feat.version, MAC_VR, SNPSVER); in xgbe_phy_valid_speed_baset_mode()
2792 return ((phy_data->port_mode == XGBE_PORT_MODE_10GBASE_T) || in xgbe_phy_valid_speed_baset_mode()
2793 (phy_data->port_mode == XGBE_PORT_MODE_NBASE_T)); in xgbe_phy_valid_speed_baset_mode()
2795 return (phy_data->port_mode == XGBE_PORT_MODE_10GBASE_T); in xgbe_phy_valid_speed_baset_mode()
2804 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_valid_speed_sfp_mode()
2810 ver = XGMAC_GET_BITS(pdata->hw_feat.version, MAC_VR, SNPSVER); in xgbe_phy_valid_speed_sfp_mode()
2812 (phy_data->sfp_speed == XGBE_SFP_SPEED_100_1000)); in xgbe_phy_valid_speed_sfp_mode()
2814 return (phy_data->sfp_speed == XGBE_SFP_SPEED_100_1000); in xgbe_phy_valid_speed_sfp_mode()
2816 return ((phy_data->sfp_speed == XGBE_SFP_SPEED_100_1000) || in xgbe_phy_valid_speed_sfp_mode()
2817 (phy_data->sfp_speed == XGBE_SFP_SPEED_1000)); in xgbe_phy_valid_speed_sfp_mode()
2819 return (phy_data->sfp_speed == XGBE_SFP_SPEED_10000); in xgbe_phy_valid_speed_sfp_mode()
2848 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_valid_speed()
2850 switch (phy_data->port_mode) { in xgbe_phy_valid_speed()
2872 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_link_status()
2878 if (phy_data->port_mode == XGBE_PORT_MODE_SFP) { in xgbe_phy_link_status()
2882 if (phy_data->sfp_changed) { in xgbe_phy_link_status()
2887 if (phy_data->sfp_mod_absent || phy_data->sfp_rx_los) { in xgbe_phy_link_status()
2888 if (pdata->en_rx_adap) in xgbe_phy_link_status()
2889 pdata->rx_adapt_done = false; in xgbe_phy_link_status()
2894 if (phy_data->phydev) { in xgbe_phy_link_status()
2896 ret = phy_read_status(phy_data->phydev); in xgbe_phy_link_status()
2900 if ((pdata->phy.autoneg == AUTONEG_ENABLE) && in xgbe_phy_link_status()
2901 !phy_aneg_done(phy_data->phydev)) in xgbe_phy_link_status()
2904 if (!phy_data->phydev->link) in xgbe_phy_link_status()
2914 if (pdata->en_rx_adap) { in xgbe_phy_link_status()
2918 if ((reg & MDIO_STAT1_LSTATUS) && pdata->rx_adapt_done) in xgbe_phy_link_status()
2924 if (pdata->mode_set) { in xgbe_phy_link_status()
2927 pdata->rx_adapt_done = false; in xgbe_phy_link_status()
2928 xgbe_phy_set_mode(pdata, phy_data->cur_mode); in xgbe_phy_link_status()
2933 if ((reg & MDIO_STAT1_LSTATUS) && pdata->rx_adapt_done) in xgbe_phy_link_status()
2938 if (pdata->phy.autoneg == AUTONEG_ENABLE && in xgbe_phy_link_status()
2939 phy_data->port_mode == XGBE_PORT_MODE_BACKPLANE) { in xgbe_phy_link_status()
2940 if (!test_bit(XGBE_LINK_INIT, &pdata->dev_state)) { in xgbe_phy_link_status()
2941 netif_carrier_off(pdata->netdev); in xgbe_phy_link_status()
2947 if (pdata->vdata->enable_rrc && phy_data->rrc_count++ > XGBE_RRC_FREQUENCY) { in xgbe_phy_link_status()
2948 phy_data->rrc_count = 0; in xgbe_phy_link_status()
2957 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_gpio_setup()
2959 phy_data->sfp_gpio_address = XGBE_GPIO_ADDRESS_PCA9555 + in xgbe_phy_sfp_gpio_setup()
2960 XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
2963 phy_data->sfp_gpio_mask = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
2966 phy_data->sfp_gpio_rx_los = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
2968 phy_data->sfp_gpio_tx_fault = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
2970 phy_data->sfp_gpio_mod_absent = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
2972 phy_data->sfp_gpio_rate_select = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_sfp_gpio_setup()
2976 dev_dbg(pdata->dev, "SFP: gpio_address=%#x\n", in xgbe_phy_sfp_gpio_setup()
2977 phy_data->sfp_gpio_address); in xgbe_phy_sfp_gpio_setup()
2978 dev_dbg(pdata->dev, "SFP: gpio_mask=%#x\n", in xgbe_phy_sfp_gpio_setup()
2979 phy_data->sfp_gpio_mask); in xgbe_phy_sfp_gpio_setup()
2980 dev_dbg(pdata->dev, "SFP: gpio_rx_los=%u\n", in xgbe_phy_sfp_gpio_setup()
2981 phy_data->sfp_gpio_rx_los); in xgbe_phy_sfp_gpio_setup()
2982 dev_dbg(pdata->dev, "SFP: gpio_tx_fault=%u\n", in xgbe_phy_sfp_gpio_setup()
2983 phy_data->sfp_gpio_tx_fault); in xgbe_phy_sfp_gpio_setup()
2984 dev_dbg(pdata->dev, "SFP: gpio_mod_absent=%u\n", in xgbe_phy_sfp_gpio_setup()
2985 phy_data->sfp_gpio_mod_absent); in xgbe_phy_sfp_gpio_setup()
2986 dev_dbg(pdata->dev, "SFP: gpio_rate_select=%u\n", in xgbe_phy_sfp_gpio_setup()
2987 phy_data->sfp_gpio_rate_select); in xgbe_phy_sfp_gpio_setup()
2993 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_sfp_comm_setup()
2996 mux_addr_hi = XP_GET_BITS(pdata->pp4, XP_PROP_4, MUX_ADDR_HI); in xgbe_phy_sfp_comm_setup()
2997 mux_addr_lo = XP_GET_BITS(pdata->pp4, XP_PROP_4, MUX_ADDR_LO); in xgbe_phy_sfp_comm_setup()
3001 phy_data->sfp_comm = XGBE_SFP_COMM_PCA9545; in xgbe_phy_sfp_comm_setup()
3002 phy_data->sfp_mux_address = (mux_addr_hi << 2) + mux_addr_lo; in xgbe_phy_sfp_comm_setup()
3003 phy_data->sfp_mux_channel = XP_GET_BITS(pdata->pp4, XP_PROP_4, in xgbe_phy_sfp_comm_setup()
3007 dev_dbg(pdata->dev, "SFP: mux_address=%#x\n", in xgbe_phy_sfp_comm_setup()
3008 phy_data->sfp_mux_address); in xgbe_phy_sfp_comm_setup()
3009 dev_dbg(pdata->dev, "SFP: mux_channel=%u\n", in xgbe_phy_sfp_comm_setup()
3010 phy_data->sfp_mux_channel); in xgbe_phy_sfp_comm_setup()
3022 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_int_mdio_reset()
3025 ret = pdata->hw_if.set_gpio(pdata, phy_data->mdio_reset_gpio); in xgbe_phy_int_mdio_reset()
3029 ret = pdata->hw_if.clr_gpio(pdata, phy_data->mdio_reset_gpio); in xgbe_phy_int_mdio_reset()
3036 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_i2c_mdio_reset()
3042 ret = xgbe_phy_i2c_read(pdata, phy_data->mdio_reset_addr, in xgbe_phy_i2c_mdio_reset()
3054 if (phy_data->mdio_reset_gpio < 8) in xgbe_phy_i2c_mdio_reset()
3055 gpio_data[1] |= (1 << (phy_data->mdio_reset_gpio % 8)); in xgbe_phy_i2c_mdio_reset()
3057 gpio_data[2] |= (1 << (phy_data->mdio_reset_gpio % 8)); in xgbe_phy_i2c_mdio_reset()
3060 ret = xgbe_phy_i2c_write(pdata, phy_data->mdio_reset_addr, in xgbe_phy_i2c_mdio_reset()
3066 if (phy_data->mdio_reset_gpio < 8) in xgbe_phy_i2c_mdio_reset()
3067 gpio_data[1] &= ~(1 << (phy_data->mdio_reset_gpio % 8)); in xgbe_phy_i2c_mdio_reset()
3069 gpio_data[2] &= ~(1 << (phy_data->mdio_reset_gpio % 8)); in xgbe_phy_i2c_mdio_reset()
3072 ret = xgbe_phy_i2c_write(pdata, phy_data->mdio_reset_addr, in xgbe_phy_i2c_mdio_reset()
3080 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mdio_reset()
3083 if (phy_data->conn_type != XGBE_CONN_TYPE_MDIO) in xgbe_phy_mdio_reset()
3090 if (phy_data->mdio_reset == XGBE_MDIO_RESET_I2C_GPIO) in xgbe_phy_mdio_reset()
3092 else if (phy_data->mdio_reset == XGBE_MDIO_RESET_INT_GPIO) in xgbe_phy_mdio_reset()
3102 if (!phy_data->redrv) in xgbe_phy_redrv_error()
3105 if (phy_data->redrv_if >= XGBE_PHY_REDRV_IF_MAX) in xgbe_phy_redrv_error()
3108 switch (phy_data->redrv_model) { in xgbe_phy_redrv_error()
3110 if (phy_data->redrv_lane > 3) in xgbe_phy_redrv_error()
3114 if (phy_data->redrv_lane > 1) in xgbe_phy_redrv_error()
3126 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_mdio_reset_setup()
3128 if (phy_data->conn_type != XGBE_CONN_TYPE_MDIO) in xgbe_phy_mdio_reset_setup()
3131 phy_data->mdio_reset = XP_GET_BITS(pdata->pp3, XP_PROP_3, MDIO_RESET); in xgbe_phy_mdio_reset_setup()
3132 switch (phy_data->mdio_reset) { in xgbe_phy_mdio_reset_setup()
3138 dev_err(pdata->dev, "unsupported MDIO reset (%#x)\n", in xgbe_phy_mdio_reset_setup()
3139 phy_data->mdio_reset); in xgbe_phy_mdio_reset_setup()
3140 return -EINVAL; in xgbe_phy_mdio_reset_setup()
3143 if (phy_data->mdio_reset == XGBE_MDIO_RESET_I2C_GPIO) { in xgbe_phy_mdio_reset_setup()
3144 phy_data->mdio_reset_addr = XGBE_GPIO_ADDRESS_PCA9555 + in xgbe_phy_mdio_reset_setup()
3145 XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_mdio_reset_setup()
3147 phy_data->mdio_reset_gpio = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_mdio_reset_setup()
3149 } else if (phy_data->mdio_reset == XGBE_MDIO_RESET_INT_GPIO) { in xgbe_phy_mdio_reset_setup()
3150 phy_data->mdio_reset_gpio = XP_GET_BITS(pdata->pp3, XP_PROP_3, in xgbe_phy_mdio_reset_setup()
3159 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_port_mode_mismatch()
3163 ver = XGMAC_GET_BITS(pdata->hw_feat.version, MAC_VR, SNPSVER); in xgbe_phy_port_mode_mismatch()
3164 if ((ver < 0x30 && ver != 0x21) && (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10)) in xgbe_phy_port_mode_mismatch()
3167 switch (phy_data->port_mode) { in xgbe_phy_port_mode_mismatch()
3170 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) || in xgbe_phy_port_mode_mismatch()
3171 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000)) in xgbe_phy_port_mode_mismatch()
3175 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500) in xgbe_phy_port_mode_mismatch()
3179 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) || in xgbe_phy_port_mode_mismatch()
3180 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) || in xgbe_phy_port_mode_mismatch()
3181 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000)) in xgbe_phy_port_mode_mismatch()
3185 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) in xgbe_phy_port_mode_mismatch()
3189 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) || in xgbe_phy_port_mode_mismatch()
3190 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) || in xgbe_phy_port_mode_mismatch()
3191 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) || in xgbe_phy_port_mode_mismatch()
3192 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500)) in xgbe_phy_port_mode_mismatch()
3196 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) || in xgbe_phy_port_mode_mismatch()
3197 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) || in xgbe_phy_port_mode_mismatch()
3198 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) || in xgbe_phy_port_mode_mismatch()
3199 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500) || in xgbe_phy_port_mode_mismatch()
3200 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000)) in xgbe_phy_port_mode_mismatch()
3204 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) in xgbe_phy_port_mode_mismatch()
3208 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) || in xgbe_phy_port_mode_mismatch()
3209 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) || in xgbe_phy_port_mode_mismatch()
3210 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) || in xgbe_phy_port_mode_mismatch()
3211 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000)) in xgbe_phy_port_mode_mismatch()
3223 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_conn_type_mismatch()
3225 switch (phy_data->port_mode) { in xgbe_phy_conn_type_mismatch()
3229 if (phy_data->conn_type == XGBE_CONN_TYPE_BACKPLANE) in xgbe_phy_conn_type_mismatch()
3237 if (phy_data->conn_type == XGBE_CONN_TYPE_MDIO) in xgbe_phy_conn_type_mismatch()
3241 if (phy_data->conn_type == XGBE_CONN_TYPE_SFP) in xgbe_phy_conn_type_mismatch()
3253 if (!XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_SPEEDS)) in xgbe_phy_port_enabled()
3255 if (!XP_GET_BITS(pdata->pp0, XP_PROP_0, CONN_TYPE)) in xgbe_phy_port_enabled()
3263 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_cdr_track()
3265 if (!pdata->debugfs_an_cdr_workaround) in xgbe_phy_cdr_track()
3268 if (!phy_data->phy_cdr_notrack) in xgbe_phy_cdr_track()
3271 usleep_range(phy_data->phy_cdr_delay, in xgbe_phy_cdr_track()
3272 phy_data->phy_cdr_delay + 500); in xgbe_phy_cdr_track()
3278 phy_data->phy_cdr_notrack = 0; in xgbe_phy_cdr_track()
3283 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_cdr_notrack()
3285 if (!pdata->debugfs_an_cdr_workaround) in xgbe_phy_cdr_notrack()
3288 if (phy_data->phy_cdr_notrack) in xgbe_phy_cdr_notrack()
3297 phy_data->phy_cdr_notrack = 1; in xgbe_phy_cdr_notrack()
3302 if (!pdata->debugfs_an_cdr_track_early) in xgbe_phy_kr_training_post()
3308 if (pdata->debugfs_an_cdr_track_early) in xgbe_phy_kr_training_pre()
3314 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an_post()
3316 switch (pdata->an_mode) { in xgbe_phy_an_post()
3319 if (phy_data->cur_mode != XGBE_MODE_KR) in xgbe_phy_an_post()
3324 switch (pdata->an_result) { in xgbe_phy_an_post()
3329 if (phy_data->phy_cdr_delay < XGBE_CDR_DELAY_MAX) in xgbe_phy_an_post()
3330 phy_data->phy_cdr_delay += XGBE_CDR_DELAY_INC; in xgbe_phy_an_post()
3332 phy_data->phy_cdr_delay = XGBE_CDR_DELAY_INIT; in xgbe_phy_an_post()
3343 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_an_pre()
3345 switch (pdata->an_mode) { in xgbe_phy_an_pre()
3348 if (phy_data->cur_mode != XGBE_MODE_KR) in xgbe_phy_an_pre()
3360 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_stop()
3376 pdata->i2c_if.i2c_stop(pdata); in xgbe_phy_stop()
3381 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_start()
3385 ret = pdata->i2c_if.i2c_start(pdata); in xgbe_phy_start()
3389 /* Set the proper MDIO mode for the re-driver */ in xgbe_phy_start()
3390 if (phy_data->redrv && !phy_data->redrv_if) { in xgbe_phy_start()
3391 ret = pdata->hw_if.set_ext_mii_mode(pdata, phy_data->redrv_addr, in xgbe_phy_start()
3394 netdev_err(pdata->netdev, in xgbe_phy_start()
3396 phy_data->redrv_addr); in xgbe_phy_start()
3402 xgbe_phy_set_mode(pdata, phy_data->start_mode); in xgbe_phy_start()
3408 switch (phy_data->port_mode) { in xgbe_phy_start()
3424 pdata->i2c_if.i2c_stop(pdata); in xgbe_phy_start()
3431 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_reset()
3436 cur_mode = phy_data->cur_mode; in xgbe_phy_reset()
3440 if (!phy_data->phydev) in xgbe_phy_reset()
3448 return phy_init_hw(phy_data->phydev); in xgbe_phy_reset()
3453 struct xgbe_phy_data *phy_data = pdata->phy_data; in xgbe_phy_exit()
3456 mdiobus_unregister(phy_data->mii); in xgbe_phy_exit()
3461 struct ethtool_link_ksettings *lks = &pdata->phy.lks; in xgbe_phy_init()
3468 dev_info(pdata->dev, "device is not enabled\n"); in xgbe_phy_init()
3469 return -ENODEV; in xgbe_phy_init()
3473 ret = pdata->i2c_if.i2c_init(pdata); in xgbe_phy_init()
3477 phy_data = devm_kzalloc(pdata->dev, sizeof(*phy_data), GFP_KERNEL); in xgbe_phy_init()
3479 return -ENOMEM; in xgbe_phy_init()
3480 pdata->phy_data = phy_data; in xgbe_phy_init()
3482 phy_data->port_mode = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_MODE); in xgbe_phy_init()
3483 phy_data->port_id = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_ID); in xgbe_phy_init()
3484 phy_data->port_speeds = XP_GET_BITS(pdata->pp0, XP_PROP_0, PORT_SPEEDS); in xgbe_phy_init()
3485 phy_data->conn_type = XP_GET_BITS(pdata->pp0, XP_PROP_0, CONN_TYPE); in xgbe_phy_init()
3486 phy_data->mdio_addr = XP_GET_BITS(pdata->pp0, XP_PROP_0, MDIO_ADDR); in xgbe_phy_init()
3488 dev_dbg(pdata->dev, "port mode=%u\n", phy_data->port_mode); in xgbe_phy_init()
3489 dev_dbg(pdata->dev, "port id=%u\n", phy_data->port_id); in xgbe_phy_init()
3490 dev_dbg(pdata->dev, "port speeds=%#x\n", phy_data->port_speeds); in xgbe_phy_init()
3491 dev_dbg(pdata->dev, "conn type=%u\n", phy_data->conn_type); in xgbe_phy_init()
3492 dev_dbg(pdata->dev, "mdio addr=%u\n", phy_data->mdio_addr); in xgbe_phy_init()
3495 phy_data->redrv = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_PRESENT); in xgbe_phy_init()
3496 phy_data->redrv_if = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_IF); in xgbe_phy_init()
3497 phy_data->redrv_addr = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_ADDR); in xgbe_phy_init()
3498 phy_data->redrv_lane = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_LANE); in xgbe_phy_init()
3499 phy_data->redrv_model = XP_GET_BITS(pdata->pp4, XP_PROP_4, REDRV_MODEL); in xgbe_phy_init()
3500 if (phy_data->redrv && netif_msg_probe(pdata)) { in xgbe_phy_init()
3501 dev_dbg(pdata->dev, "redrv present\n"); in xgbe_phy_init()
3502 dev_dbg(pdata->dev, "redrv i/f=%u\n", phy_data->redrv_if); in xgbe_phy_init()
3503 dev_dbg(pdata->dev, "redrv addr=%#x\n", phy_data->redrv_addr); in xgbe_phy_init()
3504 dev_dbg(pdata->dev, "redrv lane=%u\n", phy_data->redrv_lane); in xgbe_phy_init()
3505 dev_dbg(pdata->dev, "redrv model=%u\n", phy_data->redrv_model); in xgbe_phy_init()
3510 dev_err(pdata->dev, "phy mode/connection mismatch (%#x/%#x)\n", in xgbe_phy_init()
3511 phy_data->port_mode, phy_data->conn_type); in xgbe_phy_init()
3512 return -EINVAL; in xgbe_phy_init()
3517 dev_err(pdata->dev, "phy mode/speed mismatch (%#x/%#x)\n", in xgbe_phy_init()
3518 phy_data->port_mode, phy_data->port_speeds); in xgbe_phy_init()
3519 return -EINVAL; in xgbe_phy_init()
3527 /* Validate the re-driver information */ in xgbe_phy_init()
3529 dev_err(pdata->dev, "phy re-driver settings error\n"); in xgbe_phy_init()
3530 return -EINVAL; in xgbe_phy_init()
3532 pdata->kr_redrv = phy_data->redrv; in xgbe_phy_init()
3535 phy_data->cur_mode = XGBE_MODE_UNKNOWN; in xgbe_phy_init()
3540 switch (phy_data->port_mode) { in xgbe_phy_init()
3549 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) { in xgbe_phy_init()
3551 phy_data->start_mode = XGBE_MODE_KX_1000; in xgbe_phy_init()
3553 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) { in xgbe_phy_init()
3555 if (pdata->fec_ability & MDIO_PMA_10GBR_FECABLE_ABLE) in xgbe_phy_init()
3557 phy_data->start_mode = XGBE_MODE_KR; in xgbe_phy_init()
3560 phy_data->phydev_mode = XGBE_MDIO_MODE_NONE; in xgbe_phy_init()
3567 phy_data->start_mode = XGBE_MODE_KX_2500; in xgbe_phy_init()
3569 phy_data->phydev_mode = XGBE_MDIO_MODE_NONE; in xgbe_phy_init()
3572 /* MDIO 1GBase-T support */ in xgbe_phy_init()
3578 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) { in xgbe_phy_init()
3580 phy_data->start_mode = XGBE_MODE_SGMII_10; in xgbe_phy_init()
3582 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) { in xgbe_phy_init()
3584 phy_data->start_mode = XGBE_MODE_SGMII_100; in xgbe_phy_init()
3586 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) { in xgbe_phy_init()
3588 phy_data->start_mode = XGBE_MODE_SGMII_1000; in xgbe_phy_init()
3591 phy_data->phydev_mode = XGBE_MDIO_MODE_CL22; in xgbe_phy_init()
3594 /* MDIO Base-X support */ in xgbe_phy_init()
3601 phy_data->start_mode = XGBE_MODE_X; in xgbe_phy_init()
3603 phy_data->phydev_mode = XGBE_MDIO_MODE_CL22; in xgbe_phy_init()
3606 /* MDIO NBase-T support */ in xgbe_phy_init()
3612 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) { in xgbe_phy_init()
3614 phy_data->start_mode = XGBE_MODE_SGMII_10; in xgbe_phy_init()
3616 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) { in xgbe_phy_init()
3618 phy_data->start_mode = XGBE_MODE_SGMII_100; in xgbe_phy_init()
3620 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) { in xgbe_phy_init()
3622 phy_data->start_mode = XGBE_MODE_SGMII_1000; in xgbe_phy_init()
3624 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500) { in xgbe_phy_init()
3626 phy_data->start_mode = XGBE_MODE_KX_2500; in xgbe_phy_init()
3629 phy_data->phydev_mode = XGBE_MDIO_MODE_CL45; in xgbe_phy_init()
3632 /* 10GBase-T support */ in xgbe_phy_init()
3638 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) { in xgbe_phy_init()
3640 phy_data->start_mode = XGBE_MODE_SGMII_10; in xgbe_phy_init()
3642 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) { in xgbe_phy_init()
3644 phy_data->start_mode = XGBE_MODE_SGMII_100; in xgbe_phy_init()
3646 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) { in xgbe_phy_init()
3648 phy_data->start_mode = XGBE_MODE_SGMII_1000; in xgbe_phy_init()
3650 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500) { in xgbe_phy_init()
3652 phy_data->start_mode = XGBE_MODE_KX_2500; in xgbe_phy_init()
3654 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) { in xgbe_phy_init()
3656 phy_data->start_mode = XGBE_MODE_KR; in xgbe_phy_init()
3659 phy_data->phydev_mode = XGBE_MDIO_MODE_CL45; in xgbe_phy_init()
3662 /* 10GBase-R support */ in xgbe_phy_init()
3672 if (pdata->fec_ability & MDIO_PMA_10GBR_FECABLE_ABLE) in xgbe_phy_init()
3674 phy_data->start_mode = XGBE_MODE_SFI; in xgbe_phy_init()
3676 phy_data->phydev_mode = XGBE_MDIO_MODE_NONE; in xgbe_phy_init()
3686 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) in xgbe_phy_init()
3687 phy_data->start_mode = XGBE_MODE_SGMII_10; in xgbe_phy_init()
3688 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) in xgbe_phy_init()
3689 phy_data->start_mode = XGBE_MODE_SGMII_100; in xgbe_phy_init()
3690 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) in xgbe_phy_init()
3691 phy_data->start_mode = XGBE_MODE_SGMII_1000; in xgbe_phy_init()
3692 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) in xgbe_phy_init()
3693 phy_data->start_mode = XGBE_MODE_SFI; in xgbe_phy_init()
3695 phy_data->phydev_mode = XGBE_MDIO_MODE_CL22; in xgbe_phy_init()
3700 return -EINVAL; in xgbe_phy_init()
3704 dev_dbg(pdata->dev, "phy supported=0x%*pb\n", in xgbe_phy_init()
3706 lks->link_modes.supported); in xgbe_phy_init()
3708 if ((phy_data->conn_type & XGBE_CONN_TYPE_MDIO) && in xgbe_phy_init()
3709 (phy_data->phydev_mode != XGBE_MDIO_MODE_NONE)) { in xgbe_phy_init()
3710 ret = pdata->hw_if.set_ext_mii_mode(pdata, phy_data->mdio_addr, in xgbe_phy_init()
3711 phy_data->phydev_mode); in xgbe_phy_init()
3713 dev_err(pdata->dev, in xgbe_phy_init()
3715 phy_data->mdio_addr, phy_data->phydev_mode); in xgbe_phy_init()
3716 return -EINVAL; in xgbe_phy_init()
3720 if (phy_data->redrv && !phy_data->redrv_if) { in xgbe_phy_init()
3721 ret = pdata->hw_if.set_ext_mii_mode(pdata, phy_data->redrv_addr, in xgbe_phy_init()
3724 dev_err(pdata->dev, in xgbe_phy_init()
3726 phy_data->redrv_addr); in xgbe_phy_init()
3727 return -EINVAL; in xgbe_phy_init()
3731 phy_data->phy_cdr_delay = XGBE_CDR_DELAY_INIT; in xgbe_phy_init()
3734 mii = devm_mdiobus_alloc(pdata->dev); in xgbe_phy_init()
3736 dev_err(pdata->dev, "mdiobus_alloc failed\n"); in xgbe_phy_init()
3737 return -ENOMEM; in xgbe_phy_init()
3740 mii->priv = pdata; in xgbe_phy_init()
3741 mii->name = "amd-xgbe-mii"; in xgbe_phy_init()
3742 mii->read = xgbe_phy_mii_read_c22; in xgbe_phy_init()
3743 mii->write = xgbe_phy_mii_write_c22; in xgbe_phy_init()
3744 mii->read_c45 = xgbe_phy_mii_read_c45; in xgbe_phy_init()
3745 mii->write_c45 = xgbe_phy_mii_write_c45; in xgbe_phy_init()
3746 mii->parent = pdata->dev; in xgbe_phy_init()
3747 mii->phy_mask = ~0; in xgbe_phy_init()
3748 snprintf(mii->id, sizeof(mii->id), "%s", dev_name(pdata->dev)); in xgbe_phy_init()
3751 dev_err(pdata->dev, "mdiobus_register failed\n"); in xgbe_phy_init()
3754 phy_data->mii = mii; in xgbe_phy_init()
3761 struct xgbe_phy_impl_if *phy_impl = &phy_if->phy_impl; in xgbe_init_function_ptrs_phy_v2()
3763 phy_impl->init = xgbe_phy_init; in xgbe_init_function_ptrs_phy_v2()
3764 phy_impl->exit = xgbe_phy_exit; in xgbe_init_function_ptrs_phy_v2()
3766 phy_impl->reset = xgbe_phy_reset; in xgbe_init_function_ptrs_phy_v2()
3767 phy_impl->start = xgbe_phy_start; in xgbe_init_function_ptrs_phy_v2()
3768 phy_impl->stop = xgbe_phy_stop; in xgbe_init_function_ptrs_phy_v2()
3770 phy_impl->link_status = xgbe_phy_link_status; in xgbe_init_function_ptrs_phy_v2()
3772 phy_impl->valid_speed = xgbe_phy_valid_speed; in xgbe_init_function_ptrs_phy_v2()
3774 phy_impl->use_mode = xgbe_phy_use_mode; in xgbe_init_function_ptrs_phy_v2()
3775 phy_impl->set_mode = xgbe_phy_set_mode; in xgbe_init_function_ptrs_phy_v2()
3776 phy_impl->get_mode = xgbe_phy_get_mode; in xgbe_init_function_ptrs_phy_v2()
3777 phy_impl->switch_mode = xgbe_phy_switch_mode; in xgbe_init_function_ptrs_phy_v2()
3778 phy_impl->cur_mode = xgbe_phy_cur_mode; in xgbe_init_function_ptrs_phy_v2()
3780 phy_impl->an_mode = xgbe_phy_an_mode; in xgbe_init_function_ptrs_phy_v2()
3782 phy_impl->an_config = xgbe_phy_an_config; in xgbe_init_function_ptrs_phy_v2()
3784 phy_impl->an_advertising = xgbe_phy_an_advertising; in xgbe_init_function_ptrs_phy_v2()
3786 phy_impl->an_outcome = xgbe_phy_an_outcome; in xgbe_init_function_ptrs_phy_v2()
3788 phy_impl->an_pre = xgbe_phy_an_pre; in xgbe_init_function_ptrs_phy_v2()
3789 phy_impl->an_post = xgbe_phy_an_post; in xgbe_init_function_ptrs_phy_v2()
3791 phy_impl->kr_training_pre = xgbe_phy_kr_training_pre; in xgbe_init_function_ptrs_phy_v2()
3792 phy_impl->kr_training_post = xgbe_phy_kr_training_post; in xgbe_init_function_ptrs_phy_v2()
3794 phy_impl->module_info = xgbe_phy_module_info; in xgbe_init_function_ptrs_phy_v2()
3795 phy_impl->module_eeprom = xgbe_phy_module_eeprom; in xgbe_init_function_ptrs_phy_v2()