Lines Matching refs:REGA
166 #define REGA(a) (*( AREG = (a), &DREG )) macro
356 REGA(CSR0) = CSR0_STOP; in lance_probe()
420 REGA(CSR0) = CSR0_STOP; in lance_open()
425 REGA(CSR0) = CSR0_INIT; in lance_open()
498 REGA(CSR1) = dvma_vtob(&(MEM->init)); in lance_init_ring()
499 REGA(CSR2) = dvma_vtob(&(MEM->init)) >> 16; in lance_init_ring()
502 REGA(CSR3) = CSR3_BSWP | CSR3_ACON | CSR3_BCON; in lance_init_ring()
504 REGA(CSR3) = CSR3_BSWP; in lance_init_ring()
534 REGA(CSR3) = CSR3_BSWP; in lance_start_xmit()
556 REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT; in lance_start_xmit()
586 REGA( CSR0 ) = CSR0_STOP; in lance_start_xmit()
588 REGA( CSR0 ) = CSR0_INIT | CSR0_STRT; in lance_start_xmit()
632 REGA(CSR0) = CSR0_INEA | CSR0_TDMD | CSR0_STRT; in lance_start_xmit()
704 REGA(CSR0) = CSR0_STOP; in lance_interrupt()
705 REGA(CSR3) = CSR3_BSWP; in lance_interrupt()
707 REGA(CSR0) = CSR0_STRT | CSR0_INEA; in lance_interrupt()
742 REGA(CSR0) = CSR0_STOP; in lance_interrupt()
743 REGA(CSR3) = CSR3_BSWP; in lance_interrupt()
745 REGA(CSR0) = CSR0_STRT | CSR0_INEA; in lance_interrupt()
753 REGA(CSR0) = CSR0_INEA; in lance_interrupt()
897 REGA( CSR15 ) = 0x8000; /* Set promiscuous mode */ in set_multicast_list()
907 REGA( CSR8+i ) = multicast_table[i]; in set_multicast_list()
908 REGA( CSR15 ) = 0; /* Unset promiscuous mode */ in set_multicast_list()
915 REGA( CSR3 ) = CSR3_BSWP; in set_multicast_list()
918 REGA( CSR0 ) = CSR0_IDON | CSR0_INEA | CSR0_STRT; in set_multicast_list()