355 	outb_p(program_seq[i].value, ioaddr + program_seq[i].offset);  in get_prom()
415     outb_p(0x01, ioaddr + EN0_DCFG);	/* Set word-wide access. */  in get_ax88190()
416     outb_p(0x00, ioaddr + EN0_RSARLO);	/* DMA starting at 0x0400. */  in get_ax88190()
417     outb_p(0x04, ioaddr + EN0_RSARHI);  in get_ax88190()
418     outb_p(E8390_RREAD+E8390_START, ioaddr + E8390_CMD);  in get_ax88190()
780 	outb_p(EE_EEP|EE_CS|dataval, ee_addr);  in read_eeprom()
781 	outb_p(EE_EEP|EE_CS|dataval|EE_CK, ee_addr);  in read_eeprom()
786 	outb_p(EE_EEP|EE_CS | EE_CK, ee_addr);  in read_eeprom()
788 	outb_p(EE_EEP|EE_CS, ee_addr);  in read_eeprom()
819 		outb_p(EE_ASIC|EE_CS|EE_DI|dataval, ee_addr);  in write_asic()
820 		outb_p(EE_ASIC|EE_CS|EE_DI|dataval|EE_CK, ee_addr);  in write_asic()
821 		outb_p(EE_ASIC|EE_CS|EE_DI|dataval, ee_addr);  in write_asic()
830 		outb_p(EE_ASIC|EE_CS|dataval, ee_addr);  in write_asic()
831 		outb_p(EE_ASIC|EE_CS|dataval|EE_CK, ee_addr);  in write_asic()
832 		outb_p(EE_ASIC|EE_CS|dataval, ee_addr);  in write_asic()
859 	outb_p(tmp, nic_base + PCNET_MISC);  in set_misc_reg()
921     outb_p(0xFF, nic_base + EN0_ISR); /* Clear bogus intr. */  in pcnet_open()
969     outb_p(E8390_NODMA+E8390_PAGE0+E8390_STOP, nic_base + E8390_CMD);  in pcnet_reset_8390()
978     outb_p(ENISR_RESET, nic_base + EN0_ISR); /* Ack intr. */  in pcnet_reset_8390()
1147     outb_p(E8390_NODMA+E8390_PAGE0+E8390_START, nic_base + PCNET_CMD);  in dma_get_8390_hdr()
1148     outb_p(sizeof(struct e8390_pkt_hdr), nic_base + EN0_RCNTLO);  in dma_get_8390_hdr()
1149     outb_p(0, nic_base + EN0_RCNTHI);  in dma_get_8390_hdr()
1150     outb_p(0, nic_base + EN0_RSARLO);		/* On page boundary */  in dma_get_8390_hdr()
1151     outb_p(ring_page, nic_base + EN0_RSARHI);  in dma_get_8390_hdr()
1152     outb_p(E8390_RREAD+E8390_START, nic_base + PCNET_CMD);  in dma_get_8390_hdr()
1159     outb_p(ENISR_RDC, nic_base + EN0_ISR);	/* Ack intr. */  in dma_get_8390_hdr()
1182     outb_p(E8390_NODMA+E8390_PAGE0+E8390_START, nic_base + PCNET_CMD);  in dma_block_input()
1183     outb_p(count & 0xff, nic_base + EN0_RCNTLO);  in dma_block_input()
1184     outb_p(count >> 8, nic_base + EN0_RCNTHI);  in dma_block_input()
1185     outb_p(ring_offset & 0xff, nic_base + EN0_RSARLO);  in dma_block_input()
1186     outb_p(ring_offset >> 8, nic_base + EN0_RSARHI);  in dma_block_input()
1187     outb_p(E8390_RREAD+E8390_START, nic_base + PCNET_CMD);  in dma_block_input()
1216     outb_p(ENISR_RDC, nic_base + EN0_ISR);	/* Ack intr. */  in dma_block_input()
1250     outb_p(E8390_PAGE0+E8390_START+E8390_NODMA, nic_base+PCNET_CMD);  in dma_block_output()
1256     outb_p(ENISR_RDC, nic_base + EN0_ISR);  in dma_block_output()
1259     outb_p(count & 0xff, nic_base + EN0_RCNTLO);  in dma_block_output()
1260     outb_p(count >> 8,   nic_base + EN0_RCNTHI);  in dma_block_output()
1261     outb_p(0x00, nic_base + EN0_RSARLO);  in dma_block_output()
1262     outb_p(start_page, nic_base + EN0_RSARHI);  in dma_block_output()
1264     outb_p(E8390_RWRITE+E8390_START, nic_base + PCNET_CMD);  in dma_block_output()
1300     outb_p(ENISR_RDC, nic_base + EN0_ISR);	/* Ack intr. */  in dma_block_output()