Lines Matching +full:5 +full:gbit
3 * Vitesse VSC7385 SparX-G5 5+1-port Integrated Gigabit Ethernet Switch
5 * Vitesse VSC7395 SparX-G5e 5+1-port Integrated Gigabit Ethernet Switch
95 #define VSC73XX_MAC_CFG_MAC_RX_RST BIT(5)
129 #define VSC73XX_ADVPORTM_EXT_PORT BIT(5)
210 #define VSC73XX_HASH0_VID_FROM_MASK GENMASK(5, 0)
217 #define VSC73XX_HASH3_MAC3_FROM_MASK GENMASK(5, 0)
228 #define VSC73XX_HASH3_MAC3_TO_MASK GENMASK(10, 5)
249 #define VSC73XX_MACACCESS_CMD_CLEAR_TABLE 5
284 #define VSC73XX_MII_MPRES_PRESCALEVAL GENMASK(5, 0)
289 /* Arbiter block 5 registers */
363 #define VSC73XX_MDIO_POLL_SLEEP_US 5
389 { 5, "RxEtherStatsPkts64Octets" },
420 { 5, "TxEtherStatsPkts64Octets" },
903 if (i == 5) in vsc73xx_setup()
968 /* Take up the port in 1Gbit mode by default, this will be in vsc73xx_init_port()
1010 val = (vsc->addr[5] << 16) | (vsc->addr[4] << 8) | (vsc->addr[3]); in vsc73xx_init_port()
1498 indices[1] = ((val >> 5) & 0x1f); /* RX counter 1 */ in vsc73xx_get_strings()
1502 indices[5] = ((val >> 26) & 0x1f); /* TX counter 2 */ in vsc73xx_get_strings()
1589 if (port == 5) in vsc73xx_phylink_get_caps()
1908 /* VID 5-0, MAC 47-44 */ in vsc73xx_calc_hash()
1933 addr[5]; in vsc73xx_calc_hash()
2019 fdb[i].mac[5] = FIELD_GET(VSC73XX_MACLDATA_MAC5, val); in vsc73xx_port_read_mac_table_row()
2043 FIELD_PREP(VSC73XX_MACLDATA_MAC5, addr[5]); in vsc73xx_fdb_operation()
2373 vsc->addr[3], vsc->addr[4], vsc->addr[5]); in vsc73xx_probe()