Lines Matching +full:ports +full:- +full:word +full:- +full:length
1 // SPDX-License-Identifier: GPL-2.0
9 * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
27 #include "realtek-smi.h"
28 #include "realtek-mdio.h"
47 /* Switch per-port learning disablement register */
123 /* Disables inserting custom tag length/type 0x8899 */
160 * VID such as untagged or priority-tagged frames for respective
163 * a C-tag with VID != 0 for respective port.
243 /* First configuration word per member config, VID and prio */
247 /* Second configuration word per member config, member and untagged */
251 /* Third config word per member config, STAG currently unused */
363 mib->offset; in rtl8366rb_get_mib_counter()
368 ret = regmap_write(priv->map, addr, 0); /* Write whatever */ in rtl8366rb_get_mib_counter()
373 ret = regmap_read(priv->map, RTL8366RB_MIB_CTRL_REG, &val); in rtl8366rb_get_mib_counter()
375 return -EIO; in rtl8366rb_get_mib_counter()
378 return -EBUSY; in rtl8366rb_get_mib_counter()
381 return -EIO; in rtl8366rb_get_mib_counter()
385 for (i = mib->length; i > 0; i--) { in rtl8366rb_get_mib_counter()
386 ret = regmap_read(priv->map, addr + (i - 1), &val); in rtl8366rb_get_mib_counter()
414 ret = regmap_update_bits(priv->map, RTL8366RB_INTERRUPT_MASK_REG, in rtl8366rb_mask_irq()
417 dev_err(priv->dev, "could not mask IRQ\n"); in rtl8366rb_mask_irq()
425 ret = regmap_update_bits(priv->map, RTL8366RB_INTERRUPT_MASK_REG, in rtl8366rb_unmask_irq()
429 dev_err(priv->dev, "could not unmask IRQ\n"); in rtl8366rb_unmask_irq()
439 ret = regmap_read(priv->map, RTL8366RB_INTERRUPT_STATUS_REG, in rtl8366rb_irq()
442 dev_err(priv->dev, "can't read interrupt status\n"); in rtl8366rb_irq()
457 line -= 5; in rtl8366rb_irq()
458 child_irq = irq_find_mapping(priv->irqdomain, line); in rtl8366rb_irq()
473 irq_set_chip_data(irq, domain->host_data); in rtl8366rb_irq_map()
503 intc = of_get_child_by_name(priv->dev->of_node, "interrupt-controller"); in rtl8366rb_setup_cascaded_irq()
505 dev_err(priv->dev, "missing child interrupt-controller node\n"); in rtl8366rb_setup_cascaded_irq()
506 return -EINVAL; in rtl8366rb_setup_cascaded_irq()
511 dev_err(priv->dev, "failed to get parent IRQ\n"); in rtl8366rb_setup_cascaded_irq()
512 ret = irq ? irq : -EINVAL; in rtl8366rb_setup_cascaded_irq()
517 ret = regmap_read(priv->map, RTL8366RB_INTERRUPT_STATUS_REG, in rtl8366rb_setup_cascaded_irq()
520 dev_err(priv->dev, "can't read interrupt status\n"); in rtl8366rb_setup_cascaded_irq()
529 dev_info(priv->dev, "active high/rising IRQ\n"); in rtl8366rb_setup_cascaded_irq()
534 dev_info(priv->dev, "active low/falling IRQ\n"); in rtl8366rb_setup_cascaded_irq()
538 ret = regmap_update_bits(priv->map, RTL8366RB_INTERRUPT_CONTROL_REG, in rtl8366rb_setup_cascaded_irq()
542 dev_err(priv->dev, "could not configure IRQ polarity\n"); in rtl8366rb_setup_cascaded_irq()
546 ret = devm_request_threaded_irq(priv->dev, irq, NULL, in rtl8366rb_setup_cascaded_irq()
550 dev_err(priv->dev, "unable to request irq: %d\n", ret); in rtl8366rb_setup_cascaded_irq()
553 priv->irqdomain = irq_domain_add_linear(intc, in rtl8366rb_setup_cascaded_irq()
557 if (!priv->irqdomain) { in rtl8366rb_setup_cascaded_irq()
558 dev_err(priv->dev, "failed to create IRQ domain\n"); in rtl8366rb_setup_cascaded_irq()
559 ret = -EINVAL; in rtl8366rb_setup_cascaded_irq()
562 for (i = 0; i < priv->num_ports; i++) in rtl8366rb_setup_cascaded_irq()
563 irq_set_parent(irq_create_mapping(priv->irqdomain, i), irq); in rtl8366rb_setup_cascaded_irq()
578 dev_info(priv->dev, "set MAC: %02X:%02X:%02X:%02X:%02X:%02X\n", in rtl8366rb_set_addr()
581 ret = regmap_write(priv->map, RTL8366RB_SMAR0, val); in rtl8366rb_set_addr()
585 ret = regmap_write(priv->map, RTL8366RB_SMAR1, val); in rtl8366rb_set_addr()
589 ret = regmap_write(priv->map, RTL8366RB_SMAR2, val); in rtl8366rb_set_addr()
637 /* This v1 init sequence is from Belkin F5D8235 U-Boot release */
652 /* This v2 init sequence is from Belkin F5D8235 U-Boot release */
688 /* Belkin F5D8235 v1, "belkin,f5d8235-v1" */
709 * and is claimed to detect the cable length and not use more power than
710 * necessary, and the ports should enter power saving mode 10 seconds after
730 ret = regmap_read(priv->map, in rtl8366rb_jam_table()
736 ret = regmap_write(priv->map, in rtl8366rb_jam_table()
744 dev_dbg(priv->dev, "jam %04x into register %04x\n", in rtl8366rb_jam_table()
747 ret = regmap_write(priv->map, in rtl8366rb_jam_table()
766 ret = regmap_update_bits(priv->map, in rb8366rb_set_ledgroup_mode()
782 regmap_update_bits(priv->map, in rtl8366rb_setup_all_leds_off()
799 struct realtek_priv *priv = ds->priv; in rtl8366rb_setup()
808 rb = priv->chip_data; in rtl8366rb_setup()
810 ret = regmap_read(priv->map, RTL8366RB_CHIP_ID_REG, &chip_id); in rtl8366rb_setup()
812 dev_err(priv->dev, "unable to read chip id\n"); in rtl8366rb_setup()
820 dev_err(priv->dev, "unknown chip id (%04x)\n", chip_id); in rtl8366rb_setup()
821 return -ENODEV; in rtl8366rb_setup()
824 ret = regmap_read(priv->map, RTL8366RB_CHIP_VERSION_CTRL_REG, in rtl8366rb_setup()
827 dev_err(priv->dev, "unable to read chip version\n"); in rtl8366rb_setup()
831 dev_info(priv->dev, "RTL%04x ver %u chip found\n", in rtl8366rb_setup()
856 * without them, using just the off-the-shelf tables. in rtl8366rb_setup()
858 if (of_machine_is_compatible("belkin,f5d8235-v1")) { in rtl8366rb_setup()
872 /* Isolate all user ports so they can only send packets to itself and the CPU port */ in rtl8366rb_setup()
874 ret = regmap_write(priv->map, RTL8366RB_PORT_ISO(i), in rtl8366rb_setup()
880 /* CPU port can send packets to all ports */ in rtl8366rb_setup()
881 ret = regmap_write(priv->map, RTL8366RB_PORT_ISO(RTL8366RB_PORT_NUM_CPU), in rtl8366rb_setup()
893 ret = regmap_write(priv->map, in rtl8366rb_setup()
900 ret = regmap_write(priv->map, 0x0c, 0x240); in rtl8366rb_setup()
903 ret = regmap_write(priv->map, 0x0d, 0x240); in rtl8366rb_setup()
917 ret = regmap_update_bits(priv->map, RTL8366RB_CPU_CTRL_REG, in rtl8366rb_setup()
919 BIT(priv->cpu_port)); in rtl8366rb_setup()
923 /* Make sure we default-enable the fixed CPU port */ in rtl8366rb_setup()
924 ret = regmap_update_bits(priv->map, RTL8366RB_PECR, in rtl8366rb_setup()
925 BIT(priv->cpu_port), in rtl8366rb_setup()
930 /* Set default maximum packet length to 1536 bytes */ in rtl8366rb_setup()
931 ret = regmap_update_bits(priv->map, RTL8366RB_SGCR, in rtl8366rb_setup()
937 if (i == priv->cpu_port) in rtl8366rb_setup()
939 rb->max_mtu[i] = ETH_DATA_LEN + RTL8366RB_CPU_TAG_SIZE; in rtl8366rb_setup()
941 rb->max_mtu[i] = ETH_DATA_LEN; in rtl8366rb_setup()
944 /* Disable learning for all ports */ in rtl8366rb_setup()
945 ret = regmap_write(priv->map, RTL8366RB_PORT_LEARNDIS_CTRL, in rtl8366rb_setup()
950 /* Enable auto ageing for all ports */ in rtl8366rb_setup()
951 ret = regmap_write(priv->map, RTL8366RB_SECURITY_CTRL, 0); in rtl8366rb_setup()
962 ret = regmap_update_bits(priv->map, RTL8366RB_PMC0, in rtl8366rb_setup()
968 /* Accept all packets by default, we enable filtering on-demand */ in rtl8366rb_setup()
969 ret = regmap_write(priv->map, RTL8366RB_VLAN_INGRESS_CTRL1_REG, in rtl8366rb_setup()
973 ret = regmap_write(priv->map, RTL8366RB_VLAN_INGRESS_CTRL2_REG, in rtl8366rb_setup()
979 ret = regmap_update_bits(priv->map, RTL8366RB_SSCR2, in rtl8366rb_setup()
987 ret = regmap_update_bits(priv->map, RTL8366RB_LED_BLINKRATE_REG, in rtl8366rb_setup()
995 * hardware trigger across all ports. LEDs can only be indiviually in rtl8366rb_setup()
999 if (priv->leds_disabled) { in rtl8366rb_setup()
1015 dev_info(priv->dev, "no interrupt support\n"); in rtl8366rb_setup()
1019 dev_err(priv->dev, "could not set up MDIO bus\n"); in rtl8366rb_setup()
1020 return -ENODEV; in rtl8366rb_setup()
1037 unsigned long *interfaces = config->supported_interfaces; in rtl8366rb_phylink_get_caps()
1038 struct realtek_priv *priv = ds->priv; in rtl8366rb_phylink_get_caps()
1040 if (port == priv->cpu_port) { in rtl8366rb_phylink_get_caps()
1048 config->mac_capabilities = MAC_1000 | MAC_100 | in rtl8366rb_phylink_get_caps()
1055 config->mac_capabilities = MAC_1000 | MAC_100 | MAC_10 | in rtl8366rb_phylink_get_caps()
1072 struct realtek_priv *priv = dp->ds->priv; in rtl8366rb_mac_link_up()
1073 int port = dp->index; in rtl8366rb_mac_link_up()
1078 * We assume autonegotiation works on the PHY-facing ports. in rtl8366rb_mac_link_up()
1080 if (port != priv->cpu_port) in rtl8366rb_mac_link_up()
1083 dev_dbg(priv->dev, "MAC link up on CPU port (%d)\n", port); in rtl8366rb_mac_link_up()
1085 ret = regmap_update_bits(priv->map, RTL8366RB_MAC_FORCE_CTRL_REG, in rtl8366rb_mac_link_up()
1088 dev_err(priv->dev, "failed to force CPU port\n"); in rtl8366rb_mac_link_up()
1119 ret = regmap_update_bits(priv->map, RTL8366RB_PAACR2, in rtl8366rb_mac_link_up()
1123 dev_err(priv->dev, "failed to set PAACR on CPU port\n"); in rtl8366rb_mac_link_up()
1127 dev_dbg(priv->dev, "set PAACR to %04x\n", val); in rtl8366rb_mac_link_up()
1130 ret = regmap_update_bits(priv->map, RTL8366RB_PECR, BIT(port), in rtl8366rb_mac_link_up()
1133 dev_err(priv->dev, "failed to enable the CPU port\n"); in rtl8366rb_mac_link_up()
1143 struct realtek_priv *priv = dp->ds->priv; in rtl8366rb_mac_link_down()
1144 int port = dp->index; in rtl8366rb_mac_link_down()
1147 if (port != priv->cpu_port) in rtl8366rb_mac_link_down()
1150 dev_dbg(priv->dev, "MAC link down on CPU port (%d)\n", port); in rtl8366rb_mac_link_down()
1153 ret = regmap_update_bits(priv->map, RTL8366RB_PECR, BIT(port), in rtl8366rb_mac_link_down()
1156 dev_err(priv->dev, "failed to disable the CPU port\n"); in rtl8366rb_mac_link_down()
1165 struct realtek_priv *priv = ds->priv; in rtl8366rb_port_enable()
1168 dev_dbg(priv->dev, "enable port %d\n", port); in rtl8366rb_port_enable()
1169 ret = regmap_update_bits(priv->map, RTL8366RB_PECR, BIT(port), in rtl8366rb_port_enable()
1180 struct realtek_priv *priv = ds->priv; in rtl8366rb_port_disable()
1183 dev_dbg(priv->dev, "disable port %d\n", port); in rtl8366rb_port_disable()
1184 ret = regmap_update_bits(priv->map, RTL8366RB_PECR, BIT(port), in rtl8366rb_port_disable()
1196 struct realtek_priv *priv = ds->priv; in rtl8366rb_port_bridge_join()
1200 /* Loop over all other ports than the current one */ in rtl8366rb_port_bridge_join()
1209 ret = regmap_update_bits(priv->map, RTL8366RB_PORT_ISO(i), in rtl8366rb_port_bridge_join()
1213 dev_err(priv->dev, "failed to join port %d\n", port); in rtl8366rb_port_bridge_join()
1218 /* Set the bits for the ports we can access */ in rtl8366rb_port_bridge_join()
1219 return regmap_update_bits(priv->map, RTL8366RB_PORT_ISO(port), in rtl8366rb_port_bridge_join()
1228 struct realtek_priv *priv = ds->priv; in rtl8366rb_port_bridge_leave()
1232 /* Loop over all other ports than this one */ in rtl8366rb_port_bridge_leave()
1241 ret = regmap_update_bits(priv->map, RTL8366RB_PORT_ISO(i), in rtl8366rb_port_bridge_leave()
1244 dev_err(priv->dev, "failed to leave port %d\n", port); in rtl8366rb_port_bridge_leave()
1249 /* Clear the bits for the ports we can not access, leave ourselves */ in rtl8366rb_port_bridge_leave()
1250 regmap_update_bits(priv->map, RTL8366RB_PORT_ISO(port), in rtl8366rb_port_bridge_leave()
1255 * rtl8366rb_drop_untagged() - make the switch drop untagged and C-tagged frames
1257 * @port: the port to drop untagged and C-tagged frames on
1258 * @drop: whether to drop or pass untagged and C-tagged frames
1264 return regmap_update_bits(priv->map, RTL8366RB_VLAN_INGRESS_CTRL1_REG, in rtl8366rb_drop_untagged()
1273 struct realtek_priv *priv = ds->priv; in rtl8366rb_vlan_filtering()
1277 rb = priv->chip_data; in rtl8366rb_vlan_filtering()
1279 dev_dbg(priv->dev, "port %d: %s VLAN filtering\n", port, in rtl8366rb_vlan_filtering()
1283 ret = regmap_update_bits(priv->map, RTL8366RB_VLAN_INGRESS_CTRL2_REG, in rtl8366rb_vlan_filtering()
1289 * not drop any untagged or C-tagged frames. If we turn off VLAN in rtl8366rb_vlan_filtering()
1293 ret = rtl8366rb_drop_untagged(priv, port, !rb->pvid_enabled[port]); in rtl8366rb_vlan_filtering()
1307 return -EINVAL; in rtl8366rb_port_pre_bridge_flags()
1317 struct realtek_priv *priv = ds->priv; in rtl8366rb_port_bridge_flags()
1321 ret = regmap_update_bits(priv->map, RTL8366RB_PORT_LEARNDIS_CTRL, in rtl8366rb_port_bridge_flags()
1334 struct realtek_priv *priv = ds->priv; in rtl8366rb_port_stp_state_set()
1353 dev_err(priv->dev, "unknown bridge state requested\n"); in rtl8366rb_port_stp_state_set()
1359 regmap_update_bits(priv->map, RTL8366RB_STP_STATE_BASE + i, in rtl8366rb_port_stp_state_set()
1368 struct realtek_priv *priv = ds->priv; in rtl8366rb_port_fast_age()
1371 regmap_update_bits(priv->map, RTL8366RB_SECURITY_CTRL, in rtl8366rb_port_fast_age()
1374 regmap_update_bits(priv->map, RTL8366RB_SECURITY_CTRL, in rtl8366rb_port_fast_age()
1380 struct realtek_priv *priv = ds->priv; in rtl8366rb_change_mtu()
1386 /* Cache the per-port MTU setting */ in rtl8366rb_change_mtu()
1387 rb = priv->chip_data; in rtl8366rb_change_mtu()
1388 rb->max_mtu[port] = new_mtu; in rtl8366rb_change_mtu()
1396 if (rb->max_mtu[i] > max_mtu) in rtl8366rb_change_mtu()
1397 max_mtu = rb->max_mtu[i]; in rtl8366rb_change_mtu()
1420 return regmap_update_bits(priv->map, RTL8366RB_SGCR, in rtl8366rb_change_mtu()
1429 * 16000 - 18 - 4 = 15978. This does not include the CPU tag in rtl8366rb_max_mtu()
1432 return 16000 - VLAN_ETH_HLEN - ETH_FCS_LEN; in rtl8366rb_max_mtu()
1445 return -EINVAL; in rtl8366rb_get_vlan_4k()
1448 ret = regmap_write(priv->map, RTL8366RB_VLAN_TABLE_WRITE_BASE, in rtl8366rb_get_vlan_4k()
1453 /* write table access control word */ in rtl8366rb_get_vlan_4k()
1454 ret = regmap_write(priv->map, RTL8366RB_TABLE_ACCESS_CTRL_REG, in rtl8366rb_get_vlan_4k()
1460 ret = regmap_read(priv->map, in rtl8366rb_get_vlan_4k()
1467 vlan4k->vid = vid; in rtl8366rb_get_vlan_4k()
1468 vlan4k->untag = (data[1] >> RTL8366RB_VLAN_UNTAG_SHIFT) & in rtl8366rb_get_vlan_4k()
1470 vlan4k->member = data[1] & RTL8366RB_VLAN_MEMBER_MASK; in rtl8366rb_get_vlan_4k()
1471 vlan4k->fid = data[2] & RTL8366RB_VLAN_FID_MASK; in rtl8366rb_get_vlan_4k()
1483 if (vlan4k->vid >= RTL8366RB_NUM_VIDS || in rtl8366rb_set_vlan_4k()
1484 vlan4k->member > RTL8366RB_VLAN_MEMBER_MASK || in rtl8366rb_set_vlan_4k()
1485 vlan4k->untag > RTL8366RB_VLAN_UNTAG_MASK || in rtl8366rb_set_vlan_4k()
1486 vlan4k->fid > RTL8366RB_FIDMAX) in rtl8366rb_set_vlan_4k()
1487 return -EINVAL; in rtl8366rb_set_vlan_4k()
1489 data[0] = vlan4k->vid & RTL8366RB_VLAN_VID_MASK; in rtl8366rb_set_vlan_4k()
1490 data[1] = (vlan4k->member & RTL8366RB_VLAN_MEMBER_MASK) | in rtl8366rb_set_vlan_4k()
1491 ((vlan4k->untag & RTL8366RB_VLAN_UNTAG_MASK) << in rtl8366rb_set_vlan_4k()
1493 data[2] = vlan4k->fid & RTL8366RB_VLAN_FID_MASK; in rtl8366rb_set_vlan_4k()
1496 ret = regmap_write(priv->map, in rtl8366rb_set_vlan_4k()
1503 /* write table access control word */ in rtl8366rb_set_vlan_4k()
1504 ret = regmap_write(priv->map, RTL8366RB_TABLE_ACCESS_CTRL_REG, in rtl8366rb_set_vlan_4k()
1520 return -EINVAL; in rtl8366rb_get_vlan_mc()
1523 ret = regmap_read(priv->map, in rtl8366rb_get_vlan_mc()
1530 vlanmc->vid = data[0] & RTL8366RB_VLAN_VID_MASK; in rtl8366rb_get_vlan_mc()
1531 vlanmc->priority = (data[0] >> RTL8366RB_VLAN_PRIORITY_SHIFT) & in rtl8366rb_get_vlan_mc()
1533 vlanmc->untag = (data[1] >> RTL8366RB_VLAN_UNTAG_SHIFT) & in rtl8366rb_get_vlan_mc()
1535 vlanmc->member = data[1] & RTL8366RB_VLAN_MEMBER_MASK; in rtl8366rb_get_vlan_mc()
1536 vlanmc->fid = data[2] & RTL8366RB_VLAN_FID_MASK; in rtl8366rb_get_vlan_mc()
1549 vlanmc->vid >= RTL8366RB_NUM_VIDS || in rtl8366rb_set_vlan_mc()
1550 vlanmc->priority > RTL8366RB_PRIORITYMAX || in rtl8366rb_set_vlan_mc()
1551 vlanmc->member > RTL8366RB_VLAN_MEMBER_MASK || in rtl8366rb_set_vlan_mc()
1552 vlanmc->untag > RTL8366RB_VLAN_UNTAG_MASK || in rtl8366rb_set_vlan_mc()
1553 vlanmc->fid > RTL8366RB_FIDMAX) in rtl8366rb_set_vlan_mc()
1554 return -EINVAL; in rtl8366rb_set_vlan_mc()
1556 data[0] = (vlanmc->vid & RTL8366RB_VLAN_VID_MASK) | in rtl8366rb_set_vlan_mc()
1557 ((vlanmc->priority & RTL8366RB_VLAN_PRIORITY_MASK) << in rtl8366rb_set_vlan_mc()
1559 data[1] = (vlanmc->member & RTL8366RB_VLAN_MEMBER_MASK) | in rtl8366rb_set_vlan_mc()
1560 ((vlanmc->untag & RTL8366RB_VLAN_UNTAG_MASK) << in rtl8366rb_set_vlan_mc()
1562 data[2] = vlanmc->fid & RTL8366RB_VLAN_FID_MASK; in rtl8366rb_set_vlan_mc()
1565 ret = regmap_write(priv->map, in rtl8366rb_set_vlan_mc()
1580 if (port >= priv->num_ports) in rtl8366rb_get_mc_index()
1581 return -EINVAL; in rtl8366rb_get_mc_index()
1583 ret = regmap_read(priv->map, RTL8366RB_PORT_VLAN_CTRL_REG(port), in rtl8366rb_get_mc_index()
1596 struct dsa_switch *ds = &priv->ds; in rtl8366rb_set_mc_index()
1601 rb = priv->chip_data; in rtl8366rb_set_mc_index()
1604 if (port >= priv->num_ports || index >= RTL8366RB_NUM_VLANS) in rtl8366rb_set_mc_index()
1605 return -EINVAL; in rtl8366rb_set_mc_index()
1607 ret = regmap_update_bits(priv->map, RTL8366RB_PORT_VLAN_CTRL_REG(port), in rtl8366rb_set_mc_index()
1615 rb->pvid_enabled[port] = pvid_enabled; in rtl8366rb_set_mc_index()
1618 * not drop any untagged or C-tagged frames. Make sure to update the in rtl8366rb_set_mc_index()
1629 unsigned int max = RTL8366RB_NUM_VLANS - 1; in rtl8366rb_is_vlan_valid()
1631 if (priv->vlan4k_enabled) in rtl8366rb_is_vlan_valid()
1632 max = RTL8366RB_NUM_VIDS - 1; in rtl8366rb_is_vlan_valid()
1642 dev_dbg(priv->dev, "%s VLAN\n", str_enable_disable(enable)); in rtl8366rb_enable_vlan()
1643 return regmap_update_bits(priv->map, in rtl8366rb_enable_vlan()
1650 dev_dbg(priv->dev, "%s VLAN 4k\n", str_enable_disable(enable)); in rtl8366rb_enable_vlan4k()
1651 return regmap_update_bits(priv->map, RTL8366RB_SGCR, in rtl8366rb_enable_vlan4k()
1663 return -EINVAL; in rtl8366rb_phy_read()
1667 ret = regmap_write(priv->map_nolock, RTL8366RB_PHY_ACCESS_CTRL_REG, in rtl8366rb_phy_read()
1674 ret = regmap_write(priv->map_nolock, reg, 0); in rtl8366rb_phy_read()
1676 dev_err(priv->dev, in rtl8366rb_phy_read()
1682 ret = regmap_read(priv->map_nolock, RTL8366RB_PHY_ACCESS_DATA_REG, in rtl8366rb_phy_read()
1689 dev_dbg(priv->dev, "read PHY%d register 0x%04x @ %08x, val <- %04x\n", in rtl8366rb_phy_read()
1705 return -EINVAL; in rtl8366rb_phy_write()
1709 ret = regmap_write(priv->map_nolock, RTL8366RB_PHY_ACCESS_CTRL_REG, in rtl8366rb_phy_write()
1716 dev_dbg(priv->dev, "write PHY%d register 0x%04x @ %04x, val -> %04x\n", in rtl8366rb_phy_write()
1719 ret = regmap_write(priv->map_nolock, reg, val); in rtl8366rb_phy_write()
1735 priv->write_reg_noack(priv, RTL8366RB_RESET_CTRL_REG, in rtl8366rb_reset_chip()
1739 ret = regmap_read(priv->map, RTL8366RB_RESET_CTRL_REG, &val); in rtl8366rb_reset_chip()
1745 } while (--timeout); in rtl8366rb_reset_chip()
1748 dev_err(priv->dev, "timeout waiting for the switch to reset\n"); in rtl8366rb_reset_chip()
1749 return -EIO; in rtl8366rb_reset_chip()
1757 struct device *dev = priv->dev; in rtl8366rb_detect()
1762 ret = regmap_read(priv->map, 0x5c, &val); in rtl8366rb_detect()
1772 return -ENODEV; in rtl8366rb_detect()
1775 priv->cpu_port = RTL8366RB_PORT_NUM_CPU; in rtl8366rb_detect()
1776 priv->num_ports = RTL8366RB_NUM_PORTS; in rtl8366rb_detect()
1777 priv->num_vlan_mc = RTL8366RB_NUM_VLANS; in rtl8366rb_detect()
1778 priv->mib_counters = rtl8366rb_mib_counters; in rtl8366rb_detect()
1779 priv->num_mib_counters = ARRAY_SIZE(rtl8366rb_mib_counters); in rtl8366rb_detect()
1856 .name = "rtl8366rb-smi",
1866 .name = "rtl8366rb-mdio",