Lines Matching +full:cpu +full:- +full:facing
1 // SPDX-License-Identifier: GPL-2.0
9 * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
27 #include "realtek-smi.h"
28 #include "realtek-mdio.h"
47 /* Switch per-port learning disablement register */
120 /* CPU port control reg */
160 * VID such as untagged or priority-tagged frames for respective
163 * a C-tag with VID != 0 for respective port.
221 #define RTL8366RB_PORT_CPU BIT(5) /* CPU port */
363 mib->offset; in rtl8366rb_get_mib_counter()
368 ret = regmap_write(priv->map, addr, 0); /* Write whatever */ in rtl8366rb_get_mib_counter()
373 ret = regmap_read(priv->map, RTL8366RB_MIB_CTRL_REG, &val); in rtl8366rb_get_mib_counter()
375 return -EIO; in rtl8366rb_get_mib_counter()
378 return -EBUSY; in rtl8366rb_get_mib_counter()
381 return -EIO; in rtl8366rb_get_mib_counter()
385 for (i = mib->length; i > 0; i--) { in rtl8366rb_get_mib_counter()
386 ret = regmap_read(priv->map, addr + (i - 1), &val); in rtl8366rb_get_mib_counter()
414 ret = regmap_update_bits(priv->map, RTL8366RB_INTERRUPT_MASK_REG, in rtl8366rb_mask_irq()
417 dev_err(priv->dev, "could not mask IRQ\n"); in rtl8366rb_mask_irq()
425 ret = regmap_update_bits(priv->map, RTL8366RB_INTERRUPT_MASK_REG, in rtl8366rb_unmask_irq()
429 dev_err(priv->dev, "could not unmask IRQ\n"); in rtl8366rb_unmask_irq()
439 ret = regmap_read(priv->map, RTL8366RB_INTERRUPT_STATUS_REG, in rtl8366rb_irq()
442 dev_err(priv->dev, "can't read interrupt status\n"); in rtl8366rb_irq()
457 line -= 5; in rtl8366rb_irq()
458 child_irq = irq_find_mapping(priv->irqdomain, line); in rtl8366rb_irq()
473 irq_set_chip_data(irq, domain->host_data); in rtl8366rb_irq_map()
503 intc = of_get_child_by_name(priv->dev->of_node, "interrupt-controller"); in rtl8366rb_setup_cascaded_irq()
505 dev_err(priv->dev, "missing child interrupt-controller node\n"); in rtl8366rb_setup_cascaded_irq()
506 return -EINVAL; in rtl8366rb_setup_cascaded_irq()
511 dev_err(priv->dev, "failed to get parent IRQ\n"); in rtl8366rb_setup_cascaded_irq()
512 ret = irq ? irq : -EINVAL; in rtl8366rb_setup_cascaded_irq()
517 ret = regmap_read(priv->map, RTL8366RB_INTERRUPT_STATUS_REG, in rtl8366rb_setup_cascaded_irq()
520 dev_err(priv->dev, "can't read interrupt status\n"); in rtl8366rb_setup_cascaded_irq()
529 dev_info(priv->dev, "active high/rising IRQ\n"); in rtl8366rb_setup_cascaded_irq()
534 dev_info(priv->dev, "active low/falling IRQ\n"); in rtl8366rb_setup_cascaded_irq()
538 ret = regmap_update_bits(priv->map, RTL8366RB_INTERRUPT_CONTROL_REG, in rtl8366rb_setup_cascaded_irq()
542 dev_err(priv->dev, "could not configure IRQ polarity\n"); in rtl8366rb_setup_cascaded_irq()
546 ret = devm_request_threaded_irq(priv->dev, irq, NULL, in rtl8366rb_setup_cascaded_irq()
550 dev_err(priv->dev, "unable to request irq: %d\n", ret); in rtl8366rb_setup_cascaded_irq()
553 priv->irqdomain = irq_domain_create_linear(of_fwnode_handle(intc), RTL8366RB_NUM_INTERRUPT, in rtl8366rb_setup_cascaded_irq()
555 if (!priv->irqdomain) { in rtl8366rb_setup_cascaded_irq()
556 dev_err(priv->dev, "failed to create IRQ domain\n"); in rtl8366rb_setup_cascaded_irq()
557 ret = -EINVAL; in rtl8366rb_setup_cascaded_irq()
560 for (i = 0; i < priv->num_ports; i++) in rtl8366rb_setup_cascaded_irq()
561 irq_set_parent(irq_create_mapping(priv->irqdomain, i), irq); in rtl8366rb_setup_cascaded_irq()
576 dev_info(priv->dev, "set MAC: %02X:%02X:%02X:%02X:%02X:%02X\n", in rtl8366rb_set_addr()
579 ret = regmap_write(priv->map, RTL8366RB_SMAR0, val); in rtl8366rb_set_addr()
583 ret = regmap_write(priv->map, RTL8366RB_SMAR1, val); in rtl8366rb_set_addr()
587 ret = regmap_write(priv->map, RTL8366RB_SMAR2, val); in rtl8366rb_set_addr()
635 /* This v1 init sequence is from Belkin F5D8235 U-Boot release */
650 /* This v2 init sequence is from Belkin F5D8235 U-Boot release */
686 /* Belkin F5D8235 v1, "belkin,f5d8235-v1" */
728 ret = regmap_read(priv->map, in rtl8366rb_jam_table()
734 ret = regmap_write(priv->map, in rtl8366rb_jam_table()
742 dev_dbg(priv->dev, "jam %04x into register %04x\n", in rtl8366rb_jam_table()
745 ret = regmap_write(priv->map, in rtl8366rb_jam_table()
764 ret = regmap_update_bits(priv->map, in rb8366rb_set_ledgroup_mode()
780 regmap_update_bits(priv->map, in rtl8366rb_setup_all_leds_off()
797 struct realtek_priv *priv = ds->priv; in rtl8366rb_setup()
806 rb = priv->chip_data; in rtl8366rb_setup()
808 ret = regmap_read(priv->map, RTL8366RB_CHIP_ID_REG, &chip_id); in rtl8366rb_setup()
810 dev_err(priv->dev, "unable to read chip id\n"); in rtl8366rb_setup()
818 dev_err(priv->dev, "unknown chip id (%04x)\n", chip_id); in rtl8366rb_setup()
819 return -ENODEV; in rtl8366rb_setup()
822 ret = regmap_read(priv->map, RTL8366RB_CHIP_VERSION_CTRL_REG, in rtl8366rb_setup()
825 dev_err(priv->dev, "unable to read chip version\n"); in rtl8366rb_setup()
829 dev_info(priv->dev, "RTL%04x ver %u chip found\n", in rtl8366rb_setup()
854 * without them, using just the off-the-shelf tables. in rtl8366rb_setup()
856 if (of_machine_is_compatible("belkin,f5d8235-v1")) { in rtl8366rb_setup()
870 /* Isolate all user ports so they can only send packets to itself and the CPU port */ in rtl8366rb_setup()
872 ret = regmap_write(priv->map, RTL8366RB_PORT_ISO(i), in rtl8366rb_setup()
878 /* CPU port can send packets to all ports */ in rtl8366rb_setup()
879 ret = regmap_write(priv->map, RTL8366RB_PORT_ISO(RTL8366RB_PORT_NUM_CPU), in rtl8366rb_setup()
891 ret = regmap_write(priv->map, in rtl8366rb_setup()
898 ret = regmap_write(priv->map, 0x0c, 0x240); in rtl8366rb_setup()
901 ret = regmap_write(priv->map, 0x0d, 0x240); in rtl8366rb_setup()
910 /* Enable CPU port with custom DSA tag 8899. in rtl8366rb_setup()
915 ret = regmap_update_bits(priv->map, RTL8366RB_CPU_CTRL_REG, in rtl8366rb_setup()
917 BIT(priv->cpu_port)); in rtl8366rb_setup()
921 /* Make sure we default-enable the fixed CPU port */ in rtl8366rb_setup()
922 ret = regmap_update_bits(priv->map, RTL8366RB_PECR, in rtl8366rb_setup()
923 BIT(priv->cpu_port), in rtl8366rb_setup()
929 ret = regmap_update_bits(priv->map, RTL8366RB_SGCR, in rtl8366rb_setup()
935 if (i == priv->cpu_port) in rtl8366rb_setup()
936 /* CPU port need to also accept the tag */ in rtl8366rb_setup()
937 rb->max_mtu[i] = ETH_DATA_LEN + RTL8366RB_CPU_TAG_SIZE; in rtl8366rb_setup()
939 rb->max_mtu[i] = ETH_DATA_LEN; in rtl8366rb_setup()
943 ret = regmap_write(priv->map, RTL8366RB_PORT_LEARNDIS_CTRL, in rtl8366rb_setup()
949 ret = regmap_write(priv->map, RTL8366RB_SECURITY_CTRL, 0); in rtl8366rb_setup()
960 ret = regmap_update_bits(priv->map, RTL8366RB_PMC0, in rtl8366rb_setup()
966 /* Accept all packets by default, we enable filtering on-demand */ in rtl8366rb_setup()
967 ret = regmap_write(priv->map, RTL8366RB_VLAN_INGRESS_CTRL1_REG, in rtl8366rb_setup()
971 ret = regmap_write(priv->map, RTL8366RB_VLAN_INGRESS_CTRL2_REG, in rtl8366rb_setup()
977 ret = regmap_update_bits(priv->map, RTL8366RB_SSCR2, in rtl8366rb_setup()
985 ret = regmap_update_bits(priv->map, RTL8366RB_LED_BLINKRATE_REG, in rtl8366rb_setup()
997 if (priv->leds_disabled) { in rtl8366rb_setup()
1013 dev_info(priv->dev, "no interrupt support\n"); in rtl8366rb_setup()
1017 dev_err(priv->dev, "could not set up MDIO bus\n"); in rtl8366rb_setup()
1018 return -ENODEV; in rtl8366rb_setup()
1035 unsigned long *interfaces = config->supported_interfaces; in rtl8366rb_phylink_get_caps()
1036 struct realtek_priv *priv = ds->priv; in rtl8366rb_phylink_get_caps()
1038 if (port == priv->cpu_port) { in rtl8366rb_phylink_get_caps()
1046 config->mac_capabilities = MAC_1000 | MAC_100 | in rtl8366rb_phylink_get_caps()
1053 config->mac_capabilities = MAC_1000 | MAC_100 | MAC_10 | in rtl8366rb_phylink_get_caps()
1070 struct realtek_priv *priv = dp->ds->priv; in rtl8366rb_mac_link_up()
1071 int port = dp->index; in rtl8366rb_mac_link_up()
1075 /* Allow forcing the mode on the fixed CPU port, no autonegotiation. in rtl8366rb_mac_link_up()
1076 * We assume autonegotiation works on the PHY-facing ports. in rtl8366rb_mac_link_up()
1078 if (port != priv->cpu_port) in rtl8366rb_mac_link_up()
1081 dev_dbg(priv->dev, "MAC link up on CPU port (%d)\n", port); in rtl8366rb_mac_link_up()
1083 ret = regmap_update_bits(priv->map, RTL8366RB_MAC_FORCE_CTRL_REG, in rtl8366rb_mac_link_up()
1086 dev_err(priv->dev, "failed to force CPU port\n"); in rtl8366rb_mac_link_up()
1117 ret = regmap_update_bits(priv->map, RTL8366RB_PAACR2, in rtl8366rb_mac_link_up()
1121 dev_err(priv->dev, "failed to set PAACR on CPU port\n"); in rtl8366rb_mac_link_up()
1125 dev_dbg(priv->dev, "set PAACR to %04x\n", val); in rtl8366rb_mac_link_up()
1127 /* Enable the CPU port */ in rtl8366rb_mac_link_up()
1128 ret = regmap_update_bits(priv->map, RTL8366RB_PECR, BIT(port), in rtl8366rb_mac_link_up()
1131 dev_err(priv->dev, "failed to enable the CPU port\n"); in rtl8366rb_mac_link_up()
1141 struct realtek_priv *priv = dp->ds->priv; in rtl8366rb_mac_link_down()
1142 int port = dp->index; in rtl8366rb_mac_link_down()
1145 if (port != priv->cpu_port) in rtl8366rb_mac_link_down()
1148 dev_dbg(priv->dev, "MAC link down on CPU port (%d)\n", port); in rtl8366rb_mac_link_down()
1150 /* Disable the CPU port */ in rtl8366rb_mac_link_down()
1151 ret = regmap_update_bits(priv->map, RTL8366RB_PECR, BIT(port), in rtl8366rb_mac_link_down()
1154 dev_err(priv->dev, "failed to disable the CPU port\n"); in rtl8366rb_mac_link_down()
1163 struct realtek_priv *priv = ds->priv; in rtl8366rb_port_enable()
1166 dev_dbg(priv->dev, "enable port %d\n", port); in rtl8366rb_port_enable()
1167 ret = regmap_update_bits(priv->map, RTL8366RB_PECR, BIT(port), in rtl8366rb_port_enable()
1178 struct realtek_priv *priv = ds->priv; in rtl8366rb_port_disable()
1181 dev_dbg(priv->dev, "disable port %d\n", port); in rtl8366rb_port_disable()
1182 ret = regmap_update_bits(priv->map, RTL8366RB_PECR, BIT(port), in rtl8366rb_port_disable()
1194 struct realtek_priv *priv = ds->priv; in rtl8366rb_port_bridge_join()
1207 ret = regmap_update_bits(priv->map, RTL8366RB_PORT_ISO(i), in rtl8366rb_port_bridge_join()
1211 dev_err(priv->dev, "failed to join port %d\n", port); in rtl8366rb_port_bridge_join()
1217 return regmap_update_bits(priv->map, RTL8366RB_PORT_ISO(port), in rtl8366rb_port_bridge_join()
1226 struct realtek_priv *priv = ds->priv; in rtl8366rb_port_bridge_leave()
1239 ret = regmap_update_bits(priv->map, RTL8366RB_PORT_ISO(i), in rtl8366rb_port_bridge_leave()
1242 dev_err(priv->dev, "failed to leave port %d\n", port); in rtl8366rb_port_bridge_leave()
1248 regmap_update_bits(priv->map, RTL8366RB_PORT_ISO(port), in rtl8366rb_port_bridge_leave()
1253 * rtl8366rb_drop_untagged() - make the switch drop untagged and C-tagged frames
1255 * @port: the port to drop untagged and C-tagged frames on
1256 * @drop: whether to drop or pass untagged and C-tagged frames
1262 return regmap_update_bits(priv->map, RTL8366RB_VLAN_INGRESS_CTRL1_REG, in rtl8366rb_drop_untagged()
1271 struct realtek_priv *priv = ds->priv; in rtl8366rb_vlan_filtering()
1275 rb = priv->chip_data; in rtl8366rb_vlan_filtering()
1277 dev_dbg(priv->dev, "port %d: %s VLAN filtering\n", port, in rtl8366rb_vlan_filtering()
1281 ret = regmap_update_bits(priv->map, RTL8366RB_VLAN_INGRESS_CTRL2_REG, in rtl8366rb_vlan_filtering()
1287 * not drop any untagged or C-tagged frames. If we turn off VLAN in rtl8366rb_vlan_filtering()
1291 ret = rtl8366rb_drop_untagged(priv, port, !rb->pvid_enabled[port]); in rtl8366rb_vlan_filtering()
1305 return -EINVAL; in rtl8366rb_port_pre_bridge_flags()
1315 struct realtek_priv *priv = ds->priv; in rtl8366rb_port_bridge_flags()
1319 ret = regmap_update_bits(priv->map, RTL8366RB_PORT_LEARNDIS_CTRL, in rtl8366rb_port_bridge_flags()
1332 struct realtek_priv *priv = ds->priv; in rtl8366rb_port_stp_state_set()
1351 dev_err(priv->dev, "unknown bridge state requested\n"); in rtl8366rb_port_stp_state_set()
1357 regmap_update_bits(priv->map, RTL8366RB_STP_STATE_BASE + i, in rtl8366rb_port_stp_state_set()
1366 struct realtek_priv *priv = ds->priv; in rtl8366rb_port_fast_age()
1369 regmap_update_bits(priv->map, RTL8366RB_SECURITY_CTRL, in rtl8366rb_port_fast_age()
1372 regmap_update_bits(priv->map, RTL8366RB_SECURITY_CTRL, in rtl8366rb_port_fast_age()
1378 struct realtek_priv *priv = ds->priv; in rtl8366rb_change_mtu()
1384 /* Cache the per-port MTU setting */ in rtl8366rb_change_mtu()
1385 rb = priv->chip_data; in rtl8366rb_change_mtu()
1386 rb->max_mtu[port] = new_mtu; in rtl8366rb_change_mtu()
1394 if (rb->max_mtu[i] > max_mtu) in rtl8366rb_change_mtu()
1395 max_mtu = rb->max_mtu[i]; in rtl8366rb_change_mtu()
1409 * CPU tagging on a port as both VLAN and CPU tag will in rtl8366rb_change_mtu()
1418 return regmap_update_bits(priv->map, RTL8366RB_SGCR, in rtl8366rb_change_mtu()
1427 * 16000 - 18 - 4 = 15978. This does not include the CPU tag in rtl8366rb_max_mtu()
1430 return 16000 - VLAN_ETH_HLEN - ETH_FCS_LEN; in rtl8366rb_max_mtu()
1443 return -EINVAL; in rtl8366rb_get_vlan_4k()
1446 ret = regmap_write(priv->map, RTL8366RB_VLAN_TABLE_WRITE_BASE, in rtl8366rb_get_vlan_4k()
1452 ret = regmap_write(priv->map, RTL8366RB_TABLE_ACCESS_CTRL_REG, in rtl8366rb_get_vlan_4k()
1458 ret = regmap_read(priv->map, in rtl8366rb_get_vlan_4k()
1465 vlan4k->vid = vid; in rtl8366rb_get_vlan_4k()
1466 vlan4k->untag = (data[1] >> RTL8366RB_VLAN_UNTAG_SHIFT) & in rtl8366rb_get_vlan_4k()
1468 vlan4k->member = data[1] & RTL8366RB_VLAN_MEMBER_MASK; in rtl8366rb_get_vlan_4k()
1469 vlan4k->fid = data[2] & RTL8366RB_VLAN_FID_MASK; in rtl8366rb_get_vlan_4k()
1481 if (vlan4k->vid >= RTL8366RB_NUM_VIDS || in rtl8366rb_set_vlan_4k()
1482 vlan4k->member > RTL8366RB_VLAN_MEMBER_MASK || in rtl8366rb_set_vlan_4k()
1483 vlan4k->untag > RTL8366RB_VLAN_UNTAG_MASK || in rtl8366rb_set_vlan_4k()
1484 vlan4k->fid > RTL8366RB_FIDMAX) in rtl8366rb_set_vlan_4k()
1485 return -EINVAL; in rtl8366rb_set_vlan_4k()
1487 data[0] = vlan4k->vid & RTL8366RB_VLAN_VID_MASK; in rtl8366rb_set_vlan_4k()
1488 data[1] = (vlan4k->member & RTL8366RB_VLAN_MEMBER_MASK) | in rtl8366rb_set_vlan_4k()
1489 ((vlan4k->untag & RTL8366RB_VLAN_UNTAG_MASK) << in rtl8366rb_set_vlan_4k()
1491 data[2] = vlan4k->fid & RTL8366RB_VLAN_FID_MASK; in rtl8366rb_set_vlan_4k()
1494 ret = regmap_write(priv->map, in rtl8366rb_set_vlan_4k()
1502 ret = regmap_write(priv->map, RTL8366RB_TABLE_ACCESS_CTRL_REG, in rtl8366rb_set_vlan_4k()
1518 return -EINVAL; in rtl8366rb_get_vlan_mc()
1521 ret = regmap_read(priv->map, in rtl8366rb_get_vlan_mc()
1528 vlanmc->vid = data[0] & RTL8366RB_VLAN_VID_MASK; in rtl8366rb_get_vlan_mc()
1529 vlanmc->priority = (data[0] >> RTL8366RB_VLAN_PRIORITY_SHIFT) & in rtl8366rb_get_vlan_mc()
1531 vlanmc->untag = (data[1] >> RTL8366RB_VLAN_UNTAG_SHIFT) & in rtl8366rb_get_vlan_mc()
1533 vlanmc->member = data[1] & RTL8366RB_VLAN_MEMBER_MASK; in rtl8366rb_get_vlan_mc()
1534 vlanmc->fid = data[2] & RTL8366RB_VLAN_FID_MASK; in rtl8366rb_get_vlan_mc()
1547 vlanmc->vid >= RTL8366RB_NUM_VIDS || in rtl8366rb_set_vlan_mc()
1548 vlanmc->priority > RTL8366RB_PRIORITYMAX || in rtl8366rb_set_vlan_mc()
1549 vlanmc->member > RTL8366RB_VLAN_MEMBER_MASK || in rtl8366rb_set_vlan_mc()
1550 vlanmc->untag > RTL8366RB_VLAN_UNTAG_MASK || in rtl8366rb_set_vlan_mc()
1551 vlanmc->fid > RTL8366RB_FIDMAX) in rtl8366rb_set_vlan_mc()
1552 return -EINVAL; in rtl8366rb_set_vlan_mc()
1554 data[0] = (vlanmc->vid & RTL8366RB_VLAN_VID_MASK) | in rtl8366rb_set_vlan_mc()
1555 ((vlanmc->priority & RTL8366RB_VLAN_PRIORITY_MASK) << in rtl8366rb_set_vlan_mc()
1557 data[1] = (vlanmc->member & RTL8366RB_VLAN_MEMBER_MASK) | in rtl8366rb_set_vlan_mc()
1558 ((vlanmc->untag & RTL8366RB_VLAN_UNTAG_MASK) << in rtl8366rb_set_vlan_mc()
1560 data[2] = vlanmc->fid & RTL8366RB_VLAN_FID_MASK; in rtl8366rb_set_vlan_mc()
1563 ret = regmap_write(priv->map, in rtl8366rb_set_vlan_mc()
1578 if (port >= priv->num_ports) in rtl8366rb_get_mc_index()
1579 return -EINVAL; in rtl8366rb_get_mc_index()
1581 ret = regmap_read(priv->map, RTL8366RB_PORT_VLAN_CTRL_REG(port), in rtl8366rb_get_mc_index()
1594 struct dsa_switch *ds = &priv->ds; in rtl8366rb_set_mc_index()
1599 rb = priv->chip_data; in rtl8366rb_set_mc_index()
1602 if (port >= priv->num_ports || index >= RTL8366RB_NUM_VLANS) in rtl8366rb_set_mc_index()
1603 return -EINVAL; in rtl8366rb_set_mc_index()
1605 ret = regmap_update_bits(priv->map, RTL8366RB_PORT_VLAN_CTRL_REG(port), in rtl8366rb_set_mc_index()
1613 rb->pvid_enabled[port] = pvid_enabled; in rtl8366rb_set_mc_index()
1616 * not drop any untagged or C-tagged frames. Make sure to update the in rtl8366rb_set_mc_index()
1627 unsigned int max = RTL8366RB_NUM_VLANS - 1; in rtl8366rb_is_vlan_valid()
1629 if (priv->vlan4k_enabled) in rtl8366rb_is_vlan_valid()
1630 max = RTL8366RB_NUM_VIDS - 1; in rtl8366rb_is_vlan_valid()
1640 dev_dbg(priv->dev, "%s VLAN\n", str_enable_disable(enable)); in rtl8366rb_enable_vlan()
1641 return regmap_update_bits(priv->map, in rtl8366rb_enable_vlan()
1648 dev_dbg(priv->dev, "%s VLAN 4k\n", str_enable_disable(enable)); in rtl8366rb_enable_vlan4k()
1649 return regmap_update_bits(priv->map, RTL8366RB_SGCR, in rtl8366rb_enable_vlan4k()
1661 return -EINVAL; in rtl8366rb_phy_read()
1665 ret = regmap_write(priv->map_nolock, RTL8366RB_PHY_ACCESS_CTRL_REG, in rtl8366rb_phy_read()
1672 ret = regmap_write(priv->map_nolock, reg, 0); in rtl8366rb_phy_read()
1674 dev_err(priv->dev, in rtl8366rb_phy_read()
1680 ret = regmap_read(priv->map_nolock, RTL8366RB_PHY_ACCESS_DATA_REG, in rtl8366rb_phy_read()
1687 dev_dbg(priv->dev, "read PHY%d register 0x%04x @ %08x, val <- %04x\n", in rtl8366rb_phy_read()
1703 return -EINVAL; in rtl8366rb_phy_write()
1707 ret = regmap_write(priv->map_nolock, RTL8366RB_PHY_ACCESS_CTRL_REG, in rtl8366rb_phy_write()
1714 dev_dbg(priv->dev, "write PHY%d register 0x%04x @ %04x, val -> %04x\n", in rtl8366rb_phy_write()
1717 ret = regmap_write(priv->map_nolock, reg, val); in rtl8366rb_phy_write()
1733 priv->write_reg_noack(priv, RTL8366RB_RESET_CTRL_REG, in rtl8366rb_reset_chip()
1737 ret = regmap_read(priv->map, RTL8366RB_RESET_CTRL_REG, &val); in rtl8366rb_reset_chip()
1743 } while (--timeout); in rtl8366rb_reset_chip()
1746 dev_err(priv->dev, "timeout waiting for the switch to reset\n"); in rtl8366rb_reset_chip()
1747 return -EIO; in rtl8366rb_reset_chip()
1755 struct device *dev = priv->dev; in rtl8366rb_detect()
1760 ret = regmap_read(priv->map, 0x5c, &val); in rtl8366rb_detect()
1770 return -ENODEV; in rtl8366rb_detect()
1773 priv->cpu_port = RTL8366RB_PORT_NUM_CPU; in rtl8366rb_detect()
1774 priv->num_ports = RTL8366RB_NUM_PORTS; in rtl8366rb_detect()
1775 priv->num_vlan_mc = RTL8366RB_NUM_VLANS; in rtl8366rb_detect()
1776 priv->mib_counters = rtl8366rb_mib_counters; in rtl8366rb_detect()
1777 priv->num_mib_counters = ARRAY_SIZE(rtl8366rb_mib_counters); in rtl8366rb_detect()
1854 .name = "rtl8366rb-smi",
1864 .name = "rtl8366rb-mdio",