Lines Matching +full:pin +full:- +full:val
1 // SPDX-License-Identifier: GPL-2.0-or-later
45 * mv88e6xxx_g2_scratch_get_bit - get a bit
57 u8 val; in mv88e6xxx_g2_scratch_get_bit() local
60 err = mv88e6xxx_g2_scratch_read(chip, reg, &val); in mv88e6xxx_g2_scratch_get_bit()
64 *set = !!(mask & val); in mv88e6xxx_g2_scratch_get_bit()
70 * mv88e6xxx_g2_scratch_set_bit - set (or clear) a bit
84 u8 val; in mv88e6xxx_g2_scratch_set_bit() local
87 err = mv88e6xxx_g2_scratch_read(chip, reg, &val); in mv88e6xxx_g2_scratch_set_bit()
92 val |= mask; in mv88e6xxx_g2_scratch_set_bit()
94 val &= ~mask; in mv88e6xxx_g2_scratch_set_bit()
96 return mv88e6xxx_g2_scratch_write(chip, reg, val); in mv88e6xxx_g2_scratch_set_bit()
100 * mv88e6352_g2_scratch_gpio_get_data - get data on gpio pin
102 * @pin: gpio index
107 unsigned int pin) in mv88e6352_g2_scratch_gpio_get_data() argument
109 int val = 0; in mv88e6352_g2_scratch_gpio_get_data() local
114 pin, &val); in mv88e6352_g2_scratch_gpio_get_data()
118 return val; in mv88e6352_g2_scratch_gpio_get_data()
122 * mv88e6352_g2_scratch_gpio_set_data - set data on gpio pin
124 * @pin: gpio index
128 unsigned int pin, int value) in mv88e6352_g2_scratch_gpio_set_data() argument
130 u8 mask = (1 << (pin & 0x7)); in mv88e6352_g2_scratch_gpio_set_data()
131 int offset = (pin / 8); in mv88e6352_g2_scratch_gpio_set_data()
137 chip->gpio_data[offset] |= mask; in mv88e6352_g2_scratch_gpio_set_data()
139 chip->gpio_data[offset] &= ~mask; in mv88e6352_g2_scratch_gpio_set_data()
141 return mv88e6xxx_g2_scratch_write(chip, reg, chip->gpio_data[offset]); in mv88e6352_g2_scratch_gpio_set_data()
145 * mv88e6352_g2_scratch_gpio_get_dir - get direction of gpio pin
147 * @pin: gpio index
152 unsigned int pin) in mv88e6352_g2_scratch_gpio_get_dir() argument
154 int val = 0; in mv88e6352_g2_scratch_gpio_get_dir() local
159 pin, &val); in mv88e6352_g2_scratch_gpio_get_dir()
163 return val; in mv88e6352_g2_scratch_gpio_get_dir()
167 * mv88e6352_g2_scratch_gpio_set_dir - set direction of gpio pin
169 * @pin: gpio index
173 unsigned int pin, bool input) in mv88e6352_g2_scratch_gpio_set_dir() argument
180 pin, value); in mv88e6352_g2_scratch_gpio_set_dir()
184 * mv88e6352_g2_scratch_gpio_get_pctl - get pin control setting
186 * @pin: gpio index
192 unsigned int pin, int *func) in mv88e6352_g2_scratch_gpio_get_pctl() argument
194 int reg = MV88E6352_G2_SCRATCH_GPIO_PCTL0 + (pin / 2); in mv88e6352_g2_scratch_gpio_get_pctl()
195 int offset = (pin & 0x1) ? 4 : 0; in mv88e6352_g2_scratch_gpio_get_pctl()
198 u8 val; in mv88e6352_g2_scratch_gpio_get_pctl() local
200 err = mv88e6xxx_g2_scratch_read(chip, reg, &val); in mv88e6352_g2_scratch_gpio_get_pctl()
204 *func = (val & mask) >> offset; in mv88e6352_g2_scratch_gpio_get_pctl()
210 * mv88e6352_g2_scratch_gpio_set_pctl - set pin control setting
212 * @pin: gpio index
216 unsigned int pin, int func) in mv88e6352_g2_scratch_gpio_set_pctl() argument
218 int reg = MV88E6352_G2_SCRATCH_GPIO_PCTL0 + (pin / 2); in mv88e6352_g2_scratch_gpio_set_pctl()
219 int offset = (pin & 0x1) ? 4 : 0; in mv88e6352_g2_scratch_gpio_set_pctl()
222 u8 val; in mv88e6352_g2_scratch_gpio_set_pctl() local
224 err = mv88e6xxx_g2_scratch_read(chip, reg, &val); in mv88e6352_g2_scratch_gpio_set_pctl()
228 val = (val & ~mask) | ((func & mask) << offset); in mv88e6352_g2_scratch_gpio_set_pctl()
230 return mv88e6xxx_g2_scratch_write(chip, reg, val); in mv88e6352_g2_scratch_gpio_set_pctl()
243 * mv88e6390_g2_scratch_gpio_set_smi - set gpio muxing for external smi
260 u8 val; in mv88e6390_g2_scratch_gpio_set_smi() local
262 err = mv88e6xxx_g2_scratch_read(chip, config_data2, &val); in mv88e6390_g2_scratch_gpio_set_smi()
266 p0_mode = val & MV88E6352_G2_SCRATCH_CONFIG_DATA2_P0_MODE_MASK; in mv88e6390_g2_scratch_gpio_set_smi()
269 return -EBUSY; in mv88e6390_g2_scratch_gpio_set_smi()
271 err = mv88e6xxx_g2_scratch_read(chip, config_data1, &val); in mv88e6390_g2_scratch_gpio_set_smi()
275 no_cpu = !!(val & MV88E6352_G2_SCRATCH_CONFIG_DATA1_NO_CPU); in mv88e6390_g2_scratch_gpio_set_smi()
277 err = mv88e6xxx_g2_scratch_read(chip, misc_cfg, &val); in mv88e6390_g2_scratch_gpio_set_smi()
286 val |= MV88E6352_G2_SCRATCH_MISC_CFG_NORMALSMI; in mv88e6390_g2_scratch_gpio_set_smi()
288 val &= ~MV88E6352_G2_SCRATCH_MISC_CFG_NORMALSMI; in mv88e6390_g2_scratch_gpio_set_smi()
290 return mv88e6xxx_g2_scratch_write(chip, misc_cfg, val); in mv88e6390_g2_scratch_gpio_set_smi()
294 * mv88e6393x_g2_scratch_gpio_set_smi - set gpio muxing for external smi
299 * external SMI interface or as regular GPIO-s.
310 u8 val; in mv88e6393x_g2_scratch_gpio_set_smi() local
312 err = mv88e6xxx_g2_scratch_read(chip, misc_cfg, &val); in mv88e6393x_g2_scratch_gpio_set_smi()
317 val &= ~MV88E6352_G2_SCRATCH_MISC_CFG_NORMALSMI; in mv88e6393x_g2_scratch_gpio_set_smi()
319 val |= MV88E6352_G2_SCRATCH_MISC_CFG_NORMALSMI; in mv88e6393x_g2_scratch_gpio_set_smi()
321 return mv88e6xxx_g2_scratch_write(chip, misc_cfg, val); in mv88e6393x_g2_scratch_gpio_set_smi()
325 * mv88e6352_g2_scratch_port_has_serdes - indicate if a port can have a serdes
330 * pin strapping. Returns negative error number, 0 if the port is not