Lines Matching +full:mv88e6xxx +full:- +full:mdio +full:- +full:external
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Marvell 88e6xxx Ethernet switch single-chip support
9 * Copyright (c) 2016-2017 Savoir-faire Linux Inc.
15 #include <linux/dsa/mv88e6xxx.h>
24 #include <linux/mdio.h>
29 #include <linux/platform_data/mv88e6xxx.h>
49 if (unlikely(!mutex_is_locked(&chip->reg_lock))) { in assert_reg_lock()
50 dev_err(chip->dev, "Switch registers lock not held!\n"); in assert_reg_lock()
65 dev_dbg(chip->dev, "<- addr: 0x%.2x reg: 0x%.2x val: 0x%.4x\n", in mv88e6xxx_read()
81 dev_dbg(chip->dev, "-> addr: 0x%.2x reg: 0x%.2x val: 0x%.4x\n", in mv88e6xxx_write()
120 dev_err(chip->dev, "Timeout while waiting for switch\n"); in mv88e6xxx_wait_mask()
121 return -ETIMEDOUT; in mv88e6xxx_wait_mask()
135 mdio_bus = list_first_entry_or_null(&chip->mdios, in mv88e6xxx_default_mdio_bus()
140 return mdio_bus->bus; in mv88e6xxx_default_mdio_bus()
146 unsigned int n = d->hwirq; in mv88e6xxx_g1_irq_mask()
148 chip->g1_irq.masked |= (1 << n); in mv88e6xxx_g1_irq_mask()
154 unsigned int n = d->hwirq; in mv88e6xxx_g1_irq_unmask()
156 chip->g1_irq.masked &= ~(1 << n); in mv88e6xxx_g1_irq_unmask()
176 for (n = 0; n < chip->g1_irq.nirqs; ++n) { in mv88e6xxx_g1_irq_thread_work()
178 sub_irq = irq_find_mapping(chip->g1_irq.domain, in mv88e6xxx_g1_irq_thread_work()
194 ctl1 &= GENMASK(chip->g1_irq.nirqs, 0); in mv88e6xxx_g1_irq_thread_work()
218 u16 mask = GENMASK(chip->g1_irq.nirqs, 0); in mv88e6xxx_g1_irq_bus_sync_unlock()
227 reg |= (~chip->g1_irq.masked & mask); in mv88e6xxx_g1_irq_bus_sync_unlock()
238 .name = "mv88e6xxx-g1",
249 struct mv88e6xxx_chip *chip = d->host_data; in mv88e6xxx_g1_irq_domain_map()
251 irq_set_chip_data(irq, d->host_data); in mv88e6xxx_g1_irq_domain_map()
252 irq_set_chip_and_handler(irq, &chip->g1_irq.chip, handle_level_irq); in mv88e6xxx_g1_irq_domain_map()
270 mask &= ~GENMASK(chip->g1_irq.nirqs, 0); in mv88e6xxx_g1_irq_free_common()
273 for (irq = 0; irq < chip->g1_irq.nirqs; irq++) { in mv88e6xxx_g1_irq_free_common()
274 virq = irq_find_mapping(chip->g1_irq.domain, irq); in mv88e6xxx_g1_irq_free_common()
278 irq_domain_remove(chip->g1_irq.domain); in mv88e6xxx_g1_irq_free_common()
287 free_irq(chip->irq, chip); in mv88e6xxx_g1_irq_free()
299 chip->g1_irq.nirqs = chip->info->g1_irqs; in mv88e6xxx_g1_irq_setup_common()
300 chip->g1_irq.domain = irq_domain_add_simple( in mv88e6xxx_g1_irq_setup_common()
301 NULL, chip->g1_irq.nirqs, 0, in mv88e6xxx_g1_irq_setup_common()
303 if (!chip->g1_irq.domain) in mv88e6xxx_g1_irq_setup_common()
304 return -ENOMEM; in mv88e6xxx_g1_irq_setup_common()
306 for (irq = 0; irq < chip->g1_irq.nirqs; irq++) in mv88e6xxx_g1_irq_setup_common()
307 irq_create_mapping(chip->g1_irq.domain, irq); in mv88e6xxx_g1_irq_setup_common()
309 chip->g1_irq.chip = mv88e6xxx_g1_irq_chip; in mv88e6xxx_g1_irq_setup_common()
310 chip->g1_irq.masked = ~0; in mv88e6xxx_g1_irq_setup_common()
316 mask &= ~GENMASK(chip->g1_irq.nirqs, 0); in mv88e6xxx_g1_irq_setup_common()
330 mask &= ~GENMASK(chip->g1_irq.nirqs, 0); in mv88e6xxx_g1_irq_setup_common()
335 virq = irq_find_mapping(chip->g1_irq.domain, irq); in mv88e6xxx_g1_irq_setup_common()
339 irq_domain_remove(chip->g1_irq.domain); in mv88e6xxx_g1_irq_setup_common()
358 irq_set_lockdep_class(chip->irq, &lock_key, &request_key); in mv88e6xxx_g1_irq_setup()
360 snprintf(chip->irq_name, sizeof(chip->irq_name), in mv88e6xxx_g1_irq_setup()
361 "mv88e6xxx-%s", dev_name(chip->dev)); in mv88e6xxx_g1_irq_setup()
364 err = request_threaded_irq(chip->irq, NULL, in mv88e6xxx_g1_irq_setup()
367 chip->irq_name, chip); in mv88e6xxx_g1_irq_setup()
382 kthread_queue_delayed_work(chip->kworker, &chip->irq_poll_work, in mv88e6xxx_irq_poll()
394 kthread_init_delayed_work(&chip->irq_poll_work, in mv88e6xxx_irq_poll_setup()
397 chip->kworker = kthread_create_worker(0, "%s", dev_name(chip->dev)); in mv88e6xxx_irq_poll_setup()
398 if (IS_ERR(chip->kworker)) in mv88e6xxx_irq_poll_setup()
399 return PTR_ERR(chip->kworker); in mv88e6xxx_irq_poll_setup()
401 kthread_queue_delayed_work(chip->kworker, &chip->irq_poll_work, in mv88e6xxx_irq_poll_setup()
409 kthread_cancel_delayed_work_sync(&chip->irq_poll_work); in mv88e6xxx_irq_poll_free()
410 kthread_destroy_worker(chip->kworker); in mv88e6xxx_irq_poll_free()
422 if (chip->info->ops->port_set_rgmii_delay) { in mv88e6xxx_port_config_interface()
423 err = chip->info->ops->port_set_rgmii_delay(chip, port, in mv88e6xxx_port_config_interface()
425 if (err && err != -EOPNOTSUPP) in mv88e6xxx_port_config_interface()
429 if (chip->info->ops->port_set_cmode) { in mv88e6xxx_port_config_interface()
430 err = chip->info->ops->port_set_cmode(chip, port, in mv88e6xxx_port_config_interface()
432 if (err && err != -EOPNOTSUPP) in mv88e6xxx_port_config_interface()
445 if (!chip->info->ops->port_set_link) in mv88e6xxx_port_setup_mac()
449 err = chip->info->ops->port_set_link(chip, port, LINK_FORCED_DOWN); in mv88e6xxx_port_setup_mac()
453 if (chip->info->ops->port_set_speed_duplex) { in mv88e6xxx_port_setup_mac()
454 err = chip->info->ops->port_set_speed_duplex(chip, port, in mv88e6xxx_port_setup_mac()
456 if (err && err != -EOPNOTSUPP) in mv88e6xxx_port_setup_mac()
460 if (chip->info->ops->port_set_pause) { in mv88e6xxx_port_setup_mac()
461 err = chip->info->ops->port_set_pause(chip, port, pause); in mv88e6xxx_port_setup_mac()
468 if (chip->info->ops->port_set_link(chip, port, link)) in mv88e6xxx_port_setup_mac()
469 dev_err(chip->dev, "p%d: failed to restore MAC's link\n", port); in mv88e6xxx_port_setup_mac()
476 return port >= chip->info->internal_phys_offset && in mv88e6xxx_phy_is_internal()
477 port < chip->info->num_internal_phys + in mv88e6xxx_phy_is_internal()
478 chip->info->internal_phys_offset; in mv88e6xxx_phy_is_internal()
489 if (chip->info->family == MV88E6XXX_FAMILY_6250) in mv88e6xxx_port_ppu_updates()
494 dev_err(chip->dev, in mv88e6xxx_port_ppu_updates()
516 u8 cmode = chip->ports[port].cmode; in mv88e6095_phylink_get_caps()
518 config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100; in mv88e6095_phylink_get_caps()
521 __set_bit(PHY_INTERFACE_MODE_MII, config->supported_interfaces); in mv88e6095_phylink_get_caps()
526 config->supported_interfaces); in mv88e6095_phylink_get_caps()
528 config->mac_capabilities |= MAC_1000FD; in mv88e6095_phylink_get_caps()
535 u8 cmode = chip->ports[port].cmode; in mv88e6185_phylink_get_caps()
540 config->supported_interfaces); in mv88e6185_phylink_get_caps()
542 config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 | in mv88e6185_phylink_get_caps()
574 unsigned long *supported = config->supported_interfaces; in mv88e6250_setup_supported_interfaces()
580 dev_err(chip->dev, "p%d: failed to read port status\n", port); in mv88e6250_setup_supported_interfaces()
614 dev_err(chip->dev, in mv88e6250_setup_supported_interfaces()
626 config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100; in mv88e6250_phylink_get_caps()
632 unsigned long *supported = config->supported_interfaces; in mv88e6351_phylink_get_caps()
635 mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported); in mv88e6351_phylink_get_caps()
637 config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 | in mv88e6351_phylink_get_caps()
650 /* If PHY_DETECT is zero, then we are not in auto-media mode */ in mv88e63xx_get_port_serdes_cmode()
674 unsigned long *supported = config->supported_interfaces; in mv88e6352_phylink_get_caps()
678 mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported); in mv88e6352_phylink_get_caps()
680 config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 | in mv88e6352_phylink_get_caps()
687 dev_err(chip->dev, "p%d: failed to read scratch\n", in mv88e6352_phylink_get_caps()
694 dev_err(chip->dev, "p%d: failed to read serdes cmode\n", in mv88e6352_phylink_get_caps()
704 unsigned long *supported = config->supported_interfaces; in mv88e632x_phylink_get_caps()
708 mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported); in mv88e632x_phylink_get_caps()
710 config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 | in mv88e632x_phylink_get_caps()
717 dev_err(chip->dev, "p%d: failed to read serdes cmode\n", in mv88e632x_phylink_get_caps()
727 unsigned long *supported = config->supported_interfaces; in mv88e6341_phylink_get_caps()
730 mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported); in mv88e6341_phylink_get_caps()
733 config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 | in mv88e6341_phylink_get_caps()
742 config->mac_capabilities |= MAC_2500FD; in mv88e6341_phylink_get_caps()
749 unsigned long *supported = config->supported_interfaces; in mv88e6390_phylink_get_caps()
752 mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported); in mv88e6390_phylink_get_caps()
755 config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 | in mv88e6390_phylink_get_caps()
764 config->mac_capabilities |= MAC_2500FD; in mv88e6390_phylink_get_caps()
771 unsigned long *supported = config->supported_interfaces; in mv88e6390x_phylink_get_caps()
775 /* For the 6x90X, ports 2-7 can be in automedia mode. in mv88e6390x_phylink_get_caps()
778 * Port 2 can also support 1000BASE-X in automedia mode if port 9 is in mv88e6390x_phylink_get_caps()
779 * configured for 1000BASE-X, SGMII or 2500BASE-X. in mv88e6390x_phylink_get_caps()
780 * Port 3-4 can also support 1000BASE-X in automedia mode if port 9 is in mv88e6390x_phylink_get_caps()
781 * configured for RXAUI, 1000BASE-X, SGMII or 2500BASE-X. in mv88e6390x_phylink_get_caps()
783 * Port 5 can also support 1000BASE-X in automedia mode if port 10 is in mv88e6390x_phylink_get_caps()
784 * configured for 1000BASE-X, SGMII or 2500BASE-X. in mv88e6390x_phylink_get_caps()
785 * Port 6-7 can also support 1000BASE-X in automedia mode if port 10 is in mv88e6390x_phylink_get_caps()
786 * configured for RXAUI, 1000BASE-X, SGMII or 2500BASE-X. in mv88e6390x_phylink_get_caps()
788 * For now, be permissive (as the old code was) and allow 1000BASE-X in mv88e6390x_phylink_get_caps()
799 config->mac_capabilities |= MAC_10000FD; in mv88e6390x_phylink_get_caps()
806 unsigned long *supported = config->supported_interfaces; in mv88e6393x_phylink_get_caps()
808 chip->info->prod_num == MV88E6XXX_PORT_SWITCH_ID_PROD_6191X; in mv88e6393x_phylink_get_caps()
810 chip->info->prod_num == MV88E6XXX_PORT_SWITCH_ID_PROD_6361; in mv88e6393x_phylink_get_caps()
812 mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported); in mv88e6393x_phylink_get_caps()
814 config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 | in mv88e6393x_phylink_get_caps()
825 config->mac_capabilities |= MAC_2500FD; in mv88e6393x_phylink_get_caps()
832 config->mac_capabilities |= MAC_5000FD | in mv88e6393x_phylink_get_caps()
850 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_get_caps()
853 chip->info->ops->phylink_get_caps(chip, port, config); in mv88e6xxx_get_caps()
858 config->supported_interfaces); in mv88e6xxx_get_caps()
859 /* Internal ports with no phy-mode need GMII for PHYLIB */ in mv88e6xxx_get_caps()
861 config->supported_interfaces); in mv88e6xxx_get_caps()
870 struct mv88e6xxx_chip *chip = dp->ds->priv; in mv88e6xxx_mac_select_pcs()
873 if (chip->info->ops->pcs_ops) in mv88e6xxx_mac_select_pcs()
874 pcs = chip->info->ops->pcs_ops->pcs_select(chip, dp->index, in mv88e6xxx_mac_select_pcs()
884 struct mv88e6xxx_chip *chip = dp->ds->priv; in mv88e6xxx_mac_prepare()
885 int port = dp->index; in mv88e6xxx_mac_prepare()
893 chip->ports[port].interface != interface && in mv88e6xxx_mac_prepare()
894 chip->info->ops->port_set_link) { in mv88e6xxx_mac_prepare()
896 err = chip->info->ops->port_set_link(chip, port, in mv88e6xxx_mac_prepare()
909 struct mv88e6xxx_chip *chip = dp->ds->priv; in mv88e6xxx_mac_config()
910 int port = dp->index; in mv88e6xxx_mac_config()
917 state->interface); in mv88e6xxx_mac_config()
918 if (err && err != -EOPNOTSUPP) in mv88e6xxx_mac_config()
925 if (err && err != -EOPNOTSUPP) in mv88e6xxx_mac_config()
926 dev_err(chip->dev, "p%d: failed to configure MAC/PCS\n", port); in mv88e6xxx_mac_config()
933 struct mv88e6xxx_chip *chip = dp->ds->priv; in mv88e6xxx_mac_finish()
934 int port = dp->index; in mv88e6xxx_mac_finish()
939 * up in the in-band case where there is no separate SERDES. Also in mv88e6xxx_mac_finish()
941 * in PHY mode (we treat the PPU as an effective in-band mechanism.) in mv88e6xxx_mac_finish()
945 if (chip->info->ops->port_set_link && in mv88e6xxx_mac_finish()
947 chip->ports[port].interface != interface) || in mv88e6xxx_mac_finish()
949 err = chip->info->ops->port_set_link(chip, port, LINK_UNFORCED); in mv88e6xxx_mac_finish()
953 chip->ports[port].interface = interface; in mv88e6xxx_mac_finish()
963 struct mv88e6xxx_chip *chip = dp->ds->priv; in mv88e6xxx_mac_link_down()
965 int port = dp->index; in mv88e6xxx_mac_link_down()
968 ops = chip->info->ops; in mv88e6xxx_mac_link_down()
972 * updated by the switch or if we are using fixed-link mode. in mv88e6xxx_mac_link_down()
975 mode == MLO_AN_FIXED) && ops->port_sync_link) in mv88e6xxx_mac_link_down()
976 err = ops->port_sync_link(chip, port, mode, false); in mv88e6xxx_mac_link_down()
978 if (!err && ops->port_set_speed_duplex) in mv88e6xxx_mac_link_down()
979 err = ops->port_set_speed_duplex(chip, port, SPEED_UNFORCED, in mv88e6xxx_mac_link_down()
984 dev_err(chip->dev, in mv88e6xxx_mac_link_down()
995 struct mv88e6xxx_chip *chip = dp->ds->priv; in mv88e6xxx_mac_link_up()
997 int port = dp->index; in mv88e6xxx_mac_link_up()
1000 ops = chip->info->ops; in mv88e6xxx_mac_link_up()
1004 * automatically updated by the switch or if we are using fixed-link in mv88e6xxx_mac_link_up()
1009 if (ops->port_set_speed_duplex) { in mv88e6xxx_mac_link_up()
1010 err = ops->port_set_speed_duplex(chip, port, in mv88e6xxx_mac_link_up()
1012 if (err && err != -EOPNOTSUPP) in mv88e6xxx_mac_link_up()
1016 if (ops->port_sync_link) in mv88e6xxx_mac_link_up()
1017 err = ops->port_sync_link(chip, port, mode, true); in mv88e6xxx_mac_link_up()
1022 if (err && err != -EOPNOTSUPP) in mv88e6xxx_mac_link_up()
1023 dev_err(chip->dev, in mv88e6xxx_mac_link_up()
1031 if (!chip->info->ops->stats_snapshot) in mv88e6xxx_stats_snapshot()
1032 return -EOPNOTSUPP; in mv88e6xxx_stats_snapshot()
1035 err = chip->info->ops->stats_snapshot(chip, port); in mv88e6xxx_stats_snapshot()
1126 switch (s->type) { in _mv88e6xxx_get_ethtool_stat()
1128 err = mv88e6xxx_port_read(chip, port, s->reg, ®); in _mv88e6xxx_get_ethtool_stat()
1133 if (s->size == 4) { in _mv88e6xxx_get_ethtool_stat()
1134 err = mv88e6xxx_port_read(chip, port, s->reg + 1, ®); in _mv88e6xxx_get_ethtool_stat()
1144 reg |= s->reg | histogram; in _mv88e6xxx_get_ethtool_stat()
1146 if (s->size == 8) in _mv88e6xxx_get_ethtool_stat()
1164 if (stat->type & types) in mv88e6xxx_stats_get_strings()
1165 ethtool_puts(data, stat->string); in mv88e6xxx_stats_get_strings()
1208 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_get_strings()
1215 if (chip->info->ops->stats_get_strings) in mv88e6xxx_get_strings()
1216 chip->info->ops->stats_get_strings(chip, &data); in mv88e6xxx_get_strings()
1218 if (chip->info->ops->serdes_get_strings) in mv88e6xxx_get_strings()
1219 chip->info->ops->serdes_get_strings(chip, port, &data); in mv88e6xxx_get_strings()
1234 if (stat->type & types) in mv88e6xxx_stats_get_sset_count()
1259 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_get_sset_count()
1267 if (chip->info->ops->stats_get_sset_count) in mv88e6xxx_get_sset_count()
1268 count = chip->info->ops->stats_get_sset_count(chip); in mv88e6xxx_get_sset_count()
1272 if (chip->info->ops->serdes_get_sset_count) in mv88e6xxx_get_sset_count()
1273 serdes_count = chip->info->ops->serdes_get_sset_count(chip, in mv88e6xxx_get_sset_count()
1292 if (!(stat->type & (STATS_TYPE_BANK0 | STATS_TYPE_PORT))) in mv88e6095_stats_get_stat()
1304 if (!(stat->type & STATS_TYPE_BANK0)) in mv88e6250_stats_get_stat()
1316 if (!(stat->type & (STATS_TYPE_BANK0 | STATS_TYPE_BANK1))) in mv88e6320_stats_get_stat()
1329 if (!(stat->type & (STATS_TYPE_BANK0 | STATS_TYPE_BANK1))) in mv88e6390_stats_get_stat()
1344 if (chip->info->ops->stats_get_stat) { in mv88e6xxx_stats_get_stat()
1346 ret = chip->info->ops->stats_get_stat(chip, port, stat, data); in mv88e6xxx_stats_get_stat()
1369 *data++ = chip->ports[port].atu_member_violation; in mv88e6xxx_atu_vtu_get_stats()
1370 *data++ = chip->ports[port].atu_miss_violation; in mv88e6xxx_atu_vtu_get_stats()
1371 *data++ = chip->ports[port].atu_full_violation; in mv88e6xxx_atu_vtu_get_stats()
1372 *data++ = chip->ports[port].vtu_member_violation; in mv88e6xxx_atu_vtu_get_stats()
1373 *data++ = chip->ports[port].vtu_miss_violation; in mv88e6xxx_atu_vtu_get_stats()
1384 if (chip->info->ops->serdes_get_stats) { in mv88e6xxx_get_stats()
1386 count = chip->info->ops->serdes_get_stats(chip, port, data); in mv88e6xxx_get_stats()
1396 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_get_ethtool_stats()
1409 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_get_eth_mac_stats()
1419 &mac_stats->stats._member) in mv88e6xxx_get_eth_mac_stats()
1438 mac_stats->stats.FramesTransmittedOK += mac_stats->stats.MulticastFramesXmittedOK; in mv88e6xxx_get_eth_mac_stats()
1439 mac_stats->stats.FramesTransmittedOK += mac_stats->stats.BroadcastFramesXmittedOK; in mv88e6xxx_get_eth_mac_stats()
1440 mac_stats->stats.FramesReceivedOK += mac_stats->stats.MulticastFramesReceivedOK; in mv88e6xxx_get_eth_mac_stats()
1441 mac_stats->stats.FramesReceivedOK += mac_stats->stats.BroadcastFramesReceivedOK; in mv88e6xxx_get_eth_mac_stats()
1457 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_get_rmon_stats()
1467 &rmon_stats->stats._member) in mv88e6xxx_get_rmon_stats()
1487 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_get_regs_len()
1491 if (chip->info->ops->serdes_get_regs_len) in mv88e6xxx_get_regs_len()
1492 len += chip->info->ops->serdes_get_regs_len(chip, port); in mv88e6xxx_get_regs_len()
1500 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_get_regs()
1506 regs->version = chip->info->prod_num; in mv88e6xxx_get_regs()
1519 if (chip->info->ops->serdes_get_regs) in mv88e6xxx_get_regs()
1520 chip->info->ops->serdes_get_regs(chip, port, &p[i]); in mv88e6xxx_get_regs()
1542 struct dsa_switch *ds = chip->ds; in mv88e6xxx_port_vlan()
1543 struct dsa_switch_tree *dst = ds->dst; in mv88e6xxx_port_vlan()
1549 if (dev <= dst->last_switch) { in mv88e6xxx_port_vlan()
1550 list_for_each_entry(dp, &dst->ports, list) { in mv88e6xxx_port_vlan()
1551 if (dp->ds->index == dev && dp->index == port) { in mv88e6xxx_port_vlan()
1562 list_for_each_entry(dp, &dst->ports, list) { in mv88e6xxx_port_vlan()
1568 if (bridge_num + dst->last_switch != dev) in mv88e6xxx_port_vlan()
1581 if (dp->type == DSA_PORT_TYPE_CPU || dp->type == DSA_PORT_TYPE_DSA) in mv88e6xxx_port_vlan()
1597 if (other_dp->type == DSA_PORT_TYPE_CPU || in mv88e6xxx_port_vlan()
1598 other_dp->type == DSA_PORT_TYPE_DSA || in mv88e6xxx_port_vlan()
1600 pvlan |= BIT(other_dp->index); in mv88e6xxx_port_vlan()
1607 u16 output_ports = mv88e6xxx_port_vlan(chip, chip->ds->index, port); in mv88e6xxx_port_vlan_map()
1618 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_stp_state_set()
1626 dev_err(ds->dev, "p%d: failed to update state\n", port); in mv88e6xxx_port_stp_state_set()
1633 if (chip->info->ops->ieee_pri_map) { in mv88e6xxx_pri_setup()
1634 err = chip->info->ops->ieee_pri_map(chip); in mv88e6xxx_pri_setup()
1639 if (chip->info->ops->ip_pri_map) { in mv88e6xxx_pri_setup()
1640 err = chip->info->ops->ip_pri_map(chip); in mv88e6xxx_pri_setup()
1650 struct dsa_switch *ds = chip->ds; in mv88e6xxx_devmap_setup()
1654 if (!chip->info->global2_addr) in mv88e6xxx_devmap_setup()
1660 if (port == ds->num_ports) in mv88e6xxx_devmap_setup()
1668 if (chip->info->ops->set_cascade_port) { in mv88e6xxx_devmap_setup()
1670 err = chip->info->ops->set_cascade_port(chip, port); in mv88e6xxx_devmap_setup()
1675 err = mv88e6xxx_g1_set_device_number(chip, chip->ds->index); in mv88e6xxx_devmap_setup()
1685 if (chip->info->global2_addr) in mv88e6xxx_trunk_setup()
1693 if (chip->info->ops->rmu_disable) in mv88e6xxx_rmu_setup()
1694 return chip->info->ops->rmu_disable(chip); in mv88e6xxx_rmu_setup()
1701 if (chip->info->ops->pot_clear) in mv88e6xxx_pot_setup()
1702 return chip->info->ops->pot_clear(chip); in mv88e6xxx_pot_setup()
1709 if (chip->info->ops->mgmt_rsvd2cpu) in mv88e6xxx_rsvd2cpu_setup()
1710 return chip->info->ops->mgmt_rsvd2cpu(chip); in mv88e6xxx_rsvd2cpu_setup()
1726 * ->port_setup_message_port. in mv88e6xxx_atu_setup()
1728 if (chip->info->ops->port_setup_message_port) { in mv88e6xxx_atu_setup()
1742 if (!chip->info->ops->irl_init_all) in mv88e6xxx_irl_setup()
1749 err = chip->info->ops->irl_init_all(chip, port); in mv88e6xxx_irl_setup()
1759 if (chip->info->ops->set_switch_mac) { in mv88e6xxx_mac_setup()
1764 return chip->info->ops->set_switch_mac(chip, addr); in mv88e6xxx_mac_setup()
1772 struct dsa_switch_tree *dst = chip->ds->dst; in mv88e6xxx_pvt_map()
1780 /* Skip the local source device, which uses in-chip port VLAN */ in mv88e6xxx_pvt_map()
1781 if (dev != chip->ds->index) { in mv88e6xxx_pvt_map()
1784 ds = dsa_switch_find(dst->index, dev); in mv88e6xxx_pvt_map()
1786 if (dp && dp->lag) { in mv88e6xxx_pvt_map()
1791 * the LAG ID (one-based) as the port number in mv88e6xxx_pvt_map()
1792 * (zero-based). in mv88e6xxx_pvt_map()
1795 port = dsa_port_lag_id_get(dp) - 1; in mv88e6xxx_pvt_map()
1831 if (dsa_to_port(chip->ds, port)->lag) in mv88e6xxx_port_fast_age_fid()
1832 /* Hardware is incapable of fast-aging a LAG through a in mv88e6xxx_port_fast_age_fid()
1834 * more fancy in place this is a no-op. in mv88e6xxx_port_fast_age_fid()
1836 return -EOPNOTSUPP; in mv88e6xxx_port_fast_age_fid()
1843 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_fast_age()
1851 dev_err(chip->ds->dev, "p%d: failed to flush ATU: %d\n", in mv88e6xxx_port_fast_age()
1868 if (!chip->info->ops->vtu_getnext) in mv88e6xxx_vtu_get()
1869 return -EOPNOTSUPP; in mv88e6xxx_vtu_get()
1871 entry->vid = vid ? vid - 1 : mv88e6xxx_max_vid(chip); in mv88e6xxx_vtu_get()
1872 entry->valid = false; in mv88e6xxx_vtu_get()
1874 err = chip->info->ops->vtu_getnext(chip, entry); in mv88e6xxx_vtu_get()
1876 if (entry->vid != vid) in mv88e6xxx_vtu_get()
1877 entry->valid = false; in mv88e6xxx_vtu_get()
1894 if (!chip->info->ops->vtu_getnext) in mv88e6xxx_vtu_walk()
1895 return -EOPNOTSUPP; in mv88e6xxx_vtu_walk()
1898 err = chip->info->ops->vtu_getnext(chip, &entry); in mv88e6xxx_vtu_walk()
1916 if (!chip->info->ops->vtu_loadpurge) in mv88e6xxx_vtu_loadpurge()
1917 return -EOPNOTSUPP; in mv88e6xxx_vtu_loadpurge()
1919 return chip->info->ops->vtu_loadpurge(chip, entry); in mv88e6xxx_vtu_loadpurge()
1924 *fid = find_first_zero_bit(chip->fid_bitmap, MV88E6XXX_N_FID); in mv88e6xxx_atu_new()
1926 return -ENOSPC; in mv88e6xxx_atu_new()
1935 if (!chip->info->ops->stu_loadpurge) in mv88e6xxx_stu_loadpurge()
1936 return -EOPNOTSUPP; in mv88e6xxx_stu_loadpurge()
1938 return chip->info->ops->stu_loadpurge(chip, entry); in mv88e6xxx_stu_loadpurge()
1966 list_for_each_entry(mst, &chip->msts, node) in mv88e6xxx_sid_get()
1967 __set_bit(mst->stu.sid, busy); in mv88e6xxx_sid_get()
1971 return (*sid >= mv88e6xxx_max_sid(chip)) ? -ENOSPC : 0; in mv88e6xxx_sid_get()
1982 list_for_each_entry_safe(mst, tmp, &chip->msts, node) { in mv88e6xxx_mst_put()
1983 if (mst->stu.sid != sid) in mv88e6xxx_mst_put()
1986 if (!refcount_dec_and_test(&mst->refcnt)) in mv88e6xxx_mst_put()
1989 mst->stu.valid = false; in mv88e6xxx_mst_put()
1990 err = mv88e6xxx_stu_loadpurge(chip, &mst->stu); in mv88e6xxx_mst_put()
1992 refcount_set(&mst->refcnt, 1); in mv88e6xxx_mst_put()
1996 list_del(&mst->node); in mv88e6xxx_mst_put()
2001 return -ENOENT; in mv88e6xxx_mst_put()
2011 err = -EOPNOTSUPP; in mv88e6xxx_mst_get()
2020 list_for_each_entry(mst, &chip->msts, node) { in mv88e6xxx_mst_get()
2021 if (mst->br == br && mst->msti == msti) { in mv88e6xxx_mst_get()
2022 refcount_inc(&mst->refcnt); in mv88e6xxx_mst_get()
2023 *sid = mst->stu.sid; in mv88e6xxx_mst_get()
2034 err = -ENOMEM; in mv88e6xxx_mst_get()
2038 INIT_LIST_HEAD(&mst->node); in mv88e6xxx_mst_get()
2039 refcount_set(&mst->refcnt, 1); in mv88e6xxx_mst_get()
2040 mst->br = br; in mv88e6xxx_mst_get()
2041 mst->msti = msti; in mv88e6xxx_mst_get()
2042 mst->stu.valid = true; in mv88e6xxx_mst_get()
2043 mst->stu.sid = *sid; in mv88e6xxx_mst_get()
2046 * a STU state of disabled means to go by the port-global in mv88e6xxx_mst_get()
2051 mst->stu.state[i] = dsa_is_user_port(chip->ds, i) ? in mv88e6xxx_mst_get()
2055 err = mv88e6xxx_stu_loadpurge(chip, &mst->stu); in mv88e6xxx_mst_get()
2059 list_add_tail(&mst->node, &chip->msts); in mv88e6xxx_mst_get()
2072 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_mst_state_set()
2078 return -EOPNOTSUPP; in mv88e6xxx_port_mst_state_set()
2080 switch (st->state) { in mv88e6xxx_port_mst_state_set()
2093 return -EINVAL; in mv88e6xxx_port_mst_state_set()
2096 list_for_each_entry(mst, &chip->msts, node) { in mv88e6xxx_port_mst_state_set()
2097 if (mst->br == dsa_port_bridge_dev_get(dp) && in mv88e6xxx_port_mst_state_set()
2098 mst->msti == st->msti) { in mv88e6xxx_port_mst_state_set()
2099 if (mst->stu.state[port] == state) in mv88e6xxx_port_mst_state_set()
2102 mst->stu.state[port] = state; in mv88e6xxx_port_mst_state_set()
2104 err = mv88e6xxx_stu_loadpurge(chip, &mst->stu); in mv88e6xxx_port_mst_state_set()
2110 return -ENOENT; in mv88e6xxx_port_mst_state_set()
2117 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_check_hw_vlan()
2135 if (vlan.member[other_dp->index] == in mv88e6xxx_port_check_hw_vlan()
2146 dev_err(ds->dev, "p%d: hw VLAN %d already used by port %d in %s\n", in mv88e6xxx_port_check_hw_vlan()
2147 port, vlan.vid, other_dp->index, netdev_name(other_br)); in mv88e6xxx_port_check_hw_vlan()
2148 return -EOPNOTSUPP; in mv88e6xxx_port_check_hw_vlan()
2156 struct dsa_port *dp = dsa_to_port(chip->ds, port); in mv88e6xxx_port_commit_pvid()
2158 struct mv88e6xxx_port *p = &chip->ports[port]; in mv88e6xxx_port_commit_pvid()
2165 pvid = p->bridge_pvid.vid; in mv88e6xxx_port_commit_pvid()
2166 drop_untagged = !p->bridge_pvid.valid; in mv88e6xxx_port_commit_pvid()
2183 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_vlan_filtering()
2189 return -EOPNOTSUPP; in mv88e6xxx_port_vlan_filtering()
2211 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_vlan_prepare()
2215 return -EOPNOTSUPP; in mv88e6xxx_port_vlan_prepare()
2221 err = mv88e6xxx_port_check_hw_vlan(ds, port, vlan->vid); in mv88e6xxx_port_vlan_prepare()
2241 * VLAN ID into the port's database used for VLAN-unaware bridging. in mv88e6xxx_port_db_load_purge()
2250 /* switchdev expects -EOPNOTSUPP to honor software VLANs */ in mv88e6xxx_port_db_load_purge()
2252 return -EOPNOTSUPP; in mv88e6xxx_port_db_load_purge()
2291 enum mv88e6xxx_policy_mapping mapping = policy->mapping; in mv88e6xxx_policy_apply()
2292 enum mv88e6xxx_policy_action action = policy->action; in mv88e6xxx_policy_apply()
2293 const u8 *addr = policy->addr; in mv88e6xxx_policy_apply()
2294 u16 vid = policy->vid; in mv88e6xxx_policy_apply()
2299 if (!chip->info->ops->port_set_policy) in mv88e6xxx_policy_apply()
2300 return -EOPNOTSUPP; in mv88e6xxx_policy_apply()
2314 return -EOPNOTSUPP; in mv88e6xxx_policy_apply()
2322 return -EOPNOTSUPP; in mv88e6xxx_policy_apply()
2327 idr_for_each_entry(&chip->policies, policy, id) in mv88e6xxx_policy_apply()
2328 if (policy->port == port && in mv88e6xxx_policy_apply()
2329 policy->mapping == mapping && in mv88e6xxx_policy_apply()
2330 policy->action != action) in mv88e6xxx_policy_apply()
2333 return chip->info->ops->port_set_policy(chip, port, mapping, action); in mv88e6xxx_policy_apply()
2339 struct ethhdr *mac_entry = &fs->h_u.ether_spec; in mv88e6xxx_policy_insert()
2340 struct ethhdr *mac_mask = &fs->m_u.ether_spec; in mv88e6xxx_policy_insert()
2349 if (fs->location != RX_CLS_LOC_ANY) in mv88e6xxx_policy_insert()
2350 return -EINVAL; in mv88e6xxx_policy_insert()
2352 if (fs->ring_cookie == RX_CLS_FLOW_DISC) in mv88e6xxx_policy_insert()
2355 return -EOPNOTSUPP; in mv88e6xxx_policy_insert()
2357 switch (fs->flow_type & ~FLOW_EXT) { in mv88e6xxx_policy_insert()
2359 if (!is_zero_ether_addr(mac_mask->h_dest) && in mv88e6xxx_policy_insert()
2360 is_zero_ether_addr(mac_mask->h_source)) { in mv88e6xxx_policy_insert()
2362 addr = mac_entry->h_dest; in mv88e6xxx_policy_insert()
2363 } else if (is_zero_ether_addr(mac_mask->h_dest) && in mv88e6xxx_policy_insert()
2364 !is_zero_ether_addr(mac_mask->h_source)) { in mv88e6xxx_policy_insert()
2366 addr = mac_entry->h_source; in mv88e6xxx_policy_insert()
2369 return -EOPNOTSUPP; in mv88e6xxx_policy_insert()
2373 return -EOPNOTSUPP; in mv88e6xxx_policy_insert()
2376 if ((fs->flow_type & FLOW_EXT) && fs->m_ext.vlan_tci) { in mv88e6xxx_policy_insert()
2377 if (fs->m_ext.vlan_tci != htons(0xffff)) in mv88e6xxx_policy_insert()
2378 return -EOPNOTSUPP; in mv88e6xxx_policy_insert()
2379 vid = be16_to_cpu(fs->h_ext.vlan_tci) & VLAN_VID_MASK; in mv88e6xxx_policy_insert()
2382 idr_for_each_entry(&chip->policies, policy, id) { in mv88e6xxx_policy_insert()
2383 if (policy->port == port && policy->mapping == mapping && in mv88e6xxx_policy_insert()
2384 policy->action == action && policy->vid == vid && in mv88e6xxx_policy_insert()
2385 ether_addr_equal(policy->addr, addr)) in mv88e6xxx_policy_insert()
2386 return -EEXIST; in mv88e6xxx_policy_insert()
2389 policy = devm_kzalloc(chip->dev, sizeof(*policy), GFP_KERNEL); in mv88e6xxx_policy_insert()
2391 return -ENOMEM; in mv88e6xxx_policy_insert()
2393 fs->location = 0; in mv88e6xxx_policy_insert()
2394 err = idr_alloc_u32(&chip->policies, policy, &fs->location, 0xffffffff, in mv88e6xxx_policy_insert()
2397 devm_kfree(chip->dev, policy); in mv88e6xxx_policy_insert()
2401 memcpy(&policy->fs, fs, sizeof(*fs)); in mv88e6xxx_policy_insert()
2402 ether_addr_copy(policy->addr, addr); in mv88e6xxx_policy_insert()
2403 policy->mapping = mapping; in mv88e6xxx_policy_insert()
2404 policy->action = action; in mv88e6xxx_policy_insert()
2405 policy->port = port; in mv88e6xxx_policy_insert()
2406 policy->vid = vid; in mv88e6xxx_policy_insert()
2410 idr_remove(&chip->policies, fs->location); in mv88e6xxx_policy_insert()
2411 devm_kfree(chip->dev, policy); in mv88e6xxx_policy_insert()
2421 struct ethtool_rx_flow_spec *fs = &rxnfc->fs; in mv88e6xxx_get_rxnfc()
2422 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_get_rxnfc()
2429 switch (rxnfc->cmd) { in mv88e6xxx_get_rxnfc()
2431 rxnfc->data = 0; in mv88e6xxx_get_rxnfc()
2432 rxnfc->data |= RX_CLS_LOC_SPECIAL; in mv88e6xxx_get_rxnfc()
2433 rxnfc->rule_cnt = 0; in mv88e6xxx_get_rxnfc()
2434 idr_for_each_entry(&chip->policies, policy, id) in mv88e6xxx_get_rxnfc()
2435 if (policy->port == port) in mv88e6xxx_get_rxnfc()
2436 rxnfc->rule_cnt++; in mv88e6xxx_get_rxnfc()
2440 err = -ENOENT; in mv88e6xxx_get_rxnfc()
2441 policy = idr_find(&chip->policies, fs->location); in mv88e6xxx_get_rxnfc()
2443 memcpy(fs, &policy->fs, sizeof(*fs)); in mv88e6xxx_get_rxnfc()
2448 rxnfc->data = 0; in mv88e6xxx_get_rxnfc()
2449 rxnfc->rule_cnt = 0; in mv88e6xxx_get_rxnfc()
2450 idr_for_each_entry(&chip->policies, policy, id) in mv88e6xxx_get_rxnfc()
2451 if (policy->port == port) in mv88e6xxx_get_rxnfc()
2452 rule_locs[rxnfc->rule_cnt++] = id; in mv88e6xxx_get_rxnfc()
2456 err = -EOPNOTSUPP; in mv88e6xxx_get_rxnfc()
2468 struct ethtool_rx_flow_spec *fs = &rxnfc->fs; in mv88e6xxx_set_rxnfc()
2469 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_set_rxnfc()
2475 switch (rxnfc->cmd) { in mv88e6xxx_set_rxnfc()
2480 err = -ENOENT; in mv88e6xxx_set_rxnfc()
2481 policy = idr_remove(&chip->policies, fs->location); in mv88e6xxx_set_rxnfc()
2483 policy->action = MV88E6XXX_POLICY_ACTION_NORMAL; in mv88e6xxx_set_rxnfc()
2485 devm_kfree(chip->dev, policy); in mv88e6xxx_set_rxnfc()
2489 err = -EOPNOTSUPP; in mv88e6xxx_set_rxnfc()
2515 struct dsa_port *dp = dsa_to_port(chip->ds, port); in mv88e6xxx_broadcast_setup()
2518 if (dsa_is_unused_port(chip->ds, port)) in mv88e6xxx_broadcast_setup()
2550 if (ctx->flood) in mv88e6xxx_port_broadcast_sync_vlan()
2557 return mv88e6xxx_port_db_load_purge(chip, ctx->port, broadcast, in mv88e6xxx_port_broadcast_sync_vlan()
2558 vlan->vid, state); in mv88e6xxx_port_broadcast_sync_vlan()
2627 dev_info(chip->dev, "p%d: already a member of VLAN %d\n", in mv88e6xxx_port_vlan_join()
2632 bitmap_set(chip->fid_bitmap, vlan.fid, 1); in mv88e6xxx_port_vlan_join()
2641 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_vlan_add()
2642 bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED; in mv88e6xxx_port_vlan_add()
2643 bool pvid = vlan->flags & BRIDGE_VLAN_INFO_PVID; in mv88e6xxx_port_vlan_add()
2644 struct mv88e6xxx_port *p = &chip->ports[port]; in mv88e6xxx_port_vlan_add()
2649 if (!vlan->vid) in mv88e6xxx_port_vlan_add()
2670 err = mv88e6xxx_port_vlan_join(chip, port, vlan->vid, member, warn); in mv88e6xxx_port_vlan_add()
2672 dev_err(ds->dev, "p%d: failed to add VLAN %d%c\n", port, in mv88e6xxx_port_vlan_add()
2673 vlan->vid, untagged ? 'u' : 't'); in mv88e6xxx_port_vlan_add()
2678 p->bridge_pvid.vid = vlan->vid; in mv88e6xxx_port_vlan_add()
2679 p->bridge_pvid.valid = true; in mv88e6xxx_port_vlan_add()
2684 } else if (vlan->vid && p->bridge_pvid.vid == vlan->vid) { in mv88e6xxx_port_vlan_add()
2685 /* The old pvid was reinstalled as a non-pvid VLAN */ in mv88e6xxx_port_vlan_add()
2686 p->bridge_pvid.valid = false; in mv88e6xxx_port_vlan_add()
2717 return -EOPNOTSUPP; in mv88e6xxx_port_vlan_leave()
2741 bitmap_clear(chip->fid_bitmap, vlan.fid, 1); in mv88e6xxx_port_vlan_leave()
2750 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_vlan_del()
2751 struct mv88e6xxx_port *p = &chip->ports[port]; in mv88e6xxx_port_vlan_del()
2756 return -EOPNOTSUPP; in mv88e6xxx_port_vlan_del()
2771 err = mv88e6xxx_port_vlan_leave(chip, port, vlan->vid); in mv88e6xxx_port_vlan_del()
2775 if (vlan->vid == pvid) { in mv88e6xxx_port_vlan_del()
2776 p->bridge_pvid.valid = false; in mv88e6xxx_port_vlan_del()
2791 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_vlan_fast_age()
2813 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_vlan_msti_set()
2819 return -EOPNOTSUPP; in mv88e6xxx_vlan_msti_set()
2823 err = mv88e6xxx_vtu_get(chip, msti->vid, &vlan); in mv88e6xxx_vlan_msti_set()
2828 err = -EINVAL; in mv88e6xxx_vlan_msti_set()
2834 err = mv88e6xxx_mst_get(chip, bridge.dev, msti->msti, &new_sid); in mv88e6xxx_vlan_msti_set()
2859 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_fdb_add()
2874 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_fdb_del()
2931 return mv88e6xxx_port_db_dump_fid(chip, entry->fid, entry->vid, in mv88e6xxx_port_db_dump_vlan()
2932 ctx->port, ctx->cb, ctx->data); in mv88e6xxx_port_db_dump_vlan()
2961 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_fdb_dump()
2974 struct dsa_switch *ds = chip->ds; in mv88e6xxx_bridge_map()
2975 struct dsa_switch_tree *dst = ds->dst; in mv88e6xxx_bridge_map()
2979 list_for_each_entry(dp, &dst->ports, list) { in mv88e6xxx_bridge_map()
2981 if (dp->ds == ds) { in mv88e6xxx_bridge_map()
2985 err = mv88e6xxx_port_vlan_map(chip, dp->index); in mv88e6xxx_bridge_map()
2989 /* This is an external bridge group member, in mv88e6xxx_bridge_map()
2990 * remap its cross-chip Port VLAN Table entry. in mv88e6xxx_bridge_map()
2992 err = mv88e6xxx_pvt_map(chip, dp->ds->index, in mv88e6xxx_bridge_map()
2993 dp->index); in mv88e6xxx_bridge_map()
3003 /* Treat the software bridge as a virtual single-port switch behind the
3004 * CPU and map in the PVT. First dst->last_switch elements are taken by
3010 u8 dev = bridge_num + ds->dst->last_switch; in mv88e6xxx_map_virtual_bridge_to_pvt()
3011 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_map_virtual_bridge_to_pvt()
3021 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_bridge_join()
3055 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_bridge_leave()
3062 dev_err(ds->dev, "failed to remap cross-chip Port VLAN\n"); in mv88e6xxx_port_bridge_leave()
3066 dev_err(ds->dev, "failed to remap in-chip Port VLAN\n"); in mv88e6xxx_port_bridge_leave()
3070 dev_err(ds->dev, in mv88e6xxx_port_bridge_leave()
3071 "port %d failed to restore map-DA: %pe\n", in mv88e6xxx_port_bridge_leave()
3076 dev_err(ds->dev, in mv88e6xxx_port_bridge_leave()
3088 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_crosschip_bridge_join()
3091 if (tree_index != ds->dst->index) in mv88e6xxx_crosschip_bridge_join()
3106 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_crosschip_bridge_leave()
3108 if (tree_index != ds->dst->index) in mv88e6xxx_crosschip_bridge_leave()
3114 dev_err(ds->dev, "failed to remap cross-chip Port VLAN\n"); in mv88e6xxx_crosschip_bridge_leave()
3120 if (chip->info->ops->reset) in mv88e6xxx_software_reset()
3121 return chip->info->ops->reset(chip); in mv88e6xxx_software_reset()
3128 struct gpio_desc *gpiod = chip->reset; in mv88e6xxx_hardware_reset()
3135 * mid-byte, causing the first EEPROM read after the reset in mv88e6xxx_hardware_reset()
3139 * generally wait for EEPROM loads to complete as their pre- in mv88e6xxx_hardware_reset()
3140 * and post-reset handlers. in mv88e6xxx_hardware_reset()
3142 if (chip->info->ops->hardware_reset_pre) { in mv88e6xxx_hardware_reset()
3143 err = chip->info->ops->hardware_reset_pre(chip); in mv88e6xxx_hardware_reset()
3145 dev_err(chip->dev, "pre-reset error: %d\n", err); in mv88e6xxx_hardware_reset()
3153 if (chip->info->ops->hardware_reset_post) { in mv88e6xxx_hardware_reset()
3154 err = chip->info->ops->hardware_reset_post(chip); in mv88e6xxx_hardware_reset()
3156 dev_err(chip->dev, "post-reset error: %d\n", err); in mv88e6xxx_hardware_reset()
3199 if (!chip->info->ops->port_set_frame_mode) in mv88e6xxx_set_port_mode()
3200 return -EOPNOTSUPP; in mv88e6xxx_set_port_mode()
3206 err = chip->info->ops->port_set_frame_mode(chip, port, frame); in mv88e6xxx_set_port_mode()
3210 if (chip->info->ops->port_set_ether_type) in mv88e6xxx_set_port_mode()
3211 return chip->info->ops->port_set_ether_type(chip, port, etype); in mv88e6xxx_set_port_mode()
3240 if (dsa_is_dsa_port(chip->ds, port)) in mv88e6xxx_setup_port_mode()
3243 if (dsa_is_user_port(chip->ds, port)) in mv88e6xxx_setup_port_mode()
3247 if (chip->tag_protocol == DSA_TAG_PROTO_DSA) in mv88e6xxx_setup_port_mode()
3250 if (chip->tag_protocol == DSA_TAG_PROTO_EDSA) in mv88e6xxx_setup_port_mode()
3253 return -EINVAL; in mv88e6xxx_setup_port_mode()
3258 bool message = dsa_is_dsa_port(chip->ds, port); in mv88e6xxx_setup_message_port()
3267 if (chip->info->ops->port_set_ucast_flood) { in mv88e6xxx_setup_egress_floods()
3268 err = chip->info->ops->port_set_ucast_flood(chip, port, true); in mv88e6xxx_setup_egress_floods()
3272 if (chip->info->ops->port_set_mcast_flood) { in mv88e6xxx_setup_egress_floods()
3273 err = chip->info->ops->port_set_mcast_flood(chip, port, true); in mv88e6xxx_setup_egress_floods()
3287 if (!chip->info->ops->set_egress_port) in mv88e6xxx_set_egress_port()
3288 return -EOPNOTSUPP; in mv88e6xxx_set_egress_port()
3290 err = chip->info->ops->set_egress_port(chip, direction, port); in mv88e6xxx_set_egress_port()
3295 chip->ingress_dest_port = port; in mv88e6xxx_set_egress_port()
3297 chip->egress_dest_port = port; in mv88e6xxx_set_egress_port()
3304 struct dsa_switch *ds = chip->ds; in mv88e6xxx_setup_upstream_port()
3309 if (chip->info->ops->port_set_upstream_port) { in mv88e6xxx_setup_upstream_port()
3310 err = chip->info->ops->port_set_upstream_port(chip, port, in mv88e6xxx_setup_upstream_port()
3317 if (chip->info->ops->set_cpu_port) { in mv88e6xxx_setup_upstream_port()
3318 err = chip->info->ops->set_cpu_port(chip, in mv88e6xxx_setup_upstream_port()
3327 if (err && err != -EOPNOTSUPP) in mv88e6xxx_setup_upstream_port()
3333 if (err && err != -EOPNOTSUPP) in mv88e6xxx_setup_upstream_port()
3345 struct dsa_switch *ds = chip->ds; in mv88e6xxx_setup_port()
3353 p = &chip->ports[port]; in mv88e6xxx_setup_port()
3354 p->chip = chip; in mv88e6xxx_setup_port()
3355 p->port = port; in mv88e6xxx_setup_port()
3358 ports_fwnode = device_get_named_child_node(chip->dev, "ethernet-ports"); in mv88e6xxx_setup_port()
3360 ports_fwnode = device_get_named_child_node(chip->dev, "ports"); in mv88e6xxx_setup_port()
3366 p->fwnode = port_fwnode; in mv88e6xxx_setup_port()
3367 p->fiber = fwnode_property_present(port_fwnode, "sfp"); in mv88e6xxx_setup_port()
3373 dev_dbg(chip->dev, "no ethernet ports node defined for the device\n"); in mv88e6xxx_setup_port()
3376 if (chip->info->ops->port_setup_leds) { in mv88e6xxx_setup_port()
3377 err = chip->info->ops->port_setup_leds(chip, port); in mv88e6xxx_setup_port()
3378 if (err && err != -EOPNOTSUPP) in mv88e6xxx_setup_port()
3388 /* Port Control: disable Drop-on-Unlock, disable Drop-on-Lock, in mv88e6xxx_setup_port()
3445 chip->info->ops->port_set_policy) { in mv88e6xxx_setup_port()
3446 err = chip->info->ops->port_set_policy(chip, port, in mv88e6xxx_setup_port()
3455 * loaded in the VTU - therefore, enable 802.1Q in order to take in mv88e6xxx_setup_port()
3481 * as the private PVID on ports under a VLAN-unaware bridge. in mv88e6xxx_setup_port()
3492 if (chip->info->ops->port_set_jumbo_size) { in mv88e6xxx_setup_port()
3493 err = chip->info->ops->port_set_jumbo_size(chip, port, 10218); in mv88e6xxx_setup_port()
3524 if (chip->info->ops->port_pause_limit) { in mv88e6xxx_setup_port()
3525 err = chip->info->ops->port_pause_limit(chip, port, 0, 0); in mv88e6xxx_setup_port()
3530 if (chip->info->ops->port_disable_learn_limit) { in mv88e6xxx_setup_port()
3531 err = chip->info->ops->port_disable_learn_limit(chip, port); in mv88e6xxx_setup_port()
3536 if (chip->info->ops->port_disable_pri_override) { in mv88e6xxx_setup_port()
3537 err = chip->info->ops->port_disable_pri_override(chip, port); in mv88e6xxx_setup_port()
3542 if (chip->info->ops->port_tag_remap) { in mv88e6xxx_setup_port()
3543 err = chip->info->ops->port_tag_remap(chip, port); in mv88e6xxx_setup_port()
3548 if (chip->info->ops->port_egress_rate_limiting) { in mv88e6xxx_setup_port()
3549 err = chip->info->ops->port_egress_rate_limiting(chip, port); in mv88e6xxx_setup_port()
3554 if (chip->info->ops->port_setup_message_port) { in mv88e6xxx_setup_port()
3555 err = chip->info->ops->port_setup_message_port(chip, port); in mv88e6xxx_setup_port()
3560 if (chip->info->ops->serdes_set_tx_amplitude) { in mv88e6xxx_setup_port()
3563 phy_handle = of_parse_phandle(dp->dn, "phy-handle", 0); in mv88e6xxx_setup_port()
3566 "tx-p2p-microvolt", in mv88e6xxx_setup_port()
3568 err = chip->info->ops->serdes_set_tx_amplitude(chip, in mv88e6xxx_setup_port()
3597 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_get_max_mtu()
3599 if (chip->info->ops->port_set_jumbo_size) in mv88e6xxx_get_max_mtu()
3600 return 10240 - VLAN_ETH_HLEN - EDSA_HLEN - ETH_FCS_LEN; in mv88e6xxx_get_max_mtu()
3601 else if (chip->info->ops->set_max_frame_size) in mv88e6xxx_get_max_mtu()
3602 return 1632 - VLAN_ETH_HLEN - EDSA_HLEN - ETH_FCS_LEN; in mv88e6xxx_get_max_mtu()
3608 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_change_mtu()
3614 if (!chip->info->ops->port_set_jumbo_size && in mv88e6xxx_change_mtu()
3615 !chip->info->ops->set_max_frame_size) { in mv88e6xxx_change_mtu()
3617 return -EINVAL; in mv88e6xxx_change_mtu()
3626 if (chip->info->ops->port_set_jumbo_size) in mv88e6xxx_change_mtu()
3627 ret = chip->info->ops->port_set_jumbo_size(chip, port, new_mtu); in mv88e6xxx_change_mtu()
3628 else if (chip->info->ops->set_max_frame_size && in mv88e6xxx_change_mtu()
3630 ret = chip->info->ops->set_max_frame_size(chip, new_mtu); in mv88e6xxx_change_mtu()
3639 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_set_ageing_time()
3654 if (chip->info->ops->stats_set_histogram) { in mv88e6xxx_stats_setup()
3655 err = chip->info->ops->stats_set_histogram(chip); in mv88e6xxx_stats_setup()
3673 dev_err(chip->dev, in mv88e6390_setup_errata_applied()
3721 struct mv88e6xxx_mdio_bus *mdio_bus = bus->priv; in mv88e6xxx_mdio_read()
3722 struct mv88e6xxx_chip *chip = mdio_bus->chip; in mv88e6xxx_mdio_read()
3727 if (!chip->info->ops->phy_read) in mv88e6xxx_mdio_read()
3728 return -EOPNOTSUPP; in mv88e6xxx_mdio_read()
3731 err = chip->info->ops->phy_read(chip, bus, phy, reg, &val); in mv88e6xxx_mdio_read()
3736 chip->info->family < ARRAY_SIZE(family_prod_id_table)) { in mv88e6xxx_mdio_read()
3737 prod_id = family_prod_id_table[chip->info->family]; in mv88e6xxx_mdio_read()
3748 struct mv88e6xxx_mdio_bus *mdio_bus = bus->priv; in mv88e6xxx_mdio_read_c45()
3749 struct mv88e6xxx_chip *chip = mdio_bus->chip; in mv88e6xxx_mdio_read_c45()
3753 if (!chip->info->ops->phy_read_c45) in mv88e6xxx_mdio_read_c45()
3754 return -ENODEV; in mv88e6xxx_mdio_read_c45()
3757 err = chip->info->ops->phy_read_c45(chip, bus, phy, devad, reg, &val); in mv88e6xxx_mdio_read_c45()
3765 struct mv88e6xxx_mdio_bus *mdio_bus = bus->priv; in mv88e6xxx_mdio_write()
3766 struct mv88e6xxx_chip *chip = mdio_bus->chip; in mv88e6xxx_mdio_write()
3769 if (!chip->info->ops->phy_write) in mv88e6xxx_mdio_write()
3770 return -EOPNOTSUPP; in mv88e6xxx_mdio_write()
3773 err = chip->info->ops->phy_write(chip, bus, phy, reg, val); in mv88e6xxx_mdio_write()
3782 struct mv88e6xxx_mdio_bus *mdio_bus = bus->priv; in mv88e6xxx_mdio_write_c45()
3783 struct mv88e6xxx_chip *chip = mdio_bus->chip; in mv88e6xxx_mdio_write_c45()
3786 if (!chip->info->ops->phy_write_c45) in mv88e6xxx_mdio_write_c45()
3787 return -EOPNOTSUPP; in mv88e6xxx_mdio_write_c45()
3790 err = chip->info->ops->phy_write_c45(chip, bus, phy, devad, reg, val); in mv88e6xxx_mdio_write_c45()
3798 bool external) in mv88e6xxx_mdio_register() argument
3805 if (external) { in mv88e6xxx_mdio_register()
3807 if (chip->info->family == MV88E6XXX_FAMILY_6393) in mv88e6xxx_mdio_register()
3819 return -ENOMEM; in mv88e6xxx_mdio_register()
3821 mdio_bus = bus->priv; in mv88e6xxx_mdio_register()
3822 mdio_bus->bus = bus; in mv88e6xxx_mdio_register()
3823 mdio_bus->chip = chip; in mv88e6xxx_mdio_register()
3824 INIT_LIST_HEAD(&mdio_bus->list); in mv88e6xxx_mdio_register()
3825 mdio_bus->external = external; in mv88e6xxx_mdio_register()
3828 bus->name = np->full_name; in mv88e6xxx_mdio_register()
3829 snprintf(bus->id, MII_BUS_ID_SIZE, "%pOF", np); in mv88e6xxx_mdio_register()
3831 bus->name = "mv88e6xxx SMI"; in mv88e6xxx_mdio_register()
3832 snprintf(bus->id, MII_BUS_ID_SIZE, "mv88e6xxx-%d", index++); in mv88e6xxx_mdio_register()
3835 bus->read = mv88e6xxx_mdio_read; in mv88e6xxx_mdio_register()
3836 bus->write = mv88e6xxx_mdio_write; in mv88e6xxx_mdio_register()
3837 bus->read_c45 = mv88e6xxx_mdio_read_c45; in mv88e6xxx_mdio_register()
3838 bus->write_c45 = mv88e6xxx_mdio_write_c45; in mv88e6xxx_mdio_register()
3839 bus->parent = chip->dev; in mv88e6xxx_mdio_register()
3840 bus->phy_mask = ~GENMASK(chip->info->phy_base_addr + in mv88e6xxx_mdio_register()
3841 mv88e6xxx_num_ports(chip) - 1, in mv88e6xxx_mdio_register()
3842 chip->info->phy_base_addr); in mv88e6xxx_mdio_register()
3844 if (!external) { in mv88e6xxx_mdio_register()
3852 dev_err(chip->dev, "Cannot register MDIO bus (%d)\n", err); in mv88e6xxx_mdio_register()
3857 if (external) in mv88e6xxx_mdio_register()
3858 list_add_tail(&mdio_bus->list, &chip->mdios); in mv88e6xxx_mdio_register()
3860 list_add(&mdio_bus->list, &chip->mdios); in mv88e6xxx_mdio_register()
3875 list_for_each_entry_safe(mdio_bus, p, &chip->mdios, list) { in mv88e6xxx_mdios_unregister()
3876 bus = mdio_bus->bus; in mv88e6xxx_mdios_unregister()
3878 if (!mdio_bus->external) in mv88e6xxx_mdios_unregister()
3888 struct device_node *np = chip->dev->of_node; in mv88e6xxx_mdios_register()
3892 /* Always register one mdio bus for the internal/default mdio in mv88e6xxx_mdios_register()
3896 child = of_get_child_by_name(np, "mdio"); in mv88e6xxx_mdios_register()
3903 * which say they are compatible with the external mdio in mv88e6xxx_mdios_register()
3908 child, "marvell,mv88e6xxx-mdio-external")) { in mv88e6xxx_mdios_register()
3923 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_teardown()
3933 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_setup()
3942 chip->ds = ds; in mv88e6xxx_setup()
3943 ds->user_mii_bus = mv88e6xxx_default_mdio_bus(chip); in mv88e6xxx_setup()
3951 ds->max_num_bridges = MV88E6XXX_MAX_PVT_SWITCHES - in mv88e6xxx_setup()
3952 ds->dst->last_switch - 1; in mv88e6xxx_setup()
3956 if (chip->info->ops->setup_errata) { in mv88e6xxx_setup()
3957 err = chip->info->ops->setup_errata(chip); in mv88e6xxx_setup()
3964 if (chip->info->ops->port_get_cmode) { in mv88e6xxx_setup()
3965 err = chip->info->ops->port_get_cmode(chip, i, &cmode); in mv88e6xxx_setup()
3969 chip->ports[i].cmode = cmode; in mv88e6xxx_setup()
3991 dev_err(chip->dev, "port %d is invalid\n", i); in mv88e6xxx_setup()
3992 err = -EINVAL; in mv88e6xxx_setup()
4050 if (chip->info->ptp_support) { in mv88e6xxx_setup()
4101 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_setup()
4104 if (chip->info->ops->pcs_ops && in mv88e6xxx_port_setup()
4105 chip->info->ops->pcs_ops->pcs_init) { in mv88e6xxx_port_setup()
4106 err = chip->info->ops->pcs_ops->pcs_init(chip, port); in mv88e6xxx_port_setup()
4116 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_teardown()
4120 if (chip->info->ops->pcs_ops && in mv88e6xxx_port_teardown()
4121 chip->info->ops->pcs_ops->pcs_teardown) in mv88e6xxx_port_teardown()
4122 chip->info->ops->pcs_ops->pcs_teardown(chip, port); in mv88e6xxx_port_teardown()
4127 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_get_eeprom_len()
4129 return chip->eeprom_len; in mv88e6xxx_get_eeprom_len()
4135 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_get_eeprom()
4138 if (!chip->info->ops->get_eeprom) in mv88e6xxx_get_eeprom()
4139 return -EOPNOTSUPP; in mv88e6xxx_get_eeprom()
4142 err = chip->info->ops->get_eeprom(chip, eeprom, data); in mv88e6xxx_get_eeprom()
4148 eeprom->magic = 0xc3ec4951; in mv88e6xxx_get_eeprom()
4156 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_set_eeprom()
4159 if (!chip->info->ops->set_eeprom) in mv88e6xxx_set_eeprom()
4160 return -EOPNOTSUPP; in mv88e6xxx_set_eeprom()
4162 if (eeprom->magic != 0xc3ec4951) in mv88e6xxx_set_eeprom()
4163 return -EINVAL; in mv88e6xxx_set_eeprom()
4166 err = chip->info->ops->set_eeprom(chip, eeprom, data); in mv88e6xxx_set_eeprom()
5634 /* Ports 2-4 are not routed to pins
6103 /* Ports 2-4 are not routed to pins
6473 return -ENODEV; in mv88e6xxx_detect()
6476 chip->info = info; in mv88e6xxx_detect()
6478 dev_info(chip->dev, "switch 0x%x detected: %s, revision %u\n", in mv88e6xxx_detect()
6479 chip->info->prod_num, chip->info->name, rev); in mv88e6xxx_detect()
6489 /* dual_chip takes precedence over single/multi-chip modes */ in mv88e6xxx_single_chip_detect()
6490 if (chip->info->dual_chip) in mv88e6xxx_single_chip_detect()
6491 return -EINVAL; in mv88e6xxx_single_chip_detect()
6493 /* If the mdio addr is 16 indicating the first port address of a switch in mv88e6xxx_single_chip_detect()
6500 if (mdiodev->addr != 16) in mv88e6xxx_single_chip_detect()
6501 return -EINVAL; in mv88e6xxx_single_chip_detect()
6503 err = mv88e6xxx_smi_init(chip, mdiodev->bus, 0); in mv88e6xxx_single_chip_detect()
6518 chip->dev = dev; in mv88e6xxx_alloc_chip()
6520 mutex_init(&chip->reg_lock); in mv88e6xxx_alloc_chip()
6521 INIT_LIST_HEAD(&chip->mdios); in mv88e6xxx_alloc_chip()
6522 idr_init(&chip->policies); in mv88e6xxx_alloc_chip()
6523 INIT_LIST_HEAD(&chip->msts); in mv88e6xxx_alloc_chip()
6532 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_get_tag_protocol()
6534 return chip->tag_protocol; in mv88e6xxx_get_tag_protocol()
6540 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_change_tag_protocol()
6547 switch (chip->info->edsa_support) { in mv88e6xxx_change_tag_protocol()
6549 return -EPROTONOSUPPORT; in mv88e6xxx_change_tag_protocol()
6551 dev_warn(chip->dev, "Relying on undocumented EDSA tagging behavior\n"); in mv88e6xxx_change_tag_protocol()
6560 return -EPROTONOSUPPORT; in mv88e6xxx_change_tag_protocol()
6563 old_protocol = chip->tag_protocol; in mv88e6xxx_change_tag_protocol()
6564 chip->tag_protocol = proto; in mv88e6xxx_change_tag_protocol()
6568 err = mv88e6xxx_setup_port_mode(chip, cpu_dp->index); in mv88e6xxx_change_tag_protocol()
6579 chip->tag_protocol = old_protocol; in mv88e6xxx_change_tag_protocol()
6583 mv88e6xxx_setup_port_mode(chip, cpu_dp->index); in mv88e6xxx_change_tag_protocol()
6593 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_mdb_add()
6597 err = mv88e6xxx_port_db_load_purge(chip, port, mdb->addr, mdb->vid, in mv88e6xxx_port_mdb_add()
6608 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_mdb_del()
6612 err = mv88e6xxx_port_db_load_purge(chip, port, mdb->addr, mdb->vid, 0); in mv88e6xxx_port_mdb_del()
6626 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_mirror_add()
6631 mutex_lock(&chip->reg_lock); in mv88e6xxx_port_mirror_add()
6632 if ((ingress ? chip->ingress_dest_port : chip->egress_dest_port) != in mv88e6xxx_port_mirror_add()
6633 mirror->to_local_port) { in mv88e6xxx_port_mirror_add()
6636 chip->ports[i].mirror_ingress : in mv88e6xxx_port_mirror_add()
6637 chip->ports[i].mirror_egress; in mv88e6xxx_port_mirror_add()
6641 err = -EBUSY; in mv88e6xxx_port_mirror_add()
6646 mirror->to_local_port); in mv88e6xxx_port_mirror_add()
6653 mutex_unlock(&chip->reg_lock); in mv88e6xxx_port_mirror_add()
6661 enum mv88e6xxx_egress_direction direction = mirror->ingress ? in mv88e6xxx_port_mirror_del()
6664 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_mirror_del()
6668 mutex_lock(&chip->reg_lock); in mv88e6xxx_port_mirror_del()
6670 dev_err(ds->dev, "p%d: failed to disable mirroring\n", port); in mv88e6xxx_port_mirror_del()
6673 other_mirrors |= mirror->ingress ? in mv88e6xxx_port_mirror_del()
6674 chip->ports[i].mirror_ingress : in mv88e6xxx_port_mirror_del()
6675 chip->ports[i].mirror_egress; in mv88e6xxx_port_mirror_del()
6681 dev_err(ds->dev, "failed to set egress port\n"); in mv88e6xxx_port_mirror_del()
6684 mutex_unlock(&chip->reg_lock); in mv88e6xxx_port_mirror_del()
6691 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_pre_bridge_flags()
6696 return -EINVAL; in mv88e6xxx_port_pre_bridge_flags()
6698 ops = chip->info->ops; in mv88e6xxx_port_pre_bridge_flags()
6700 if ((flags.mask & BR_FLOOD) && !ops->port_set_ucast_flood) in mv88e6xxx_port_pre_bridge_flags()
6701 return -EINVAL; in mv88e6xxx_port_pre_bridge_flags()
6703 if ((flags.mask & BR_MCAST_FLOOD) && !ops->port_set_mcast_flood) in mv88e6xxx_port_pre_bridge_flags()
6704 return -EINVAL; in mv88e6xxx_port_pre_bridge_flags()
6713 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_bridge_flags()
6730 err = chip->info->ops->port_set_ucast_flood(chip, port, in mv88e6xxx_port_bridge_flags()
6739 err = chip->info->ops->port_set_mcast_flood(chip, port, in mv88e6xxx_port_bridge_flags()
6777 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_lag_can_offload()
6789 dsa_lag_foreach_port(dp, ds->dst, &lag) in mv88e6xxx_lag_can_offload()
6802 if (info->tx_type != NETDEV_LAG_TX_TYPE_HASH) { in mv88e6xxx_lag_can_offload()
6817 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_lag_sync_map()
6822 /* DSA LAG IDs are one-based, hardware is zero-based */ in mv88e6xxx_lag_sync_map()
6823 id = lag.id - 1; in mv88e6xxx_lag_sync_map()
6829 dsa_lag_foreach_port(dp, ds->dst, &lag) in mv88e6xxx_lag_sync_map()
6830 map |= BIT(dsa_towards_port(ds, dp->ds->index, dp->index)); in mv88e6xxx_lag_sync_map()
6862 active = mv88e6xxx_lag_mask_table[num_tx - 1][nth]; in mv88e6xxx_lag_set_port_mask()
6872 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_lag_sync_masks()
6881 ivec = BIT(mv88e6xxx_num_ports(chip)) - 1; in mv88e6xxx_lag_sync_masks()
6885 if (!dp->lag) in mv88e6xxx_lag_sync_masks()
6888 ivec &= ~BIT(dp->index); in mv88e6xxx_lag_sync_masks()
6897 dsa_lags_foreach_id(id, ds->dst) { in mv88e6xxx_lag_sync_masks()
6898 lag = dsa_lag_by_id(ds->dst, id); in mv88e6xxx_lag_sync_masks()
6903 dsa_lag_foreach_port(dp, ds->dst, lag) { in mv88e6xxx_lag_sync_masks()
6904 if (dp->lag_tx_enabled) in mv88e6xxx_lag_sync_masks()
6912 dsa_lag_foreach_port(dp, ds->dst, lag) { in mv88e6xxx_lag_sync_masks()
6913 if (!dp->lag_tx_enabled) in mv88e6xxx_lag_sync_masks()
6916 if (dp->ds == ds) in mv88e6xxx_lag_sync_masks()
6917 mv88e6xxx_lag_set_port_mask(mask, dp->index, in mv88e6xxx_lag_sync_masks()
6948 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_lag_change()
6962 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_lag_join()
6966 return -EOPNOTSUPP; in mv88e6xxx_port_lag_join()
6968 /* DSA LAG IDs are one-based */ in mv88e6xxx_port_lag_join()
6969 id = lag.id - 1; in mv88e6xxx_port_lag_join()
6994 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_port_lag_leave()
7007 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_crosschip_lag_change()
7021 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_crosschip_lag_join()
7025 return -EOPNOTSUPP; in mv88e6xxx_crosschip_lag_join()
7043 struct mv88e6xxx_chip *chip = ds->priv; in mv88e6xxx_crosschip_lag_leave()
7126 struct device *dev = chip->dev; in mv88e6xxx_register_switch()
7131 return -ENOMEM; in mv88e6xxx_register_switch()
7133 ds->dev = dev; in mv88e6xxx_register_switch()
7134 ds->num_ports = mv88e6xxx_num_ports(chip); in mv88e6xxx_register_switch()
7135 ds->priv = chip; in mv88e6xxx_register_switch()
7136 ds->dev = dev; in mv88e6xxx_register_switch()
7137 ds->ops = &mv88e6xxx_switch_ops; in mv88e6xxx_register_switch()
7138 ds->phylink_mac_ops = &mv88e6xxx_phylink_mac_ops; in mv88e6xxx_register_switch()
7139 ds->ageing_time_min = chip->info->age_time_coeff; in mv88e6xxx_register_switch()
7140 ds->ageing_time_max = chip->info->age_time_coeff * U8_MAX; in mv88e6xxx_register_switch()
7143 * 5-bit port mode, which we do not support. 640k^W16 ought to in mv88e6xxx_register_switch()
7146 ds->num_lag_ids = mv88e6xxx_has_lag(chip) ? 16 : 0; in mv88e6xxx_register_switch()
7155 dsa_unregister_switch(chip->ds); in mv88e6xxx_unregister_switch()
7160 const struct of_device_id *matches = dev->driver->of_match_table; in pdata_device_get_match_data()
7161 const struct dsa_mv88e6xxx_pdata *pdata = dev->platform_data; in pdata_device_get_match_data()
7163 for (; matches->name[0] || matches->type[0] || matches->compatible[0]; in pdata_device_get_match_data()
7165 if (!strcmp(pdata->compatible, matches->compatible)) in pdata_device_get_match_data()
7166 return matches->data; in pdata_device_get_match_data()
7176 return -EOPNOTSUPP; in mv88e6xxx_suspend()
7188 struct dsa_mv88e6xxx_pdata *pdata = mdiodev->dev.platform_data; in mv88e6xxx_probe()
7190 struct device *dev = &mdiodev->dev; in mv88e6xxx_probe()
7191 struct device_node *np = dev->of_node; in mv88e6xxx_probe()
7197 return -EINVAL; in mv88e6xxx_probe()
7205 if (!pdata->netdev) in mv88e6xxx_probe()
7206 return -EINVAL; in mv88e6xxx_probe()
7209 if (!(pdata->enabled_ports & (1 << port))) in mv88e6xxx_probe()
7211 if (strcmp(pdata->cd.port_names[port], "cpu")) in mv88e6xxx_probe()
7213 pdata->cd.netdev[port] = &pdata->netdev->dev; in mv88e6xxx_probe()
7219 return -EINVAL; in mv88e6xxx_probe()
7223 err = -ENOMEM; in mv88e6xxx_probe()
7227 chip->info = compat_info; in mv88e6xxx_probe()
7229 chip->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); in mv88e6xxx_probe()
7230 if (IS_ERR(chip->reset)) { in mv88e6xxx_probe()
7231 err = PTR_ERR(chip->reset); in mv88e6xxx_probe()
7234 if (chip->reset) in mv88e6xxx_probe()
7242 err = mv88e6xxx_smi_init(chip, mdiodev->bus, mdiodev->addr); in mv88e6xxx_probe()
7251 if (chip->info->edsa_support == MV88E6XXX_EDSA_SUPPORTED) in mv88e6xxx_probe()
7252 chip->tag_protocol = DSA_TAG_PROTO_EDSA; in mv88e6xxx_probe()
7254 chip->tag_protocol = DSA_TAG_PROTO_DSA; in mv88e6xxx_probe()
7258 if (chip->info->ops->get_eeprom) { in mv88e6xxx_probe()
7260 of_property_read_u32(np, "eeprom-length", in mv88e6xxx_probe()
7261 &chip->eeprom_len); in mv88e6xxx_probe()
7263 chip->eeprom_len = pdata->eeprom_len; in mv88e6xxx_probe()
7273 chip->irq = of_irq_get(np, 0); in mv88e6xxx_probe()
7274 if (chip->irq == -EPROBE_DEFER) { in mv88e6xxx_probe()
7275 err = chip->irq; in mv88e6xxx_probe()
7281 chip->irq = pdata->irq; in mv88e6xxx_probe()
7283 /* Has to be performed before the MDIO bus is created, because in mv88e6xxx_probe()
7288 if (chip->irq > 0) in mv88e6xxx_probe()
7297 if (chip->info->g2_irqs > 0) { in mv88e6xxx_probe()
7322 if (chip->info->g2_irqs > 0) in mv88e6xxx_probe()
7325 if (chip->irq > 0) in mv88e6xxx_probe()
7331 dev_put(pdata->netdev); in mv88e6xxx_probe()
7338 struct dsa_switch *ds = dev_get_drvdata(&mdiodev->dev); in mv88e6xxx_remove()
7344 chip = ds->priv; in mv88e6xxx_remove()
7346 if (chip->info->ptp_support) { in mv88e6xxx_remove()
7357 if (chip->info->g2_irqs > 0) in mv88e6xxx_remove()
7360 if (chip->irq > 0) in mv88e6xxx_remove()
7368 struct dsa_switch *ds = dev_get_drvdata(&mdiodev->dev); in mv88e6xxx_shutdown()
7375 dev_set_drvdata(&mdiodev->dev, NULL); in mv88e6xxx_shutdown()