Lines Matching +full:sgmii +full:- +full:enable +full:- +full:pll
1 /* SPDX-License-Identifier: GPL-2.0-only */
15 #define MT7530_MAX_MTU (15 * 1024 - ETH_HLEN - ETH_FCS_LEN - MTK_HDR_LEN)
106 /* Register for 01-80-C2-00-00-[01,02] MAC DA frame control */
118 /* Register for 01-80-C2-00-00-[03,0E] MAC DA frame control */
325 /* Register for port port-and-protocol based vlan 1 control */
430 /* MT7531 SGMII register group */
431 #define MT7531_SGMII_REG_BASE(p) (0x5000 + ((p) - 5) * 0x1000)
565 /* Registers for RGMII and SGMII PLL clock */
627 /* LED enable, 0: Disable, 1: Enable (Default) */
633 /* GPIO output enable, 0: Disable, 1: Enable */
646 /* Registers for core PLL access through mmd indirect */
724 /* struct mt7530_port - This is the main data structure for holding the state
726 * @enable: The status used for show port is enabled or not.
733 bool enable; member
755 /* struct mt753x_info - This is the main data structure for holding the specific
788 /* struct mt7530_priv - This is the main data structure for holding the state
792 * @bus: The bus used for the device and built-in PHY
805 * has got SGMII
808 * @irq_enable: IRQ enable bits, synced to SYS_INT_EN
809 * @create_sgmii: Pointer to function creating SGMII PCS instance(s)
850 e->port = port; in mt7530_hw_vlan_entry_init()
851 e->untagged = untagged; in mt7530_hw_vlan_entry_init()
871 p->priv = priv; in INIT_MT7530_DUMMY_POLL()
872 p->reg = reg; in INIT_MT7530_DUMMY_POLL()