93 core_write(struct mt7530_priv *priv, u32 reg, u32 val)  in core_write()  function
370 	core_write(priv, CORE_GSWPLL_GRP1, 0);  in mt7530_pll_setup()
373 	core_write(priv, CORE_GSWPLL_GRP2,  in mt7530_pll_setup()
378 	core_write(priv, CORE_GSWPLL_GRP1,  in mt7530_pll_setup()
442 	core_write(priv, CORE_PLL_GROUP5, RG_LCDDS_PCW_NCPO1(ncpo1));  in mt7530_setup_port6()
443 	core_write(priv, CORE_PLL_GROUP6, RG_LCDDS_PCW_NCPO0(0));  in mt7530_setup_port6()
444 	core_write(priv, CORE_PLL_GROUP10, RG_LCDDS_SSC_DELTA(ssc_delta));  in mt7530_setup_port6()
445 	core_write(priv, CORE_PLL_GROUP11, RG_LCDDS_SSC_DELTA1(ssc_delta));  in mt7530_setup_port6()
446 	core_write(priv, CORE_PLL_GROUP4, RG_SYSPLL_DDSFBK_EN |  in mt7530_setup_port6()
448 	core_write(priv, CORE_PLL_GROUP2, RG_SYSPLL_EN_NORMAL |  in mt7530_setup_port6()
450 	core_write(priv, CORE_PLL_GROUP7, RG_LCDDS_PCW_NCPO_CHG |  in mt7530_setup_port6()