1 // SPDX-License-Identifier: GPL-2.0-only
3  * Copyright (C) 2008-2010 Pavel Cheblakov <P.B.Cheblakov@inp.nsk.su>
7  *	Copyright (C) 2008 Markus Plessing <plessing@ems-wuensche.com>
8  *	Copyright (C) 2008 Sebastian Haas <haas@ems-wuensche.com>
26 MODULE_DESCRIPTION("Socket-CAN driver for PLX90xx PCI-bridge cards with "
37 	/* Pointer to device-dependent reset function */
44 #define PLX_INTCSR	0x4c		/* Interrupt Control/Status */
45 #define PLX_CNTRL	0x50		/* User I/O, Direct Slave Response,
50 #define PLX_LINT1_EN	0x1		/* Local interrupt 1 enable */
58 #define PLX9056_INTCSR	0x68		/* Interrupt Control/Status */
59 #define PLX9056_CNTRL	0x6c		/* Control / Software Reset */
70  * Setting the OCR register to 0xDA is a good idea.
71  * This means normal output mode, push-pull and the correct polarity.
76 #define ASEM_PCI_OCR	0xfe
87 #define REG_CR				0x00
90 #define REG_CR_BASICCAN_INITIAL		0x21
91 #define REG_CR_BASICCAN_INITIAL_MASK	0xa1
92 #define REG_SR_BASICCAN_INITIAL		0x0c
93 #define REG_IR_BASICCAN_INITIAL		0xe0
96 #define REG_MOD_PELICAN_INITIAL		0x01
97 #define REG_SR_PELICAN_INITIAL		0x3c
98 #define REG_IR_PELICAN_INITIAL		0x00
100 #define ADLINK_PCI_VENDOR_ID		0x144A
101 #define ADLINK_PCI_DEVICE_ID		0x7841
103 #define ESD_PCI_SUB_SYS_ID_PCI200	0x0004
104 #define ESD_PCI_SUB_SYS_ID_PCI266	0x0009
105 #define ESD_PCI_SUB_SYS_ID_PMC266	0x000e
106 #define ESD_PCI_SUB_SYS_ID_CPCI200	0x010b
107 #define ESD_PCI_SUB_SYS_ID_PCIE2000	0x0200
108 #define ESD_PCI_SUB_SYS_ID_PCI104200	0x0501
110 #define CAN200PCI_DEVICE_ID		0x9030
111 #define CAN200PCI_VENDOR_ID		0x10b5
112 #define CAN200PCI_SUB_DEVICE_ID		0x0301
113 #define CAN200PCI_SUB_VENDOR_ID		0xe1c5
115 #define IXXAT_PCI_VENDOR_ID		0x10b5
116 #define IXXAT_PCI_DEVICE_ID		0x9050
117 #define IXXAT_PCI_SUB_SYS_ID		0x2540
119 #define MARATHON_PCI_DEVICE_ID		0x2715
120 #define MARATHON_PCIE_DEVICE_ID		0x3432
122 #define TEWS_PCI_VENDOR_ID		0x1498
123 #define TEWS_PCI_DEVICE_ID_TMPC810	0x032A
125 #define CTI_PCI_DEVICE_ID_CRG001	0x0900
127 #define MOXA_PCI_VENDOR_ID		0x1393
128 #define MOXA_PCI_DEVICE_ID		0x0100
130 #define ASEM_RAW_CAN_VENDOR_ID		0x10b5
131 #define ASEM_RAW_CAN_DEVICE_ID		0x9030
132 #define ASEM_RAW_CAN_SUB_VENDOR_ID	0x3000
133 #define ASEM_RAW_CAN_SUB_DEVICE_ID	0x1001
134 #define ASEM_RAW_CAN_SUB_DEVICE_ID_BIS	0x1002
135 #define ASEM_RAW_CAN_RST_REGISTER	0x54
136 #define ASEM_RAW_CAN_RST_MASK_CAN1	0x20
137 #define ASEM_RAW_CAN_RST_MASK_CAN2	0x04
148 	u32 size;		/* 0x00 - auto, e.g. length of entire bar */
164 	/* Pointer to device-dependent reset function */
169 	"Adlink PCI-7841/cPCI-7841", 2,
171 	{1, 0x00, 0x00}, { {2, 0x00, 0x80}, {2, 0x80, 0x80} },
173 	/* based on PLX9052 */
177 	"Adlink PCI-7841/cPCI-7841 SE", 2,
179 	{0, 0x00, 0x00}, { {2, 0x00, 0x80}, {2, 0x80, 0x80} },
181 	/* based on PLX9052 */
185 	"esd CAN-PCI/CPCI/PCI104/200", 2,
187 	{0, 0x00, 0x00}, { {2, 0x00, 0x80}, {2, 0x100, 0x80} },
189 	/* based on PLX9030/9050 */
193 	"esd CAN-PCI/PMC/266", 2,
195 	{0, 0x00, 0x00}, { {2, 0x00, 0x80}, {2, 0x100, 0x80} },
197 	/* based on PLX9056 */
201 	"esd CAN-PCIe/2000", 2,
203 	{0, 0x00, 0x00}, { {2, 0x00, 0x80}, {2, 0x100, 0x80} },
205 	/* based on PEX8311 */
209 	"IXXAT PC-I 04/PCI", 2,
211 	{0, 0x00, 0x00}, { {2, 0x00, 0x80}, {2, 0x200, 0x80} },
213 	/* based on PLX9050 */
217 	"Marathon CAN-bus-PCI", 2,
219 	{0, 0x00, 0x00}, { {2, 0x00, 0x00}, {4, 0x00, 0x00} },
221 	/* based on PLX9052 */
225 	"Marathon CAN-bus-PCIe", 2,
227 	{0, 0x00, 0x00}, { {2, 0x00, 0x00}, {3, 0x80, 0x00} },
229 	/* based on PEX8311 */
235 	{0, 0x00, 0x00}, { {2, 0x000, 0x80}, {2, 0x100, 0x80} },
237 	/* based on PLX9030 */
241 	"Connect Tech Inc. CANpro/104-Plus Opto (CRG001)", 2,
243 	{0, 0x00, 0x00}, { {2, 0x000, 0x80}, {2, 0x100, 0x80} },
245 	/* based on PLX9030 */
249 	"Eclus CAN-200-PCI", 2,
251 	{1, 0x00, 0x00}, { {2, 0x00, 0x80}, {3, 0x00, 0x80} },
253 	/* based on PLX9030 */
259 	{0, 0x00, 0x00}, { {0, 0x00, 0x80}, {1, 0x00, 0x80} },
261 	 /* based on PLX9052 */
267 	{0, 0x00, 0x00}, { {2, 0x00, 0x00}, {4, 0x00, 0x00} },
269 	/* based on PLX9030 */
274 		/* Adlink PCI-7841/cPCI-7841 */
277 		PCI_CLASS_NETWORK_OTHER << 8, ~0,
281 		/* Adlink PCI-7841/cPCI-7841 SE */
284 		PCI_CLASS_COMMUNICATION_OTHER << 8, ~0,
288 		/* esd CAN-PCI/200 */
291 		0, 0,
295 		/* esd CAN-CPCI/200 */
298 		0, 0,
302 		/* esd CAN-PCI104/200 */
305 		0, 0,
309 		/* esd CAN-PCI/266 */
312 		0, 0,
316 		/* esd CAN-PMC/266 */
319 		0, 0,
323 		/* esd CAN-PCIE/2000 */
326 		0, 0,
330 		/* IXXAT PC-I 04/PCI card */
333 		0, 0,
337 		/* Marathon CAN-bus-PCI card */
340 		0, 0,
344 		/* Marathon CAN-bus-PCIe card */
347 		0, 0,
354 		0, 0,
358 		/* Connect Tech Inc. CANpro/104-Plus Opto (CRG001) card */
361 		0, 0,
365 		/* Elcus CAN-200-PCI */
368 		0, 0,
375 		0, 0,
382 		0, 0,
386 		/* ASEM Dual CAN raw -new model */
389 		0, 0,
392 	{ 0,}
398 	return ioread8(priv->reg_base + port);  in plx_pci_read_reg()
403 	iowrite8(val, priv->reg_base + port);  in plx_pci_write_reg()
413 	int flag = 0;  in plx_pci_check_sja1000()
419 	if ((priv->read_reg(priv, REG_CR) & REG_CR_BASICCAN_INITIAL_MASK) ==  in plx_pci_check_sja1000()
421 	    (priv->read_reg(priv, SJA1000_SR) == REG_SR_BASICCAN_INITIAL) &&  in plx_pci_check_sja1000()
422 	    (priv->read_reg(priv, SJA1000_IR) == REG_IR_BASICCAN_INITIAL))  in plx_pci_check_sja1000()
426 	priv->write_reg(priv, SJA1000_CDR, CDR_PELICAN);  in plx_pci_check_sja1000()
432 	if (priv->read_reg(priv, SJA1000_MOD) == REG_MOD_PELICAN_INITIAL &&  in plx_pci_check_sja1000()
433 	    priv->read_reg(priv, SJA1000_SR) == REG_SR_PELICAN_INITIAL &&  in plx_pci_check_sja1000()
434 	    priv->read_reg(priv, SJA1000_IR) == REG_IR_PELICAN_INITIAL)  in plx_pci_check_sja1000()
437 	return 0;  in plx_pci_check_sja1000()
450 	cntrl = ioread32(card->conf_addr + PLX_CNTRL);  in plx_pci_reset_common()
452 	iowrite32(cntrl, card->conf_addr + PLX_CNTRL);  in plx_pci_reset_common()
455 	iowrite32(cntrl, card->conf_addr + PLX_CNTRL);  in plx_pci_reset_common()
468 	cntrl = ioread32(card->conf_addr + PLX9056_CNTRL);  in plx9056_pci_reset_common()
470 	iowrite32(cntrl, card->conf_addr + PLX9056_CNTRL);  in plx9056_pci_reset_common()
473 	iowrite32(cntrl, card->conf_addr + PLX9056_CNTRL);  in plx9056_pci_reset_common()
477 	iowrite32(cntrl, card->conf_addr + PLX9056_CNTRL);  in plx9056_pci_reset_common()
487 	iowrite32(cntrl, card->conf_addr + PLX9056_CNTRL);  in plx9056_pci_reset_common()
490 /* Special reset function for Marathon CAN-bus-PCI card */
499 	for (i = 0; i < 2; i++) {  in plx_pci_reset_marathon_pci()
500 		reset_addr = pci_iomap(pdev, reset_bar[i], 0);  in plx_pci_reset_marathon_pci()
502 			dev_err(&pdev->dev, "Failed to remap reset "  in plx_pci_reset_marathon_pci()
506 			iowrite8(0x1, reset_addr);  in plx_pci_reset_marathon_pci()
513 /* Special reset function for Marathon CAN-bus-PCIe card */
522 	for (i = 0; i < 2; i++) {  in plx_pci_reset_marathon_pcie()
525 		addr = pci_iomap(pdev, chan_map->bar, chan_map->size);  in plx_pci_reset_marathon_pcie()
527 			dev_err(&pdev->dev, "Failed to remap reset "  in plx_pci_reset_marathon_pcie()
528 				"space %d (BAR%d)\n", i, chan_map->bar);  in plx_pci_reset_marathon_pcie()
532 			reset_addr = addr + chan_map->offset +  in plx_pci_reset_marathon_pcie()
534 			iowrite8(0x1, reset_addr);  in plx_pci_reset_marathon_pcie()
549 	bar0_addr = pci_iomap(pdev, 0, 0);  in plx_pci_reset_asem_dual_can_raw()
551 		dev_err(&pdev->dev, "Failed to remap reset space 0 (BAR0)\n");  in plx_pci_reset_asem_dual_can_raw()
571 	int i = 0;  in plx_pci_del_card()
573 	for (i = 0; i < PLX_PCI_MAX_CHAN; i++) {  in plx_pci_del_card()
574 		dev = card->net_dev[i];  in plx_pci_del_card()
578 		dev_info(&pdev->dev, "Removing %s\n", dev->name);  in plx_pci_del_card()
581 		if (priv->reg_base)  in plx_pci_del_card()
582 			pci_iounmap(pdev, priv->reg_base);  in plx_pci_del_card()
586 	card->reset_func(pdev);  in plx_pci_del_card()
589 	 * Disable interrupts from PCI-card and disable local  in plx_pci_del_card()
592 	if (pdev->device != PCI_DEVICE_ID_PLX_9056 &&  in plx_pci_del_card()
593 	    pdev->device != MARATHON_PCIE_DEVICE_ID)  in plx_pci_del_card()
594 		iowrite32(0x0, card->conf_addr + PLX_INTCSR);  in plx_pci_del_card()
596 		iowrite32(0x0, card->conf_addr + PLX9056_INTCSR);  in plx_pci_del_card()
598 	if (card->conf_addr)  in plx_pci_del_card()
599 		pci_iounmap(pdev, card->conf_addr);  in plx_pci_del_card()
607  * Probe PLX90xx based device for the SJA1000 chips and register each
608  * available CAN channel to SJA1000 Socket-CAN subsystem.
621 	ci = (struct plx_pci_card_info *)ent->driver_data;  in plx_pci_add_card()
623 	if (pci_enable_device(pdev) < 0) {  in plx_pci_add_card()
624 		dev_err(&pdev->dev, "Failed to enable PCI device\n");  in plx_pci_add_card()
625 		return -ENODEV;  in plx_pci_add_card()
628 	dev_info(&pdev->dev, "Detected \"%s\" card at slot #%i\n",  in plx_pci_add_card()
629 		 ci->name, PCI_SLOT(pdev->devfn));  in plx_pci_add_card()
635 		return -ENOMEM;  in plx_pci_add_card()
640 	card->channels = 0;  in plx_pci_add_card()
643 	addr = pci_iomap(pdev, ci->conf_map.bar, ci->conf_map.size);  in plx_pci_add_card()
645 		err = -ENOMEM;  in plx_pci_add_card()
646 		dev_err(&pdev->dev, "Failed to remap configuration space "  in plx_pci_add_card()
647 			"(BAR%d)\n", ci->conf_map.bar);  in plx_pci_add_card()
650 	card->conf_addr = addr + ci->conf_map.offset;  in plx_pci_add_card()
652 	ci->reset_func(pdev);  in plx_pci_add_card()
653 	card->reset_func = ci->reset_func;  in plx_pci_add_card()
656 	for (i = 0; i < ci->channel_count; i++) {  in plx_pci_add_card()
657 		struct plx_pci_channel_map *cm = &ci->chan_map_tbl[i];  in plx_pci_add_card()
659 		dev = alloc_sja1000dev(0);  in plx_pci_add_card()
661 			err = -ENOMEM;  in plx_pci_add_card()
665 		card->net_dev[i] = dev;  in plx_pci_add_card()
667 		priv->priv = card;  in plx_pci_add_card()
668 		priv->irq_flags = IRQF_SHARED;  in plx_pci_add_card()
670 		dev->irq = pdev->irq;  in plx_pci_add_card()
674 		 * This is device-dependent mapping  in plx_pci_add_card()
676 		addr = pci_iomap(pdev, cm->bar, cm->size);  in plx_pci_add_card()
678 			err = -ENOMEM;  in plx_pci_add_card()
679 			dev_err(&pdev->dev, "Failed to remap BAR%d\n", cm->bar);  in plx_pci_add_card()
683 		priv->reg_base = addr + cm->offset;  in plx_pci_add_card()
684 		priv->read_reg = plx_pci_read_reg;  in plx_pci_add_card()
685 		priv->write_reg = plx_pci_write_reg;  in plx_pci_add_card()
689 			priv->can.clock.freq = ci->can_clock;  in plx_pci_add_card()
690 			priv->ocr = ci->ocr;  in plx_pci_add_card()
691 			priv->cdr = ci->cdr;  in plx_pci_add_card()
693 			SET_NETDEV_DEV(dev, &pdev->dev);  in plx_pci_add_card()
694 			dev->dev_id = i;  in plx_pci_add_card()
699 				dev_err(&pdev->dev, "Registering device failed "  in plx_pci_add_card()
704 			card->channels++;  in plx_pci_add_card()
706 			dev_info(&pdev->dev, "Channel #%d at 0x%p, irq %d "  in plx_pci_add_card()
707 				 "registered as %s\n", i + 1, priv->reg_base,  in plx_pci_add_card()
708 				 dev->irq, dev->name);  in plx_pci_add_card()
710 			dev_err(&pdev->dev, "Channel #%d not detected\n",  in plx_pci_add_card()
713 			card->net_dev[i] = NULL;  in plx_pci_add_card()
717 	if (!card->channels) {  in plx_pci_add_card()
718 		err = -ENODEV;  in plx_pci_add_card()
723 	 * Enable interrupts from PCI-card (PLX90xx) and enable Local_1,  in plx_pci_add_card()
726 	if (pdev->device != PCI_DEVICE_ID_PLX_9056 &&  in plx_pci_add_card()
727 	    pdev->device != MARATHON_PCIE_DEVICE_ID) {  in plx_pci_add_card()
728 		val = ioread32(card->conf_addr + PLX_INTCSR);  in plx_pci_add_card()
729 		if (pdev->subsystem_vendor == PCI_VENDOR_ID_ESDGMBH)  in plx_pci_add_card()
733 		iowrite32(val, card->conf_addr + PLX_INTCSR);  in plx_pci_add_card()
736 			  card->conf_addr + PLX9056_INTCSR);  in plx_pci_add_card()
738 	return 0;  in plx_pci_add_card()
741 	dev_err(&pdev->dev, "Error: %d. Cleaning Up.\n", err);  in plx_pci_add_card()