Lines Matching +full:tx +full:- +full:mailbox +full:- +full:count
1 // SPDX-License-Identifier: GPL-2.0+
2 /* Renesas R-Car CAN device driver
32 /* Mailbox configuration:
33 * mailbox 60 - 63 - Rx FIFO mailboxes
34 * mailbox 56 - 59 - Tx FIFO mailboxes
35 * non-FIFO mailboxes are not used
37 #define RCAR_CAN_N_MBX 64 /* Number of mailboxes in non-FIFO mode */
38 #define RCAR_CAN_RX_FIFO_MBX 60 /* Mailbox - window to Rx FIFO */
39 #define RCAR_CAN_TX_FIFO_MBX 56 /* Mailbox - window to Tx FIFO */
42 /* Mailbox registers structure */
46 u8 dlc; /* Data Length Code - bits [0..3] */
53 struct rcar_can_mbox_regs mb[RCAR_CAN_N_MBX]; /* Mailbox registers */
54 u32 mkr_2_9[8]; /* Mask Registers 2-9 */
57 u32 mier1; /* Mailbox Interrupt Enable Register 1 */
58 u32 mkr_0_1[2]; /* Mask Registers 0-1 */
60 u32 mier0; /* Mailbox Interrupt Enable Register 0 */
73 u8 recr; /* Receive Error Count Register */
74 u8 tecr; /* Transmit Error Count Register */
77 u8 mssr; /* Mailbox Search Status Register */
78 u8 msmr; /* Mailbox Search Mode Register */
87 u8 mbsmr; /* Mailbox Search Mask Register */
116 #define RCAR_CAN_CTLR_BOM (3 << 11) /* Bus-Off Recovery Mode Bits */
118 /* at bus-off entry */
127 #define RCAR_CAN_CTLR_MBM (1 << 0) /* Mailbox Mode select */
148 /* for Rx mailboxes 0-31 */
157 /* Mailbox and Mask Registers bits */
162 /* Mailbox Interrupt Enable Register 1 bits */
184 #define RCAR_CAN_EIER_BORIE (1 << 4) /* Bus-Off Recovery Interrupt Enable */
185 #define RCAR_CAN_EIER_BOEIE (1 << 3) /* Bus-Off Entry Interrupt Enable */
195 #define RCAR_CAN_EIFR_BORIF (1 << 4) /* Bus-Off Recovery Detect Flag */
196 #define RCAR_CAN_EIFR_BOEIF (1 << 3) /* Bus-Off Entry Detect Flag */
232 eifr = readb(&priv->regs->eifr); in rcar_can_error()
234 txerr = readb(&priv->regs->tecr); in rcar_can_error()
235 rxerr = readb(&priv->regs->recr); in rcar_can_error()
237 cf->can_id |= CAN_ERR_CRTL; in rcar_can_error()
243 netdev_dbg(priv->ndev, "Bus error interrupt:\n"); in rcar_can_error()
245 cf->can_id |= CAN_ERR_BUSERROR | CAN_ERR_PROT; in rcar_can_error()
247 ecsr = readb(&priv->regs->ecsr); in rcar_can_error()
249 netdev_dbg(priv->ndev, "ACK Delimiter Error\n"); in rcar_can_error()
251 writeb(~RCAR_CAN_ECSR_ADEF, &priv->regs->ecsr); in rcar_can_error()
253 cf->data[3] = CAN_ERR_PROT_LOC_ACK_DEL; in rcar_can_error()
256 netdev_dbg(priv->ndev, "Bit Error (dominant)\n"); in rcar_can_error()
258 writeb(~RCAR_CAN_ECSR_BE0F, &priv->regs->ecsr); in rcar_can_error()
260 cf->data[2] |= CAN_ERR_PROT_BIT0; in rcar_can_error()
263 netdev_dbg(priv->ndev, "Bit Error (recessive)\n"); in rcar_can_error()
265 writeb(~RCAR_CAN_ECSR_BE1F, &priv->regs->ecsr); in rcar_can_error()
267 cf->data[2] |= CAN_ERR_PROT_BIT1; in rcar_can_error()
270 netdev_dbg(priv->ndev, "CRC Error\n"); in rcar_can_error()
272 writeb(~RCAR_CAN_ECSR_CEF, &priv->regs->ecsr); in rcar_can_error()
274 cf->data[3] = CAN_ERR_PROT_LOC_CRC_SEQ; in rcar_can_error()
277 netdev_dbg(priv->ndev, "ACK Error\n"); in rcar_can_error()
279 writeb(~RCAR_CAN_ECSR_AEF, &priv->regs->ecsr); in rcar_can_error()
281 cf->can_id |= CAN_ERR_ACK; in rcar_can_error()
282 cf->data[3] = CAN_ERR_PROT_LOC_ACK; in rcar_can_error()
286 netdev_dbg(priv->ndev, "Form Error\n"); in rcar_can_error()
288 writeb(~RCAR_CAN_ECSR_FEF, &priv->regs->ecsr); in rcar_can_error()
290 cf->data[2] |= CAN_ERR_PROT_FORM; in rcar_can_error()
293 netdev_dbg(priv->ndev, "Stuff Error\n"); in rcar_can_error()
295 writeb(~RCAR_CAN_ECSR_SEF, &priv->regs->ecsr); in rcar_can_error()
297 cf->data[2] |= CAN_ERR_PROT_STUFF; in rcar_can_error()
300 priv->can.can_stats.bus_error++; in rcar_can_error()
301 ndev->stats.rx_errors += rx_errors; in rcar_can_error()
302 ndev->stats.tx_errors += tx_errors; in rcar_can_error()
303 writeb(~RCAR_CAN_EIFR_BEIF, &priv->regs->eifr); in rcar_can_error()
306 netdev_dbg(priv->ndev, "Error warning interrupt\n"); in rcar_can_error()
307 priv->can.state = CAN_STATE_ERROR_WARNING; in rcar_can_error()
308 priv->can.can_stats.error_warning++; in rcar_can_error()
310 writeb(~RCAR_CAN_EIFR_EWIF, &priv->regs->eifr); in rcar_can_error()
312 cf->data[1] = txerr > rxerr ? CAN_ERR_CRTL_TX_WARNING : in rcar_can_error()
316 netdev_dbg(priv->ndev, "Error passive interrupt\n"); in rcar_can_error()
317 priv->can.state = CAN_STATE_ERROR_PASSIVE; in rcar_can_error()
318 priv->can.can_stats.error_passive++; in rcar_can_error()
320 writeb(~RCAR_CAN_EIFR_EPIF, &priv->regs->eifr); in rcar_can_error()
322 cf->data[1] = txerr > rxerr ? CAN_ERR_CRTL_TX_PASSIVE : in rcar_can_error()
326 netdev_dbg(priv->ndev, "Bus-off entry interrupt\n"); in rcar_can_error()
328 priv->ier = RCAR_CAN_IER_ERSIE; in rcar_can_error()
329 writeb(priv->ier, &priv->regs->ier); in rcar_can_error()
330 priv->can.state = CAN_STATE_BUS_OFF; in rcar_can_error()
332 writeb(~RCAR_CAN_EIFR_BOEIF, &priv->regs->eifr); in rcar_can_error()
333 priv->can.can_stats.bus_off++; in rcar_can_error()
336 cf->can_id |= CAN_ERR_BUSOFF; in rcar_can_error()
338 cf->can_id |= CAN_ERR_CNT; in rcar_can_error()
339 cf->data[6] = txerr; in rcar_can_error()
340 cf->data[7] = rxerr; in rcar_can_error()
343 netdev_dbg(priv->ndev, "Receive overrun error interrupt\n"); in rcar_can_error()
344 ndev->stats.rx_over_errors++; in rcar_can_error()
345 ndev->stats.rx_errors++; in rcar_can_error()
346 writeb(~RCAR_CAN_EIFR_ORIF, &priv->regs->eifr); in rcar_can_error()
348 cf->can_id |= CAN_ERR_CRTL; in rcar_can_error()
349 cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW; in rcar_can_error()
353 netdev_dbg(priv->ndev, in rcar_can_error()
355 ndev->stats.rx_over_errors++; in rcar_can_error()
356 ndev->stats.rx_errors++; in rcar_can_error()
357 writeb(~RCAR_CAN_EIFR_OLIF, &priv->regs->eifr); in rcar_can_error()
359 cf->can_id |= CAN_ERR_PROT; in rcar_can_error()
360 cf->data[2] |= CAN_ERR_PROT_OVERLOAD; in rcar_can_error()
371 struct net_device_stats *stats = &ndev->stats; in rcar_can_tx_done()
375 u8 unsent = readb(&priv->regs->tfcr); in rcar_can_tx_done()
379 if (priv->tx_head - priv->tx_tail <= unsent) in rcar_can_tx_done()
381 stats->tx_packets++; in rcar_can_tx_done()
382 stats->tx_bytes += in rcar_can_tx_done()
384 priv->tx_tail % RCAR_CAN_FIFO_DEPTH, in rcar_can_tx_done()
387 priv->tx_tail++; in rcar_can_tx_done()
391 isr = readb(&priv->regs->isr); in rcar_can_tx_done()
392 writeb(isr & ~RCAR_CAN_ISR_TXFF, &priv->regs->isr); in rcar_can_tx_done()
401 isr = readb(&priv->regs->isr); in rcar_can_interrupt()
402 if (!(isr & priv->ier)) in rcar_can_interrupt()
412 if (napi_schedule_prep(&priv->napi)) { in rcar_can_interrupt()
414 priv->ier &= ~RCAR_CAN_IER_RXFIE; in rcar_can_interrupt()
415 writeb(priv->ier, &priv->regs->ier); in rcar_can_interrupt()
416 __napi_schedule(&priv->napi); in rcar_can_interrupt()
426 struct can_bittiming *bt = &priv->can.bittiming; in rcar_can_set_bittiming()
429 bcr = RCAR_CAN_BCR_TSEG1(bt->phase_seg1 + bt->prop_seg - 1) | in rcar_can_set_bittiming()
430 RCAR_CAN_BCR_BPR(bt->brp - 1) | RCAR_CAN_BCR_SJW(bt->sjw - 1) | in rcar_can_set_bittiming()
431 RCAR_CAN_BCR_TSEG2(bt->phase_seg2 - 1); in rcar_can_set_bittiming()
432 /* Don't overwrite CLKR with 32-bit BCR access; CLKR has 8-bit access. in rcar_can_set_bittiming()
433 * All the registers are big-endian but they get byte-swapped on 32-bit in rcar_can_set_bittiming()
434 * read/write (but not on 8-bit, contrary to the manuals)... in rcar_can_set_bittiming()
436 writel((bcr << 8) | priv->clock_select, &priv->regs->bcr); in rcar_can_set_bittiming()
446 * - FIFO mailbox mode in rcar_can_start()
447 * - accept all messages in rcar_can_start()
448 * - overrun mode in rcar_can_start()
451 ctlr = readw(&priv->regs->ctlr); in rcar_can_start()
453 writew(ctlr, &priv->regs->ctlr); in rcar_can_start()
456 writew(ctlr, &priv->regs->ctlr); in rcar_can_start()
458 if (readw(&priv->regs->str) & RCAR_CAN_STR_RSTST) in rcar_can_start()
464 /* at bus-off */ in rcar_can_start()
465 ctlr |= RCAR_CAN_CTLR_MBM; /* Select FIFO mailbox mode */ in rcar_can_start()
467 writew(ctlr, &priv->regs->ctlr); in rcar_can_start()
470 writel(0, &priv->regs->mkr_2_9[6]); in rcar_can_start()
471 writel(0, &priv->regs->mkr_2_9[7]); in rcar_can_start()
472 /* In FIFO mailbox mode, write "0" to bits 24 to 31 */ in rcar_can_start()
473 writel(0, &priv->regs->mkivlr1); in rcar_can_start()
475 writel(0, &priv->regs->fidcr[0]); in rcar_can_start()
476 writel(RCAR_CAN_FIDCR_IDE | RCAR_CAN_FIDCR_RTR, &priv->regs->fidcr[1]); in rcar_can_start()
477 /* Enable and configure FIFO mailbox interrupts */ in rcar_can_start()
478 writel(RCAR_CAN_MIER1_RXFIE | RCAR_CAN_MIER1_TXFIE, &priv->regs->mier1); in rcar_can_start()
480 priv->ier = RCAR_CAN_IER_ERSIE | RCAR_CAN_IER_RXFIE | in rcar_can_start()
482 writeb(priv->ier, &priv->regs->ier); in rcar_can_start()
485 writeb(RCAR_CAN_ECSR_EDPM, &priv->regs->ecsr); in rcar_can_start()
488 (priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING ? in rcar_can_start()
490 RCAR_CAN_EIER_OLIE, &priv->regs->eier); in rcar_can_start()
491 priv->can.state = CAN_STATE_ERROR_ACTIVE; in rcar_can_start()
494 writew(ctlr & ~RCAR_CAN_CTLR_CANM, &priv->regs->ctlr); in rcar_can_start()
496 if (!(readw(&priv->regs->str) & RCAR_CAN_STR_RSTST)) in rcar_can_start()
499 /* Enable Rx and Tx FIFO */ in rcar_can_start()
500 writeb(RCAR_CAN_RFCR_RFE, &priv->regs->rfcr); in rcar_can_start()
501 writeb(RCAR_CAN_TFCR_TFE, &priv->regs->tfcr); in rcar_can_start()
509 err = clk_prepare_enable(priv->clk); in rcar_can_open()
516 err = clk_prepare_enable(priv->can_clk); in rcar_can_open()
527 napi_enable(&priv->napi); in rcar_can_open()
528 err = request_irq(ndev->irq, rcar_can_interrupt, 0, ndev->name, ndev); in rcar_can_open()
531 ndev->irq, err); in rcar_can_open()
538 napi_disable(&priv->napi); in rcar_can_open()
541 clk_disable_unprepare(priv->can_clk); in rcar_can_open()
543 clk_disable_unprepare(priv->clk); in rcar_can_open()
555 ctlr = readw(&priv->regs->ctlr); in rcar_can_stop()
557 writew(ctlr, &priv->regs->ctlr); in rcar_can_stop()
559 if (readw(&priv->regs->str) & RCAR_CAN_STR_RSTST) in rcar_can_stop()
562 writel(0, &priv->regs->mier0); in rcar_can_stop()
563 writel(0, &priv->regs->mier1); in rcar_can_stop()
564 writeb(0, &priv->regs->ier); in rcar_can_stop()
565 writeb(0, &priv->regs->eier); in rcar_can_stop()
568 writew(ctlr, &priv->regs->ctlr); in rcar_can_stop()
569 priv->can.state = CAN_STATE_STOPPED; in rcar_can_stop()
578 free_irq(ndev->irq, ndev); in rcar_can_close()
579 napi_disable(&priv->napi); in rcar_can_close()
580 clk_disable_unprepare(priv->can_clk); in rcar_can_close()
581 clk_disable_unprepare(priv->clk); in rcar_can_close()
590 struct can_frame *cf = (struct can_frame *)skb->data; in rcar_can_start_xmit()
596 if (cf->can_id & CAN_EFF_FLAG) /* Extended frame format */ in rcar_can_start_xmit()
597 data = (cf->can_id & CAN_EFF_MASK) | RCAR_CAN_IDE; in rcar_can_start_xmit()
599 data = (cf->can_id & CAN_SFF_MASK) << RCAR_CAN_SID_SHIFT; in rcar_can_start_xmit()
601 if (cf->can_id & CAN_RTR_FLAG) { /* Remote transmission request */ in rcar_can_start_xmit()
604 for (i = 0; i < cf->len; i++) in rcar_can_start_xmit()
605 writeb(cf->data[i], in rcar_can_start_xmit()
606 &priv->regs->mb[RCAR_CAN_TX_FIFO_MBX].data[i]); in rcar_can_start_xmit()
609 writel(data, &priv->regs->mb[RCAR_CAN_TX_FIFO_MBX].id); in rcar_can_start_xmit()
611 writeb(cf->len, &priv->regs->mb[RCAR_CAN_TX_FIFO_MBX].dlc); in rcar_can_start_xmit()
613 can_put_echo_skb(skb, ndev, priv->tx_head % RCAR_CAN_FIFO_DEPTH, 0); in rcar_can_start_xmit()
614 priv->tx_head++; in rcar_can_start_xmit()
615 /* Start Tx: write 0xff to the TFPCR register to increment in rcar_can_start_xmit()
616 * the CPU-side pointer for the transmit FIFO to the next in rcar_can_start_xmit()
617 * mailbox location in rcar_can_start_xmit()
619 writeb(0xff, &priv->regs->tfpcr); in rcar_can_start_xmit()
621 if (priv->tx_head - priv->tx_tail >= RCAR_CAN_FIFO_DEPTH) in rcar_can_start_xmit()
640 struct net_device_stats *stats = &priv->ndev->stats; in rcar_can_rx_pkt()
646 skb = alloc_can_skb(priv->ndev, &cf); in rcar_can_rx_pkt()
648 stats->rx_dropped++; in rcar_can_rx_pkt()
652 data = readl(&priv->regs->mb[RCAR_CAN_RX_FIFO_MBX].id); in rcar_can_rx_pkt()
654 cf->can_id = (data & CAN_EFF_MASK) | CAN_EFF_FLAG; in rcar_can_rx_pkt()
656 cf->can_id = (data >> RCAR_CAN_SID_SHIFT) & CAN_SFF_MASK; in rcar_can_rx_pkt()
658 dlc = readb(&priv->regs->mb[RCAR_CAN_RX_FIFO_MBX].dlc); in rcar_can_rx_pkt()
659 cf->len = can_cc_dlc2len(dlc); in rcar_can_rx_pkt()
661 cf->can_id |= CAN_RTR_FLAG; in rcar_can_rx_pkt()
663 for (dlc = 0; dlc < cf->len; dlc++) in rcar_can_rx_pkt()
664 cf->data[dlc] = in rcar_can_rx_pkt()
665 readb(&priv->regs->mb[RCAR_CAN_RX_FIFO_MBX].data[dlc]); in rcar_can_rx_pkt()
667 stats->rx_bytes += cf->len; in rcar_can_rx_pkt()
669 stats->rx_packets++; in rcar_can_rx_pkt()
683 isr = readb(&priv->regs->isr); in rcar_can_rx_poll()
686 writeb(isr & ~RCAR_CAN_ISR_RXFF, &priv->regs->isr); in rcar_can_rx_poll()
687 rfcr = readb(&priv->regs->rfcr); in rcar_can_rx_poll()
692 * the CPU-side pointer for the receive FIFO in rcar_can_rx_poll()
693 * to the next mailbox location in rcar_can_rx_poll()
695 writeb(0xff, &priv->regs->rfpcr); in rcar_can_rx_poll()
700 priv->ier |= RCAR_CAN_IER_RXFIE; in rcar_can_rx_poll()
701 writeb(priv->ier, &priv->regs->ier); in rcar_can_rx_poll()
714 return -EOPNOTSUPP; in rcar_can_do_set_mode()
724 err = clk_prepare_enable(priv->clk); in rcar_can_get_berr_counter()
727 bec->txerr = readb(&priv->regs->tecr); in rcar_can_get_berr_counter()
728 bec->rxerr = readb(&priv->regs->recr); in rcar_can_get_berr_counter()
729 clk_disable_unprepare(priv->clk); in rcar_can_get_berr_counter()
745 int err = -ENODEV; in rcar_can_probe()
748 of_property_read_u32(pdev->dev.of_node, "renesas,can-clock-select", in rcar_can_probe()
765 dev_err(&pdev->dev, "alloc_candev() failed\n"); in rcar_can_probe()
766 err = -ENOMEM; in rcar_can_probe()
772 priv->clk = devm_clk_get(&pdev->dev, "clkp1"); in rcar_can_probe()
773 if (IS_ERR(priv->clk)) { in rcar_can_probe()
774 err = PTR_ERR(priv->clk); in rcar_can_probe()
775 dev_err(&pdev->dev, "cannot get peripheral clock, error %d\n", in rcar_can_probe()
781 err = -EINVAL; in rcar_can_probe()
782 dev_err(&pdev->dev, "invalid CAN clock selected\n"); in rcar_can_probe()
785 priv->can_clk = devm_clk_get(&pdev->dev, clock_names[clock_select]); in rcar_can_probe()
786 if (IS_ERR(priv->can_clk)) { in rcar_can_probe()
787 err = PTR_ERR(priv->can_clk); in rcar_can_probe()
788 dev_err(&pdev->dev, "cannot get CAN clock, error %d\n", err); in rcar_can_probe()
792 ndev->netdev_ops = &rcar_can_netdev_ops; in rcar_can_probe()
793 ndev->ethtool_ops = &rcar_can_ethtool_ops; in rcar_can_probe()
794 ndev->irq = irq; in rcar_can_probe()
795 ndev->flags |= IFF_ECHO; in rcar_can_probe()
796 priv->ndev = ndev; in rcar_can_probe()
797 priv->regs = addr; in rcar_can_probe()
798 priv->clock_select = clock_select; in rcar_can_probe()
799 priv->can.clock.freq = clk_get_rate(priv->can_clk); in rcar_can_probe()
800 priv->can.bittiming_const = &rcar_can_bittiming_const; in rcar_can_probe()
801 priv->can.do_set_mode = rcar_can_do_set_mode; in rcar_can_probe()
802 priv->can.do_get_berr_counter = rcar_can_get_berr_counter; in rcar_can_probe()
803 priv->can.ctrlmode_supported = CAN_CTRLMODE_BERR_REPORTING; in rcar_can_probe()
805 SET_NETDEV_DEV(ndev, &pdev->dev); in rcar_can_probe()
807 netif_napi_add_weight(ndev, &priv->napi, rcar_can_rx_poll, in rcar_can_probe()
811 dev_err(&pdev->dev, "register_candev() failed, error %d\n", in rcar_can_probe()
816 dev_info(&pdev->dev, "device registered (IRQ%d)\n", ndev->irq); in rcar_can_probe()
820 netif_napi_del(&priv->napi); in rcar_can_probe()
833 netif_napi_del(&priv->napi); in rcar_can_remove()
849 ctlr = readw(&priv->regs->ctlr); in rcar_can_suspend()
851 writew(ctlr, &priv->regs->ctlr); in rcar_can_suspend()
853 writew(ctlr, &priv->regs->ctlr); in rcar_can_suspend()
854 priv->can.state = CAN_STATE_SLEEPING; in rcar_can_suspend()
856 clk_disable(priv->clk); in rcar_can_suspend()
870 err = clk_enable(priv->clk); in rcar_can_resume()
876 ctlr = readw(&priv->regs->ctlr); in rcar_can_resume()
878 writew(ctlr, &priv->regs->ctlr); in rcar_can_resume()
880 writew(ctlr, &priv->regs->ctlr); in rcar_can_resume()
881 priv->can.state = CAN_STATE_ERROR_ACTIVE; in rcar_can_resume()
892 { .compatible = "renesas,can-r8a7778" },
893 { .compatible = "renesas,can-r8a7779" },
894 { .compatible = "renesas,can-r8a7790" },
895 { .compatible = "renesas,can-r8a7791" },
896 { .compatible = "renesas,rcar-gen1-can" },
897 { .compatible = "renesas,rcar-gen2-can" },
898 { .compatible = "renesas,rcar-gen3-can" },
917 MODULE_DESCRIPTION("CAN driver for Renesas R-Car SoC");