Lines Matching +full:tcs +full:- +full:wait
1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/dma-mapping.h>
295 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_timings_init()
297 struct stm32_fmc2_timings *timings = &nand->timings; in stm32_fmc2_nfc_timings_init()
301 regmap_update_bits(nfc->regmap, FMC2_PCR, in stm32_fmc2_nfc_timings_init()
303 FIELD_PREP(FMC2_PCR_TCLR, timings->tclr) | in stm32_fmc2_nfc_timings_init()
304 FIELD_PREP(FMC2_PCR_TAR, timings->tar)); in stm32_fmc2_nfc_timings_init()
307 pmem = FIELD_PREP(FMC2_PMEM_MEMSET, timings->tset_mem); in stm32_fmc2_nfc_timings_init()
308 pmem |= FIELD_PREP(FMC2_PMEM_MEMWAIT, timings->twait); in stm32_fmc2_nfc_timings_init()
309 pmem |= FIELD_PREP(FMC2_PMEM_MEMHOLD, timings->thold_mem); in stm32_fmc2_nfc_timings_init()
310 pmem |= FIELD_PREP(FMC2_PMEM_MEMHIZ, timings->thiz); in stm32_fmc2_nfc_timings_init()
311 regmap_write(nfc->regmap, FMC2_PMEM, pmem); in stm32_fmc2_nfc_timings_init()
314 patt = FIELD_PREP(FMC2_PATT_ATTSET, timings->tset_att); in stm32_fmc2_nfc_timings_init()
315 patt |= FIELD_PREP(FMC2_PATT_ATTWAIT, timings->twait); in stm32_fmc2_nfc_timings_init()
316 patt |= FIELD_PREP(FMC2_PATT_ATTHOLD, timings->thold_att); in stm32_fmc2_nfc_timings_init()
317 patt |= FIELD_PREP(FMC2_PATT_ATTHIZ, timings->thiz); in stm32_fmc2_nfc_timings_init()
318 regmap_write(nfc->regmap, FMC2_PATT, patt); in stm32_fmc2_nfc_timings_init()
323 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_setup()
329 if (chip->ecc.strength == FMC2_ECC_BCH8) { in stm32_fmc2_nfc_setup()
332 } else if (chip->ecc.strength == FMC2_ECC_BCH4) { in stm32_fmc2_nfc_setup()
338 if (chip->options & NAND_BUSWIDTH_16) in stm32_fmc2_nfc_setup()
345 regmap_update_bits(nfc->regmap, FMC2_PCR, pcr_mask, pcr); in stm32_fmc2_nfc_setup()
350 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_select_chip()
355 if (nand->cs_used[chipnr] == nfc->cs_sel) in stm32_fmc2_nfc_select_chip()
358 nfc->cs_sel = nand->cs_used[chipnr]; in stm32_fmc2_nfc_select_chip()
362 if (nfc->dma_tx_ch) { in stm32_fmc2_nfc_select_chip()
364 dma_cfg.dst_addr = nfc->data_phys_addr[nfc->cs_sel]; in stm32_fmc2_nfc_select_chip()
366 dma_cfg.dst_maxburst = nfc->tx_dma_max_burst / in stm32_fmc2_nfc_select_chip()
369 ret = dmaengine_slave_config(nfc->dma_tx_ch, &dma_cfg); in stm32_fmc2_nfc_select_chip()
371 dev_err(nfc->dev, "tx DMA engine slave config failed\n"); in stm32_fmc2_nfc_select_chip()
376 if (nfc->dma_rx_ch) { in stm32_fmc2_nfc_select_chip()
378 dma_cfg.src_addr = nfc->data_phys_addr[nfc->cs_sel]; in stm32_fmc2_nfc_select_chip()
380 dma_cfg.src_maxburst = nfc->rx_dma_max_burst / in stm32_fmc2_nfc_select_chip()
383 ret = dmaengine_slave_config(nfc->dma_rx_ch, &dma_cfg); in stm32_fmc2_nfc_select_chip()
385 dev_err(nfc->dev, "rx DMA engine slave config failed\n"); in stm32_fmc2_nfc_select_chip()
390 if (nfc->dma_ecc_ch) { in stm32_fmc2_nfc_select_chip()
396 dma_cfg.src_addr = nfc->io_phys_addr; in stm32_fmc2_nfc_select_chip()
397 dma_cfg.src_addr += chip->ecc.strength == FMC2_ECC_HAM ? in stm32_fmc2_nfc_select_chip()
401 ret = dmaengine_slave_config(nfc->dma_ecc_ch, &dma_cfg); in stm32_fmc2_nfc_select_chip()
403 dev_err(nfc->dev, "ECC DMA engine slave config failed\n"); in stm32_fmc2_nfc_select_chip()
408 nfc->dma_ecc_len = chip->ecc.strength == FMC2_ECC_HAM ? in stm32_fmc2_nfc_select_chip()
422 regmap_update_bits(nfc->regmap, FMC2_PCR, FMC2_PCR_PWID, pcr); in stm32_fmc2_nfc_set_buswidth_16()
427 regmap_update_bits(nfc->regmap, FMC2_PCR, FMC2_PCR_ECCEN, in stm32_fmc2_nfc_set_ecc()
433 nfc->irq_state = FMC2_IRQ_SEQ; in stm32_fmc2_nfc_enable_seq_irq()
435 regmap_update_bits(nfc->regmap, FMC2_CSQIER, in stm32_fmc2_nfc_enable_seq_irq()
441 regmap_update_bits(nfc->regmap, FMC2_CSQIER, FMC2_CSQIER_TCIE, 0); in stm32_fmc2_nfc_disable_seq_irq()
443 nfc->irq_state = FMC2_IRQ_UNKNOWN; in stm32_fmc2_nfc_disable_seq_irq()
448 regmap_write(nfc->regmap, FMC2_CSQICR, FMC2_CSQICR_CLEAR_IRQ); in stm32_fmc2_nfc_clear_seq_irq()
453 nfc->irq_state = FMC2_IRQ_BCH; in stm32_fmc2_nfc_enable_bch_irq()
456 regmap_update_bits(nfc->regmap, FMC2_BCHIER, in stm32_fmc2_nfc_enable_bch_irq()
459 regmap_update_bits(nfc->regmap, FMC2_BCHIER, in stm32_fmc2_nfc_enable_bch_irq()
465 regmap_update_bits(nfc->regmap, FMC2_BCHIER, in stm32_fmc2_nfc_disable_bch_irq()
468 nfc->irq_state = FMC2_IRQ_UNKNOWN; in stm32_fmc2_nfc_disable_bch_irq()
473 regmap_write(nfc->regmap, FMC2_BCHICR, FMC2_BCHICR_CLEAR_IRQ); in stm32_fmc2_nfc_clear_bch_irq()
482 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_hwctl()
486 if (chip->ecc.strength != FMC2_ECC_HAM) { in stm32_fmc2_nfc_hwctl()
487 regmap_update_bits(nfc->regmap, FMC2_PCR, FMC2_PCR_WEN, in stm32_fmc2_nfc_hwctl()
490 reinit_completion(&nfc->complete); in stm32_fmc2_nfc_hwctl()
501 * max of 1-bit)
513 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_ham_calculate()
517 ret = regmap_read_poll_timeout(nfc->regmap, FMC2_SR, sr, in stm32_fmc2_nfc_ham_calculate()
521 dev_err(nfc->dev, "ham timeout\n"); in stm32_fmc2_nfc_ham_calculate()
525 regmap_read(nfc->regmap, FMC2_HECCR, &heccr); in stm32_fmc2_nfc_ham_calculate()
558 return -EBADMSG; in stm32_fmc2_nfc_ham_correct()
574 return -EBADMSG; in stm32_fmc2_nfc_ham_correct()
589 * max of 4-bit/8-bit)
594 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_bch_calculate()
597 /* Wait until the BCH code is ready */ in stm32_fmc2_nfc_bch_calculate()
598 if (!wait_for_completion_timeout(&nfc->complete, in stm32_fmc2_nfc_bch_calculate()
600 dev_err(nfc->dev, "bch timeout\n"); in stm32_fmc2_nfc_bch_calculate()
602 return -ETIMEDOUT; in stm32_fmc2_nfc_bch_calculate()
606 regmap_read(nfc->regmap, FMC2_BCHPBR1, &bchpbr); in stm32_fmc2_nfc_bch_calculate()
612 regmap_read(nfc->regmap, FMC2_BCHPBR2, &bchpbr); in stm32_fmc2_nfc_bch_calculate()
617 if (chip->ecc.strength == FMC2_ECC_BCH8) { in stm32_fmc2_nfc_bch_calculate()
620 regmap_read(nfc->regmap, FMC2_BCHPBR3, &bchpbr); in stm32_fmc2_nfc_bch_calculate()
626 regmap_read(nfc->regmap, FMC2_BCHPBR4, &bchpbr); in stm32_fmc2_nfc_bch_calculate()
652 return -EBADMSG; in stm32_fmc2_nfc_bch_decode()
677 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_bch_correct()
680 /* Wait until the decoding error is ready */ in stm32_fmc2_nfc_bch_correct()
681 if (!wait_for_completion_timeout(&nfc->complete, in stm32_fmc2_nfc_bch_correct()
683 dev_err(nfc->dev, "bch timeout\n"); in stm32_fmc2_nfc_bch_correct()
685 return -ETIMEDOUT; in stm32_fmc2_nfc_bch_correct()
688 regmap_bulk_read(nfc->regmap, FMC2_BCHDSR0, ecc_sta, 5); in stm32_fmc2_nfc_bch_correct()
692 return stm32_fmc2_nfc_bch_decode(chip->ecc.size, dat, ecc_sta); in stm32_fmc2_nfc_bch_correct()
699 int ret, i, s, stat, eccsize = chip->ecc.size; in stm32_fmc2_nfc_read_page()
700 int eccbytes = chip->ecc.bytes; in stm32_fmc2_nfc_read_page()
701 int eccsteps = chip->ecc.steps; in stm32_fmc2_nfc_read_page()
702 int eccstrength = chip->ecc.strength; in stm32_fmc2_nfc_read_page()
704 u8 *ecc_calc = chip->ecc.calc_buf; in stm32_fmc2_nfc_read_page()
705 u8 *ecc_code = chip->ecc.code_buf; in stm32_fmc2_nfc_read_page()
712 for (i = mtd->writesize + FMC2_BBM_LEN, s = 0; s < eccsteps; in stm32_fmc2_nfc_read_page()
714 chip->ecc.hwctl(chip, NAND_ECC_READ); in stm32_fmc2_nfc_read_page()
729 stat = chip->ecc.correct(chip, p, ecc_code, ecc_calc); in stm32_fmc2_nfc_read_page()
730 if (stat == -EBADMSG) in stm32_fmc2_nfc_read_page()
738 mtd->ecc_stats.failed++; in stm32_fmc2_nfc_read_page()
740 mtd->ecc_stats.corrected += stat; in stm32_fmc2_nfc_read_page()
747 ret = nand_change_read_column_op(chip, mtd->writesize, in stm32_fmc2_nfc_read_page()
748 chip->oob_poi, mtd->oobsize, in stm32_fmc2_nfc_read_page()
761 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_rw_page_init()
763 u32 ecc_offset = mtd->writesize + FMC2_BBM_LEN; in stm32_fmc2_nfc_rw_page_init()
770 regmap_update_bits(nfc->regmap, FMC2_PCR, FMC2_PCR_WEN, in stm32_fmc2_nfc_rw_page_init()
774 * - Set Program Page/Page Read command in stm32_fmc2_nfc_rw_page_init()
775 * - Enable DMA request data in stm32_fmc2_nfc_rw_page_init()
776 * - Set timings in stm32_fmc2_nfc_rw_page_init()
788 * - Set Random Data Input/Random Data Read command in stm32_fmc2_nfc_rw_page_init()
789 * - Enable the sequencer to access the Spare data area in stm32_fmc2_nfc_rw_page_init()
790 * - Enable DMA request status decoding for read in stm32_fmc2_nfc_rw_page_init()
791 * - Set timings in stm32_fmc2_nfc_rw_page_init()
807 * - Set the number of sectors to be written in stm32_fmc2_nfc_rw_page_init()
808 * - Set timings in stm32_fmc2_nfc_rw_page_init()
810 cfg[2] = FIELD_PREP(FMC2_CSQCFGR3_SNBR, chip->ecc.steps - 1); in stm32_fmc2_nfc_rw_page_init()
813 if (chip->options & NAND_ROW_ADDR_3) in stm32_fmc2_nfc_rw_page_init()
828 * - Set chip enable number in stm32_fmc2_nfc_rw_page_init()
829 * - Set ECC byte offset in the spare area in stm32_fmc2_nfc_rw_page_init()
830 * - Calculate the number of address cycles to be issued in stm32_fmc2_nfc_rw_page_init()
831 * - Set byte 5 of address cycle if needed in stm32_fmc2_nfc_rw_page_init()
833 cfg[4] = FIELD_PREP(FMC2_CSQCAR2_NANDCEN, nfc->cs_sel); in stm32_fmc2_nfc_rw_page_init()
834 if (chip->options & NAND_BUSWIDTH_16) in stm32_fmc2_nfc_rw_page_init()
838 if (chip->options & NAND_ROW_ADDR_3) { in stm32_fmc2_nfc_rw_page_init()
845 regmap_bulk_write(nfc->regmap, FMC2_CSQCFGR1, cfg, 5); in stm32_fmc2_nfc_rw_page_init()
857 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_xfer()
860 struct dma_chan *dma_ch = nfc->dma_rx_ch; in stm32_fmc2_nfc_xfer()
863 int eccsteps = chip->ecc.steps; in stm32_fmc2_nfc_xfer()
864 int eccsize = chip->ecc.size; in stm32_fmc2_nfc_xfer()
873 dma_ch = nfc->dma_tx_ch; in stm32_fmc2_nfc_xfer()
876 for_each_sg(nfc->dma_data_sg.sgl, sg, eccsteps, s) { in stm32_fmc2_nfc_xfer()
881 ret = dma_map_sg(nfc->dev, nfc->dma_data_sg.sgl, in stm32_fmc2_nfc_xfer()
884 return -EIO; in stm32_fmc2_nfc_xfer()
886 desc_data = dmaengine_prep_slave_sg(dma_ch, nfc->dma_data_sg.sgl, in stm32_fmc2_nfc_xfer()
890 ret = -ENOMEM; in stm32_fmc2_nfc_xfer()
894 reinit_completion(&nfc->dma_data_complete); in stm32_fmc2_nfc_xfer()
895 reinit_completion(&nfc->complete); in stm32_fmc2_nfc_xfer()
896 desc_data->callback = stm32_fmc2_nfc_dma_callback; in stm32_fmc2_nfc_xfer()
897 desc_data->callback_param = &nfc->dma_data_complete; in stm32_fmc2_nfc_xfer()
906 for_each_sg(nfc->dma_ecc_sg.sgl, sg, eccsteps, s) { in stm32_fmc2_nfc_xfer()
907 sg_dma_address(sg) = nfc->dma_ecc_addr + in stm32_fmc2_nfc_xfer()
908 s * nfc->dma_ecc_len; in stm32_fmc2_nfc_xfer()
909 sg_dma_len(sg) = nfc->dma_ecc_len; in stm32_fmc2_nfc_xfer()
912 desc_ecc = dmaengine_prep_slave_sg(nfc->dma_ecc_ch, in stm32_fmc2_nfc_xfer()
913 nfc->dma_ecc_sg.sgl, in stm32_fmc2_nfc_xfer()
917 ret = -ENOMEM; in stm32_fmc2_nfc_xfer()
921 reinit_completion(&nfc->dma_ecc_complete); in stm32_fmc2_nfc_xfer()
922 desc_ecc->callback = stm32_fmc2_nfc_dma_callback; in stm32_fmc2_nfc_xfer()
923 desc_ecc->callback_param = &nfc->dma_ecc_complete; in stm32_fmc2_nfc_xfer()
928 dma_async_issue_pending(nfc->dma_ecc_ch); in stm32_fmc2_nfc_xfer()
935 regmap_update_bits(nfc->regmap, FMC2_CSQCR, in stm32_fmc2_nfc_xfer()
938 /* Wait end of sequencer transfer */ in stm32_fmc2_nfc_xfer()
939 if (!wait_for_completion_timeout(&nfc->complete, timeout)) { in stm32_fmc2_nfc_xfer()
940 dev_err(nfc->dev, "seq timeout\n"); in stm32_fmc2_nfc_xfer()
944 dmaengine_terminate_all(nfc->dma_ecc_ch); in stm32_fmc2_nfc_xfer()
945 ret = -ETIMEDOUT; in stm32_fmc2_nfc_xfer()
949 /* Wait DMA data transfer completion */ in stm32_fmc2_nfc_xfer()
950 if (!wait_for_completion_timeout(&nfc->dma_data_complete, timeout)) { in stm32_fmc2_nfc_xfer()
951 dev_err(nfc->dev, "data DMA timeout\n"); in stm32_fmc2_nfc_xfer()
953 ret = -ETIMEDOUT; in stm32_fmc2_nfc_xfer()
956 /* Wait DMA ECC transfer completion */ in stm32_fmc2_nfc_xfer()
958 if (!wait_for_completion_timeout(&nfc->dma_ecc_complete, in stm32_fmc2_nfc_xfer()
960 dev_err(nfc->dev, "ECC DMA timeout\n"); in stm32_fmc2_nfc_xfer()
961 dmaengine_terminate_all(nfc->dma_ecc_ch); in stm32_fmc2_nfc_xfer()
962 ret = -ETIMEDOUT; in stm32_fmc2_nfc_xfer()
967 dma_unmap_sg(nfc->dev, nfc->dma_data_sg.sgl, eccsteps, dma_data_dir); in stm32_fmc2_nfc_xfer()
988 unsigned int offset_in_page = mtd->writesize; in stm32_fmc2_nfc_seq_write()
989 const void *buf = chip->oob_poi; in stm32_fmc2_nfc_seq_write()
990 unsigned int len = mtd->oobsize; in stm32_fmc2_nfc_seq_write()
1015 ret = stm32_fmc2_nfc_select_chip(chip, chip->cur_cs); in stm32_fmc2_nfc_seq_write_page()
1028 ret = stm32_fmc2_nfc_select_chip(chip, chip->cur_cs); in stm32_fmc2_nfc_seq_write_page_raw()
1040 regmap_read(nfc->regmap, FMC2_CSQEMSR, &csqemsr); in stm32_fmc2_nfc_get_mapping_status()
1049 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_seq_correct()
1050 int eccbytes = chip->ecc.bytes; in stm32_fmc2_nfc_seq_correct()
1051 int eccsteps = chip->ecc.steps; in stm32_fmc2_nfc_seq_correct()
1052 int eccstrength = chip->ecc.strength; in stm32_fmc2_nfc_seq_correct()
1053 int i, s, eccsize = chip->ecc.size; in stm32_fmc2_nfc_seq_correct()
1054 u32 *ecc_sta = (u32 *)nfc->ecc_buf; in stm32_fmc2_nfc_seq_correct()
1085 if (stat == -EBADMSG) in stm32_fmc2_nfc_seq_correct()
1094 mtd->ecc_stats.failed++; in stm32_fmc2_nfc_seq_correct()
1096 mtd->ecc_stats.corrected += stat; in stm32_fmc2_nfc_seq_correct()
1108 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_seq_read_page()
1109 u8 *ecc_calc = chip->ecc.calc_buf; in stm32_fmc2_nfc_seq_read_page()
1110 u8 *ecc_code = chip->ecc.code_buf; in stm32_fmc2_nfc_seq_read_page()
1114 ret = stm32_fmc2_nfc_select_chip(chip, chip->cur_cs); in stm32_fmc2_nfc_seq_read_page()
1131 return nand_change_read_column_op(chip, mtd->writesize, in stm32_fmc2_nfc_seq_read_page()
1132 chip->oob_poi, in stm32_fmc2_nfc_seq_read_page()
1133 mtd->oobsize, false); in stm32_fmc2_nfc_seq_read_page()
1139 ret = nand_change_read_column_op(chip, mtd->writesize, in stm32_fmc2_nfc_seq_read_page()
1140 chip->oob_poi, mtd->oobsize, false); in stm32_fmc2_nfc_seq_read_page()
1144 ret = mtd_ooblayout_get_eccbytes(mtd, ecc_code, chip->oob_poi, 0, in stm32_fmc2_nfc_seq_read_page()
1145 chip->ecc.total); in stm32_fmc2_nfc_seq_read_page()
1150 return chip->ecc.correct(chip, buf, ecc_code, ecc_calc); in stm32_fmc2_nfc_seq_read_page()
1159 ret = stm32_fmc2_nfc_select_chip(chip, chip->cur_cs); in stm32_fmc2_nfc_seq_read_page_raw()
1173 return nand_change_read_column_op(chip, mtd->writesize, in stm32_fmc2_nfc_seq_read_page_raw()
1174 chip->oob_poi, mtd->oobsize, in stm32_fmc2_nfc_seq_read_page_raw()
1184 if (nfc->irq_state == FMC2_IRQ_SEQ) in stm32_fmc2_nfc_irq()
1187 else if (nfc->irq_state == FMC2_IRQ_BCH) in stm32_fmc2_nfc_irq()
1191 complete(&nfc->complete); in stm32_fmc2_nfc_irq()
1199 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_read_data()
1200 void __iomem *io_addr_r = nfc->data_base[nfc->cs_sel]; in stm32_fmc2_nfc_read_data()
1202 if (force_8bit && chip->options & NAND_BUSWIDTH_16) in stm32_fmc2_nfc_read_data()
1203 /* Reconfigure bus width to 8-bit */ in stm32_fmc2_nfc_read_data()
1210 len -= sizeof(u8); in stm32_fmc2_nfc_read_data()
1217 len -= sizeof(u16); in stm32_fmc2_nfc_read_data()
1225 len -= sizeof(u32); in stm32_fmc2_nfc_read_data()
1232 len -= sizeof(u16); in stm32_fmc2_nfc_read_data()
1238 if (force_8bit && chip->options & NAND_BUSWIDTH_16) in stm32_fmc2_nfc_read_data()
1239 /* Reconfigure bus width to 16-bit */ in stm32_fmc2_nfc_read_data()
1246 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_write_data()
1247 void __iomem *io_addr_w = nfc->data_base[nfc->cs_sel]; in stm32_fmc2_nfc_write_data()
1249 if (force_8bit && chip->options & NAND_BUSWIDTH_16) in stm32_fmc2_nfc_write_data()
1250 /* Reconfigure bus width to 8-bit */ in stm32_fmc2_nfc_write_data()
1257 len -= sizeof(u8); in stm32_fmc2_nfc_write_data()
1264 len -= sizeof(u16); in stm32_fmc2_nfc_write_data()
1272 len -= sizeof(u32); in stm32_fmc2_nfc_write_data()
1279 len -= sizeof(u16); in stm32_fmc2_nfc_write_data()
1285 if (force_8bit && chip->options & NAND_BUSWIDTH_16) in stm32_fmc2_nfc_write_data()
1286 /* Reconfigure bus width to 16-bit */ in stm32_fmc2_nfc_write_data()
1293 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_waitrdy()
1298 if (regmap_read_poll_timeout(nfc->regmap, FMC2_SR, sr, in stm32_fmc2_nfc_waitrdy()
1301 dev_warn(nfc->dev, "Waitrdy timeout\n"); in stm32_fmc2_nfc_waitrdy()
1303 /* Wait tWB before R/B# signal is low */ in stm32_fmc2_nfc_waitrdy()
1305 ndelay(PSEC_TO_NSEC(timings->tWB_max)); in stm32_fmc2_nfc_waitrdy()
1308 regmap_write(nfc->regmap, FMC2_ICR, FMC2_ICR_CIHLF); in stm32_fmc2_nfc_waitrdy()
1310 /* Wait R/B# signal is high */ in stm32_fmc2_nfc_waitrdy()
1311 return regmap_read_poll_timeout(nfc->regmap, FMC2_ISR, isr, in stm32_fmc2_nfc_waitrdy()
1320 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_exec_op()
1328 ret = stm32_fmc2_nfc_select_chip(chip, op->cs); in stm32_fmc2_nfc_exec_op()
1332 for (op_id = 0; op_id < op->ninstrs; op_id++) { in stm32_fmc2_nfc_exec_op()
1333 instr = &op->instrs[op_id]; in stm32_fmc2_nfc_exec_op()
1335 switch (instr->type) { in stm32_fmc2_nfc_exec_op()
1337 writeb_relaxed(instr->ctx.cmd.opcode, in stm32_fmc2_nfc_exec_op()
1338 nfc->cmd_base[nfc->cs_sel]); in stm32_fmc2_nfc_exec_op()
1342 for (i = 0; i < instr->ctx.addr.naddrs; i++) in stm32_fmc2_nfc_exec_op()
1343 writeb_relaxed(instr->ctx.addr.addrs[i], in stm32_fmc2_nfc_exec_op()
1344 nfc->addr_base[nfc->cs_sel]); in stm32_fmc2_nfc_exec_op()
1348 stm32_fmc2_nfc_read_data(chip, instr->ctx.data.buf.in, in stm32_fmc2_nfc_exec_op()
1349 instr->ctx.data.len, in stm32_fmc2_nfc_exec_op()
1350 instr->ctx.data.force_8bit); in stm32_fmc2_nfc_exec_op()
1354 stm32_fmc2_nfc_write_data(chip, instr->ctx.data.buf.out, in stm32_fmc2_nfc_exec_op()
1355 instr->ctx.data.len, in stm32_fmc2_nfc_exec_op()
1356 instr->ctx.data.force_8bit); in stm32_fmc2_nfc_exec_op()
1360 timeout = instr->ctx.waitrdy.timeout_ms; in stm32_fmc2_nfc_exec_op()
1373 regmap_read(nfc->regmap, FMC2_PCR, &pcr); in stm32_fmc2_nfc_init()
1376 nfc->cs_sel = -1; in stm32_fmc2_nfc_init()
1378 /* Enable wait feature and nand flash memory bank */ in stm32_fmc2_nfc_init()
1404 if (nfc->dev == nfc->cdev) in stm32_fmc2_nfc_init()
1405 regmap_update_bits(nfc->regmap, FMC2_BCR1, in stm32_fmc2_nfc_init()
1408 regmap_write(nfc->regmap, FMC2_PCR, pcr); in stm32_fmc2_nfc_init()
1409 regmap_write(nfc->regmap, FMC2_PMEM, FMC2_PMEM_DEFAULT); in stm32_fmc2_nfc_init()
1410 regmap_write(nfc->regmap, FMC2_PATT, FMC2_PATT_DEFAULT); in stm32_fmc2_nfc_init()
1416 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_calc_timings()
1418 struct stm32_fmc2_timings *tims = &nand->timings; in stm32_fmc2_nfc_calc_timings()
1419 unsigned long hclk = clk_get_rate(nfc->clk); in stm32_fmc2_nfc_calc_timings()
1424 tar = max_t(unsigned long, hclkp, sdrt->tAR_min); in stm32_fmc2_nfc_calc_timings()
1425 timing = DIV_ROUND_UP(tar, hclkp) - 1; in stm32_fmc2_nfc_calc_timings()
1426 tims->tar = min_t(unsigned long, timing, FMC2_PCR_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1428 tclr = max_t(unsigned long, hclkp, sdrt->tCLR_min); in stm32_fmc2_nfc_calc_timings()
1429 timing = DIV_ROUND_UP(tclr, hclkp) - 1; in stm32_fmc2_nfc_calc_timings()
1430 tims->tclr = min_t(unsigned long, timing, FMC2_PCR_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1432 tims->thiz = FMC2_THIZ; in stm32_fmc2_nfc_calc_timings()
1433 thiz = (tims->thiz + 1) * hclkp; in stm32_fmc2_nfc_calc_timings()
1440 twait = max_t(unsigned long, hclkp, sdrt->tRP_min); in stm32_fmc2_nfc_calc_timings()
1441 twait = max_t(unsigned long, twait, sdrt->tWP_min); in stm32_fmc2_nfc_calc_timings()
1442 twait = max_t(unsigned long, twait, sdrt->tREA_max + FMC2_TIO); in stm32_fmc2_nfc_calc_timings()
1444 tims->twait = clamp_val(timing, 1, FMC2_PMEM_PATT_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1447 * tSETUP_MEM > tCS - tWAIT in stm32_fmc2_nfc_calc_timings()
1448 * tSETUP_MEM > tALS - tWAIT in stm32_fmc2_nfc_calc_timings()
1449 * tSETUP_MEM > tDS - (tWAIT - tHIZ) in stm32_fmc2_nfc_calc_timings()
1452 if (sdrt->tCS_min > twait && (tset_mem < sdrt->tCS_min - twait)) in stm32_fmc2_nfc_calc_timings()
1453 tset_mem = sdrt->tCS_min - twait; in stm32_fmc2_nfc_calc_timings()
1454 if (sdrt->tALS_min > twait && (tset_mem < sdrt->tALS_min - twait)) in stm32_fmc2_nfc_calc_timings()
1455 tset_mem = sdrt->tALS_min - twait; in stm32_fmc2_nfc_calc_timings()
1456 if (twait > thiz && (sdrt->tDS_min > twait - thiz) && in stm32_fmc2_nfc_calc_timings()
1457 (tset_mem < sdrt->tDS_min - (twait - thiz))) in stm32_fmc2_nfc_calc_timings()
1458 tset_mem = sdrt->tDS_min - (twait - thiz); in stm32_fmc2_nfc_calc_timings()
1460 tims->tset_mem = clamp_val(timing, 1, FMC2_PMEM_PATT_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1464 * tHOLD_MEM > tREH - tSETUP_MEM in stm32_fmc2_nfc_calc_timings()
1465 * tHOLD_MEM > max(tRC, tWC) - (tSETUP_MEM + tWAIT) in stm32_fmc2_nfc_calc_timings()
1467 thold_mem = max_t(unsigned long, hclkp, sdrt->tCH_min); in stm32_fmc2_nfc_calc_timings()
1468 if (sdrt->tREH_min > tset_mem && in stm32_fmc2_nfc_calc_timings()
1469 (thold_mem < sdrt->tREH_min - tset_mem)) in stm32_fmc2_nfc_calc_timings()
1470 thold_mem = sdrt->tREH_min - tset_mem; in stm32_fmc2_nfc_calc_timings()
1471 if ((sdrt->tRC_min > tset_mem + twait) && in stm32_fmc2_nfc_calc_timings()
1472 (thold_mem < sdrt->tRC_min - (tset_mem + twait))) in stm32_fmc2_nfc_calc_timings()
1473 thold_mem = sdrt->tRC_min - (tset_mem + twait); in stm32_fmc2_nfc_calc_timings()
1474 if ((sdrt->tWC_min > tset_mem + twait) && in stm32_fmc2_nfc_calc_timings()
1475 (thold_mem < sdrt->tWC_min - (tset_mem + twait))) in stm32_fmc2_nfc_calc_timings()
1476 thold_mem = sdrt->tWC_min - (tset_mem + twait); in stm32_fmc2_nfc_calc_timings()
1478 tims->thold_mem = clamp_val(timing, 1, FMC2_PMEM_PATT_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1481 * tSETUP_ATT > tCS - tWAIT in stm32_fmc2_nfc_calc_timings()
1482 * tSETUP_ATT > tCLS - tWAIT in stm32_fmc2_nfc_calc_timings()
1483 * tSETUP_ATT > tALS - tWAIT in stm32_fmc2_nfc_calc_timings()
1484 * tSETUP_ATT > tRHW - tHOLD_MEM in stm32_fmc2_nfc_calc_timings()
1485 * tSETUP_ATT > tDS - (tWAIT - tHIZ) in stm32_fmc2_nfc_calc_timings()
1488 if (sdrt->tCS_min > twait && (tset_att < sdrt->tCS_min - twait)) in stm32_fmc2_nfc_calc_timings()
1489 tset_att = sdrt->tCS_min - twait; in stm32_fmc2_nfc_calc_timings()
1490 if (sdrt->tCLS_min > twait && (tset_att < sdrt->tCLS_min - twait)) in stm32_fmc2_nfc_calc_timings()
1491 tset_att = sdrt->tCLS_min - twait; in stm32_fmc2_nfc_calc_timings()
1492 if (sdrt->tALS_min > twait && (tset_att < sdrt->tALS_min - twait)) in stm32_fmc2_nfc_calc_timings()
1493 tset_att = sdrt->tALS_min - twait; in stm32_fmc2_nfc_calc_timings()
1494 if (sdrt->tRHW_min > thold_mem && in stm32_fmc2_nfc_calc_timings()
1495 (tset_att < sdrt->tRHW_min - thold_mem)) in stm32_fmc2_nfc_calc_timings()
1496 tset_att = sdrt->tRHW_min - thold_mem; in stm32_fmc2_nfc_calc_timings()
1497 if (twait > thiz && (sdrt->tDS_min > twait - thiz) && in stm32_fmc2_nfc_calc_timings()
1498 (tset_att < sdrt->tDS_min - (twait - thiz))) in stm32_fmc2_nfc_calc_timings()
1499 tset_att = sdrt->tDS_min - (twait - thiz); in stm32_fmc2_nfc_calc_timings()
1501 tims->tset_att = clamp_val(timing, 1, FMC2_PMEM_PATT_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1509 * tHOLD_ATT > tWB + tIO + tSYNC - tSETUP_MEM in stm32_fmc2_nfc_calc_timings()
1510 * tHOLD_ATT > tADL - tSETUP_MEM in stm32_fmc2_nfc_calc_timings()
1511 * tHOLD_ATT > tWH - tSETUP_MEM in stm32_fmc2_nfc_calc_timings()
1512 * tHOLD_ATT > tWHR - tSETUP_MEM in stm32_fmc2_nfc_calc_timings()
1513 * tHOLD_ATT > tRC - (tSETUP_ATT + tWAIT) in stm32_fmc2_nfc_calc_timings()
1514 * tHOLD_ATT > tWC - (tSETUP_ATT + tWAIT) in stm32_fmc2_nfc_calc_timings()
1516 thold_att = max_t(unsigned long, hclkp, sdrt->tALH_min); in stm32_fmc2_nfc_calc_timings()
1517 thold_att = max_t(unsigned long, thold_att, sdrt->tCH_min); in stm32_fmc2_nfc_calc_timings()
1518 thold_att = max_t(unsigned long, thold_att, sdrt->tCLH_min); in stm32_fmc2_nfc_calc_timings()
1519 thold_att = max_t(unsigned long, thold_att, sdrt->tCOH_min); in stm32_fmc2_nfc_calc_timings()
1520 thold_att = max_t(unsigned long, thold_att, sdrt->tDH_min); in stm32_fmc2_nfc_calc_timings()
1521 if ((sdrt->tWB_max + FMC2_TIO + FMC2_TSYNC > tset_mem) && in stm32_fmc2_nfc_calc_timings()
1522 (thold_att < sdrt->tWB_max + FMC2_TIO + FMC2_TSYNC - tset_mem)) in stm32_fmc2_nfc_calc_timings()
1523 thold_att = sdrt->tWB_max + FMC2_TIO + FMC2_TSYNC - tset_mem; in stm32_fmc2_nfc_calc_timings()
1524 if (sdrt->tADL_min > tset_mem && in stm32_fmc2_nfc_calc_timings()
1525 (thold_att < sdrt->tADL_min - tset_mem)) in stm32_fmc2_nfc_calc_timings()
1526 thold_att = sdrt->tADL_min - tset_mem; in stm32_fmc2_nfc_calc_timings()
1527 if (sdrt->tWH_min > tset_mem && in stm32_fmc2_nfc_calc_timings()
1528 (thold_att < sdrt->tWH_min - tset_mem)) in stm32_fmc2_nfc_calc_timings()
1529 thold_att = sdrt->tWH_min - tset_mem; in stm32_fmc2_nfc_calc_timings()
1530 if (sdrt->tWHR_min > tset_mem && in stm32_fmc2_nfc_calc_timings()
1531 (thold_att < sdrt->tWHR_min - tset_mem)) in stm32_fmc2_nfc_calc_timings()
1532 thold_att = sdrt->tWHR_min - tset_mem; in stm32_fmc2_nfc_calc_timings()
1533 if ((sdrt->tRC_min > tset_att + twait) && in stm32_fmc2_nfc_calc_timings()
1534 (thold_att < sdrt->tRC_min - (tset_att + twait))) in stm32_fmc2_nfc_calc_timings()
1535 thold_att = sdrt->tRC_min - (tset_att + twait); in stm32_fmc2_nfc_calc_timings()
1536 if ((sdrt->tWC_min > tset_att + twait) && in stm32_fmc2_nfc_calc_timings()
1537 (thold_att < sdrt->tWC_min - (tset_att + twait))) in stm32_fmc2_nfc_calc_timings()
1538 thold_att = sdrt->tWC_min - (tset_att + twait); in stm32_fmc2_nfc_calc_timings()
1540 tims->thold_att = clamp_val(timing, 1, FMC2_PMEM_PATT_TIMING_MASK); in stm32_fmc2_nfc_calc_timings()
1552 if (conf->timings.mode > 3) in stm32_fmc2_nfc_setup_interface()
1553 return -EOPNOTSUPP; in stm32_fmc2_nfc_setup_interface()
1569 nfc->dma_tx_ch = dma_request_chan(nfc->dev, "tx"); in stm32_fmc2_nfc_dma_setup()
1570 if (IS_ERR(nfc->dma_tx_ch)) { in stm32_fmc2_nfc_dma_setup()
1571 ret = PTR_ERR(nfc->dma_tx_ch); in stm32_fmc2_nfc_dma_setup()
1572 if (ret != -ENODEV && ret != -EPROBE_DEFER) in stm32_fmc2_nfc_dma_setup()
1573 dev_err(nfc->dev, in stm32_fmc2_nfc_dma_setup()
1575 nfc->dma_tx_ch = NULL; in stm32_fmc2_nfc_dma_setup()
1579 ret = dma_get_slave_caps(nfc->dma_tx_ch, &caps); in stm32_fmc2_nfc_dma_setup()
1582 nfc->tx_dma_max_burst = caps.max_burst; in stm32_fmc2_nfc_dma_setup()
1584 nfc->dma_rx_ch = dma_request_chan(nfc->dev, "rx"); in stm32_fmc2_nfc_dma_setup()
1585 if (IS_ERR(nfc->dma_rx_ch)) { in stm32_fmc2_nfc_dma_setup()
1586 ret = PTR_ERR(nfc->dma_rx_ch); in stm32_fmc2_nfc_dma_setup()
1587 if (ret != -ENODEV && ret != -EPROBE_DEFER) in stm32_fmc2_nfc_dma_setup()
1588 dev_err(nfc->dev, in stm32_fmc2_nfc_dma_setup()
1590 nfc->dma_rx_ch = NULL; in stm32_fmc2_nfc_dma_setup()
1594 ret = dma_get_slave_caps(nfc->dma_rx_ch, &caps); in stm32_fmc2_nfc_dma_setup()
1597 nfc->rx_dma_max_burst = caps.max_burst; in stm32_fmc2_nfc_dma_setup()
1599 nfc->dma_ecc_ch = dma_request_chan(nfc->dev, "ecc"); in stm32_fmc2_nfc_dma_setup()
1600 if (IS_ERR(nfc->dma_ecc_ch)) { in stm32_fmc2_nfc_dma_setup()
1601 ret = PTR_ERR(nfc->dma_ecc_ch); in stm32_fmc2_nfc_dma_setup()
1602 if (ret != -ENODEV && ret != -EPROBE_DEFER) in stm32_fmc2_nfc_dma_setup()
1603 dev_err(nfc->dev, in stm32_fmc2_nfc_dma_setup()
1605 nfc->dma_ecc_ch = NULL; in stm32_fmc2_nfc_dma_setup()
1609 ret = sg_alloc_table(&nfc->dma_ecc_sg, FMC2_MAX_SG, GFP_KERNEL); in stm32_fmc2_nfc_dma_setup()
1614 nfc->ecc_buf = dmam_alloc_coherent(nfc->dev, FMC2_MAX_ECC_BUF_LEN, in stm32_fmc2_nfc_dma_setup()
1615 &nfc->dma_ecc_addr, GFP_KERNEL); in stm32_fmc2_nfc_dma_setup()
1616 if (!nfc->ecc_buf) in stm32_fmc2_nfc_dma_setup()
1617 return -ENOMEM; in stm32_fmc2_nfc_dma_setup()
1619 ret = sg_alloc_table(&nfc->dma_data_sg, FMC2_MAX_SG, GFP_KERNEL); in stm32_fmc2_nfc_dma_setup()
1623 init_completion(&nfc->dma_data_complete); in stm32_fmc2_nfc_dma_setup()
1624 init_completion(&nfc->dma_ecc_complete); in stm32_fmc2_nfc_dma_setup()
1629 if (ret == -ENODEV) { in stm32_fmc2_nfc_dma_setup()
1630 dev_warn(nfc->dev, in stm32_fmc2_nfc_dma_setup()
1640 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_nand_callbacks_setup()
1646 if (nfc->dma_tx_ch && nfc->dma_rx_ch && nfc->dma_ecc_ch) { in stm32_fmc2_nfc_nand_callbacks_setup()
1648 chip->ecc.correct = stm32_fmc2_nfc_seq_correct; in stm32_fmc2_nfc_nand_callbacks_setup()
1649 chip->ecc.write_page = stm32_fmc2_nfc_seq_write_page; in stm32_fmc2_nfc_nand_callbacks_setup()
1650 chip->ecc.read_page = stm32_fmc2_nfc_seq_read_page; in stm32_fmc2_nfc_nand_callbacks_setup()
1651 chip->ecc.write_page_raw = stm32_fmc2_nfc_seq_write_page_raw; in stm32_fmc2_nfc_nand_callbacks_setup()
1652 chip->ecc.read_page_raw = stm32_fmc2_nfc_seq_read_page_raw; in stm32_fmc2_nfc_nand_callbacks_setup()
1655 chip->ecc.hwctl = stm32_fmc2_nfc_hwctl; in stm32_fmc2_nfc_nand_callbacks_setup()
1656 if (chip->ecc.strength == FMC2_ECC_HAM) { in stm32_fmc2_nfc_nand_callbacks_setup()
1658 chip->ecc.calculate = stm32_fmc2_nfc_ham_calculate; in stm32_fmc2_nfc_nand_callbacks_setup()
1659 chip->ecc.correct = stm32_fmc2_nfc_ham_correct; in stm32_fmc2_nfc_nand_callbacks_setup()
1660 chip->ecc.options |= NAND_ECC_GENERIC_ERASED_CHECK; in stm32_fmc2_nfc_nand_callbacks_setup()
1663 chip->ecc.calculate = stm32_fmc2_nfc_bch_calculate; in stm32_fmc2_nfc_nand_callbacks_setup()
1664 chip->ecc.correct = stm32_fmc2_nfc_bch_correct; in stm32_fmc2_nfc_nand_callbacks_setup()
1665 chip->ecc.read_page = stm32_fmc2_nfc_read_page; in stm32_fmc2_nfc_nand_callbacks_setup()
1670 if (chip->ecc.strength == FMC2_ECC_HAM) in stm32_fmc2_nfc_nand_callbacks_setup()
1671 chip->ecc.bytes = chip->options & NAND_BUSWIDTH_16 ? 4 : 3; in stm32_fmc2_nfc_nand_callbacks_setup()
1672 else if (chip->ecc.strength == FMC2_ECC_BCH8) in stm32_fmc2_nfc_nand_callbacks_setup()
1673 chip->ecc.bytes = chip->options & NAND_BUSWIDTH_16 ? 14 : 13; in stm32_fmc2_nfc_nand_callbacks_setup()
1675 chip->ecc.bytes = chip->options & NAND_BUSWIDTH_16 ? 8 : 7; in stm32_fmc2_nfc_nand_callbacks_setup()
1682 struct nand_ecc_ctrl *ecc = &chip->ecc; in stm32_fmc2_nfc_ooblayout_ecc()
1685 return -ERANGE; in stm32_fmc2_nfc_ooblayout_ecc()
1687 oobregion->length = ecc->total; in stm32_fmc2_nfc_ooblayout_ecc()
1688 oobregion->offset = FMC2_BBM_LEN; in stm32_fmc2_nfc_ooblayout_ecc()
1697 struct nand_ecc_ctrl *ecc = &chip->ecc; in stm32_fmc2_nfc_ooblayout_free()
1700 return -ERANGE; in stm32_fmc2_nfc_ooblayout_free()
1702 oobregion->length = mtd->oobsize - ecc->total - FMC2_BBM_LEN; in stm32_fmc2_nfc_ooblayout_free()
1703 oobregion->offset = ecc->total + FMC2_BBM_LEN; in stm32_fmc2_nfc_ooblayout_free()
1733 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_attach_chip()
1744 if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST) { in stm32_fmc2_nfc_attach_chip()
1745 dev_err(nfc->dev, in stm32_fmc2_nfc_attach_chip()
1747 return -EINVAL; in stm32_fmc2_nfc_attach_chip()
1751 if (!chip->ecc.size) in stm32_fmc2_nfc_attach_chip()
1752 chip->ecc.size = FMC2_ECC_STEP_SIZE; in stm32_fmc2_nfc_attach_chip()
1754 if (!chip->ecc.strength) in stm32_fmc2_nfc_attach_chip()
1755 chip->ecc.strength = FMC2_ECC_BCH8; in stm32_fmc2_nfc_attach_chip()
1758 mtd->oobsize - FMC2_BBM_LEN); in stm32_fmc2_nfc_attach_chip()
1760 dev_err(nfc->dev, "no valid ECC settings set\n"); in stm32_fmc2_nfc_attach_chip()
1764 if (mtd->writesize / chip->ecc.size > FMC2_MAX_SG) { in stm32_fmc2_nfc_attach_chip()
1765 dev_err(nfc->dev, "nand page size is not supported\n"); in stm32_fmc2_nfc_attach_chip()
1766 return -EINVAL; in stm32_fmc2_nfc_attach_chip()
1769 if (chip->bbt_options & NAND_BBT_USE_FLASH) in stm32_fmc2_nfc_attach_chip()
1770 chip->bbt_options |= NAND_BBT_NO_OOB; in stm32_fmc2_nfc_attach_chip()
1789 if (nand->wp_gpio) in stm32_fmc2_nfc_wp_enable()
1790 gpiod_set_value(nand->wp_gpio, 1); in stm32_fmc2_nfc_wp_enable()
1795 if (nand->wp_gpio) in stm32_fmc2_nfc_wp_disable()
1796 gpiod_set_value(nand->wp_gpio, 0); in stm32_fmc2_nfc_wp_disable()
1802 struct stm32_fmc2_nand *nand = &nfc->nand; in stm32_fmc2_nfc_parse_child()
1806 if (!of_get_property(dn, "reg", &nand->ncs)) in stm32_fmc2_nfc_parse_child()
1807 return -EINVAL; in stm32_fmc2_nfc_parse_child()
1809 nand->ncs /= sizeof(u32); in stm32_fmc2_nfc_parse_child()
1810 if (!nand->ncs) { in stm32_fmc2_nfc_parse_child()
1811 dev_err(nfc->dev, "invalid reg property size\n"); in stm32_fmc2_nfc_parse_child()
1812 return -EINVAL; in stm32_fmc2_nfc_parse_child()
1815 for (i = 0; i < nand->ncs; i++) { in stm32_fmc2_nfc_parse_child()
1818 dev_err(nfc->dev, "could not retrieve reg property: %d\n", in stm32_fmc2_nfc_parse_child()
1823 if (cs >= nfc->data->max_ncs) { in stm32_fmc2_nfc_parse_child()
1824 dev_err(nfc->dev, "invalid reg value: %d\n", cs); in stm32_fmc2_nfc_parse_child()
1825 return -EINVAL; in stm32_fmc2_nfc_parse_child()
1828 if (nfc->cs_assigned & BIT(cs)) { in stm32_fmc2_nfc_parse_child()
1829 dev_err(nfc->dev, "cs already assigned: %d\n", cs); in stm32_fmc2_nfc_parse_child()
1830 return -EINVAL; in stm32_fmc2_nfc_parse_child()
1833 nfc->cs_assigned |= BIT(cs); in stm32_fmc2_nfc_parse_child()
1834 nand->cs_used[i] = cs; in stm32_fmc2_nfc_parse_child()
1837 nand->wp_gpio = devm_fwnode_gpiod_get(nfc->dev, of_fwnode_handle(dn), in stm32_fmc2_nfc_parse_child()
1839 if (IS_ERR(nand->wp_gpio)) { in stm32_fmc2_nfc_parse_child()
1840 ret = PTR_ERR(nand->wp_gpio); in stm32_fmc2_nfc_parse_child()
1841 if (ret != -ENOENT) in stm32_fmc2_nfc_parse_child()
1842 return dev_err_probe(nfc->dev, ret, in stm32_fmc2_nfc_parse_child()
1845 nand->wp_gpio = NULL; in stm32_fmc2_nfc_parse_child()
1848 nand_set_flash_node(&nand->chip, dn); in stm32_fmc2_nfc_parse_child()
1855 struct device_node *dn = nfc->dev->of_node; in stm32_fmc2_nfc_parse_dt()
1860 dev_err(nfc->dev, "NAND chip not defined\n"); in stm32_fmc2_nfc_parse_dt()
1861 return -EINVAL; in stm32_fmc2_nfc_parse_dt()
1865 dev_err(nfc->dev, "too many NAND chips defined\n"); in stm32_fmc2_nfc_parse_dt()
1866 return -EINVAL; in stm32_fmc2_nfc_parse_dt()
1880 struct device *dev = nfc->dev; in stm32_fmc2_nfc_set_cdev()
1883 if (dev->parent && of_device_is_compatible(dev->parent->of_node, in stm32_fmc2_nfc_set_cdev()
1884 "st,stm32mp1-fmc2-ebi")) in stm32_fmc2_nfc_set_cdev()
1887 if (of_device_is_compatible(dev->of_node, "st,stm32mp1-fmc2-nfc")) { in stm32_fmc2_nfc_set_cdev()
1889 nfc->cdev = dev->parent; in stm32_fmc2_nfc_set_cdev()
1894 return -EINVAL; in stm32_fmc2_nfc_set_cdev()
1898 return -EINVAL; in stm32_fmc2_nfc_set_cdev()
1900 nfc->cdev = dev; in stm32_fmc2_nfc_set_cdev()
1907 struct device *dev = &pdev->dev; in stm32_fmc2_nfc_probe()
1920 return -ENOMEM; in stm32_fmc2_nfc_probe()
1922 nfc->dev = dev; in stm32_fmc2_nfc_probe()
1923 nand_controller_init(&nfc->base); in stm32_fmc2_nfc_probe()
1924 nfc->base.ops = &stm32_fmc2_nfc_controller_ops; in stm32_fmc2_nfc_probe()
1926 nfc->data = of_device_get_match_data(dev); in stm32_fmc2_nfc_probe()
1927 if (!nfc->data) in stm32_fmc2_nfc_probe()
1928 return -EINVAL; in stm32_fmc2_nfc_probe()
1930 if (nfc->data->set_cdev) { in stm32_fmc2_nfc_probe()
1931 ret = nfc->data->set_cdev(nfc); in stm32_fmc2_nfc_probe()
1935 nfc->cdev = dev->parent; in stm32_fmc2_nfc_probe()
1942 ret = of_address_to_resource(nfc->cdev->of_node, 0, &cres); in stm32_fmc2_nfc_probe()
1946 nfc->io_phys_addr = cres.start; in stm32_fmc2_nfc_probe()
1948 nfc->regmap = device_node_to_regmap(nfc->cdev->of_node); in stm32_fmc2_nfc_probe()
1949 if (IS_ERR(nfc->regmap)) in stm32_fmc2_nfc_probe()
1950 return PTR_ERR(nfc->regmap); in stm32_fmc2_nfc_probe()
1952 if (nfc->dev == nfc->cdev) in stm32_fmc2_nfc_probe()
1955 for (chip_cs = 0, mem_region = start_region; chip_cs < nfc->data->max_ncs; in stm32_fmc2_nfc_probe()
1957 if (!(nfc->cs_assigned & BIT(chip_cs))) in stm32_fmc2_nfc_probe()
1960 nfc->data_base[chip_cs] = devm_platform_get_and_ioremap_resource(pdev, in stm32_fmc2_nfc_probe()
1962 if (IS_ERR(nfc->data_base[chip_cs])) in stm32_fmc2_nfc_probe()
1963 return PTR_ERR(nfc->data_base[chip_cs]); in stm32_fmc2_nfc_probe()
1965 nfc->data_phys_addr[chip_cs] = res->start; in stm32_fmc2_nfc_probe()
1967 nfc->cmd_base[chip_cs] = devm_platform_ioremap_resource(pdev, mem_region + 1); in stm32_fmc2_nfc_probe()
1968 if (IS_ERR(nfc->cmd_base[chip_cs])) in stm32_fmc2_nfc_probe()
1969 return PTR_ERR(nfc->cmd_base[chip_cs]); in stm32_fmc2_nfc_probe()
1971 nfc->addr_base[chip_cs] = devm_platform_ioremap_resource(pdev, mem_region + 2); in stm32_fmc2_nfc_probe()
1972 if (IS_ERR(nfc->addr_base[chip_cs])) in stm32_fmc2_nfc_probe()
1973 return PTR_ERR(nfc->addr_base[chip_cs]); in stm32_fmc2_nfc_probe()
1987 init_completion(&nfc->complete); in stm32_fmc2_nfc_probe()
1989 nfc->clk = devm_clk_get_enabled(nfc->cdev, NULL); in stm32_fmc2_nfc_probe()
1990 if (IS_ERR(nfc->clk)) { in stm32_fmc2_nfc_probe()
1992 return PTR_ERR(nfc->clk); in stm32_fmc2_nfc_probe()
1998 if (ret == -EPROBE_DEFER) in stm32_fmc2_nfc_probe()
2011 nand = &nfc->nand; in stm32_fmc2_nfc_probe()
2012 chip = &nand->chip; in stm32_fmc2_nfc_probe()
2014 mtd->dev.parent = dev; in stm32_fmc2_nfc_probe()
2016 chip->controller = &nfc->base; in stm32_fmc2_nfc_probe()
2017 chip->options |= NAND_BUSWIDTH_AUTO | NAND_NO_SUBPAGE_WRITE | in stm32_fmc2_nfc_probe()
2023 ret = nand_scan(chip, nand->ncs); in stm32_fmc2_nfc_probe()
2042 if (nfc->dma_ecc_ch) in stm32_fmc2_nfc_probe()
2043 dma_release_channel(nfc->dma_ecc_ch); in stm32_fmc2_nfc_probe()
2044 if (nfc->dma_tx_ch) in stm32_fmc2_nfc_probe()
2045 dma_release_channel(nfc->dma_tx_ch); in stm32_fmc2_nfc_probe()
2046 if (nfc->dma_rx_ch) in stm32_fmc2_nfc_probe()
2047 dma_release_channel(nfc->dma_rx_ch); in stm32_fmc2_nfc_probe()
2049 sg_free_table(&nfc->dma_data_sg); in stm32_fmc2_nfc_probe()
2050 sg_free_table(&nfc->dma_ecc_sg); in stm32_fmc2_nfc_probe()
2058 struct stm32_fmc2_nand *nand = &nfc->nand; in stm32_fmc2_nfc_remove()
2059 struct nand_chip *chip = &nand->chip; in stm32_fmc2_nfc_remove()
2066 if (nfc->dma_ecc_ch) in stm32_fmc2_nfc_remove()
2067 dma_release_channel(nfc->dma_ecc_ch); in stm32_fmc2_nfc_remove()
2068 if (nfc->dma_tx_ch) in stm32_fmc2_nfc_remove()
2069 dma_release_channel(nfc->dma_tx_ch); in stm32_fmc2_nfc_remove()
2070 if (nfc->dma_rx_ch) in stm32_fmc2_nfc_remove()
2071 dma_release_channel(nfc->dma_rx_ch); in stm32_fmc2_nfc_remove()
2073 sg_free_table(&nfc->dma_data_sg); in stm32_fmc2_nfc_remove()
2074 sg_free_table(&nfc->dma_ecc_sg); in stm32_fmc2_nfc_remove()
2082 struct stm32_fmc2_nand *nand = &nfc->nand; in stm32_fmc2_nfc_suspend()
2084 clk_disable_unprepare(nfc->clk); in stm32_fmc2_nfc_suspend()
2096 struct stm32_fmc2_nand *nand = &nfc->nand; in stm32_fmc2_nfc_resume()
2101 ret = clk_prepare_enable(nfc->clk); in stm32_fmc2_nfc_resume()
2111 for (chip_cs = 0; chip_cs < nfc->data->max_ncs; chip_cs++) { in stm32_fmc2_nfc_resume()
2112 if (!(nfc->cs_assigned & BIT(chip_cs))) in stm32_fmc2_nfc_resume()
2115 nand_reset(&nand->chip, chip_cs); in stm32_fmc2_nfc_resume()
2135 .compatible = "st,stm32mp15-fmc2",
2139 .compatible = "st,stm32mp1-fmc2-nfc",
2143 .compatible = "st,stm32mp25-fmc2-nfc",