Lines Matching full:nfc
251 int (*set_cdev)(struct stm32_fmc2_nfc *nfc);
295 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_timings_init() local
301 regmap_update_bits(nfc->regmap, FMC2_PCR, in stm32_fmc2_nfc_timings_init()
311 regmap_write(nfc->regmap, FMC2_PMEM, pmem); in stm32_fmc2_nfc_timings_init()
318 regmap_write(nfc->regmap, FMC2_PATT, patt); in stm32_fmc2_nfc_timings_init()
323 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_setup() local
345 regmap_update_bits(nfc->regmap, FMC2_PCR, pcr_mask, pcr); in stm32_fmc2_nfc_setup()
350 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_select_chip() local
355 if (nand->cs_used[chipnr] == nfc->cs_sel) in stm32_fmc2_nfc_select_chip()
358 nfc->cs_sel = nand->cs_used[chipnr]; in stm32_fmc2_nfc_select_chip()
362 if (nfc->dma_tx_ch) { in stm32_fmc2_nfc_select_chip()
364 dma_cfg.dst_addr = nfc->data_phys_addr[nfc->cs_sel]; in stm32_fmc2_nfc_select_chip()
366 dma_cfg.dst_maxburst = nfc->tx_dma_max_burst / in stm32_fmc2_nfc_select_chip()
369 ret = dmaengine_slave_config(nfc->dma_tx_ch, &dma_cfg); in stm32_fmc2_nfc_select_chip()
371 dev_err(nfc->dev, "tx DMA engine slave config failed\n"); in stm32_fmc2_nfc_select_chip()
376 if (nfc->dma_rx_ch) { in stm32_fmc2_nfc_select_chip()
378 dma_cfg.src_addr = nfc->data_phys_addr[nfc->cs_sel]; in stm32_fmc2_nfc_select_chip()
380 dma_cfg.src_maxburst = nfc->rx_dma_max_burst / in stm32_fmc2_nfc_select_chip()
383 ret = dmaengine_slave_config(nfc->dma_rx_ch, &dma_cfg); in stm32_fmc2_nfc_select_chip()
385 dev_err(nfc->dev, "rx DMA engine slave config failed\n"); in stm32_fmc2_nfc_select_chip()
390 if (nfc->dma_ecc_ch) { in stm32_fmc2_nfc_select_chip()
396 dma_cfg.src_addr = nfc->io_phys_addr; in stm32_fmc2_nfc_select_chip()
401 ret = dmaengine_slave_config(nfc->dma_ecc_ch, &dma_cfg); in stm32_fmc2_nfc_select_chip()
403 dev_err(nfc->dev, "ECC DMA engine slave config failed\n"); in stm32_fmc2_nfc_select_chip()
408 nfc->dma_ecc_len = chip->ecc.strength == FMC2_ECC_HAM ? in stm32_fmc2_nfc_select_chip()
415 static void stm32_fmc2_nfc_set_buswidth_16(struct stm32_fmc2_nfc *nfc, bool set) in stm32_fmc2_nfc_set_buswidth_16() argument
422 regmap_update_bits(nfc->regmap, FMC2_PCR, FMC2_PCR_PWID, pcr); in stm32_fmc2_nfc_set_buswidth_16()
425 static void stm32_fmc2_nfc_set_ecc(struct stm32_fmc2_nfc *nfc, bool enable) in stm32_fmc2_nfc_set_ecc() argument
427 regmap_update_bits(nfc->regmap, FMC2_PCR, FMC2_PCR_ECCEN, in stm32_fmc2_nfc_set_ecc()
431 static void stm32_fmc2_nfc_enable_seq_irq(struct stm32_fmc2_nfc *nfc) in stm32_fmc2_nfc_enable_seq_irq() argument
433 nfc->irq_state = FMC2_IRQ_SEQ; in stm32_fmc2_nfc_enable_seq_irq()
435 regmap_update_bits(nfc->regmap, FMC2_CSQIER, in stm32_fmc2_nfc_enable_seq_irq()
439 static void stm32_fmc2_nfc_disable_seq_irq(struct stm32_fmc2_nfc *nfc) in stm32_fmc2_nfc_disable_seq_irq() argument
441 regmap_update_bits(nfc->regmap, FMC2_CSQIER, FMC2_CSQIER_TCIE, 0); in stm32_fmc2_nfc_disable_seq_irq()
443 nfc->irq_state = FMC2_IRQ_UNKNOWN; in stm32_fmc2_nfc_disable_seq_irq()
446 static void stm32_fmc2_nfc_clear_seq_irq(struct stm32_fmc2_nfc *nfc) in stm32_fmc2_nfc_clear_seq_irq() argument
448 regmap_write(nfc->regmap, FMC2_CSQICR, FMC2_CSQICR_CLEAR_IRQ); in stm32_fmc2_nfc_clear_seq_irq()
451 static void stm32_fmc2_nfc_enable_bch_irq(struct stm32_fmc2_nfc *nfc, int mode) in stm32_fmc2_nfc_enable_bch_irq() argument
453 nfc->irq_state = FMC2_IRQ_BCH; in stm32_fmc2_nfc_enable_bch_irq()
456 regmap_update_bits(nfc->regmap, FMC2_BCHIER, in stm32_fmc2_nfc_enable_bch_irq()
459 regmap_update_bits(nfc->regmap, FMC2_BCHIER, in stm32_fmc2_nfc_enable_bch_irq()
463 static void stm32_fmc2_nfc_disable_bch_irq(struct stm32_fmc2_nfc *nfc) in stm32_fmc2_nfc_disable_bch_irq() argument
465 regmap_update_bits(nfc->regmap, FMC2_BCHIER, in stm32_fmc2_nfc_disable_bch_irq()
468 nfc->irq_state = FMC2_IRQ_UNKNOWN; in stm32_fmc2_nfc_disable_bch_irq()
471 static void stm32_fmc2_nfc_clear_bch_irq(struct stm32_fmc2_nfc *nfc) in stm32_fmc2_nfc_clear_bch_irq() argument
473 regmap_write(nfc->regmap, FMC2_BCHICR, FMC2_BCHICR_CLEAR_IRQ); in stm32_fmc2_nfc_clear_bch_irq()
482 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_hwctl() local
484 stm32_fmc2_nfc_set_ecc(nfc, false); in stm32_fmc2_nfc_hwctl()
487 regmap_update_bits(nfc->regmap, FMC2_PCR, FMC2_PCR_WEN, in stm32_fmc2_nfc_hwctl()
490 reinit_completion(&nfc->complete); in stm32_fmc2_nfc_hwctl()
491 stm32_fmc2_nfc_clear_bch_irq(nfc); in stm32_fmc2_nfc_hwctl()
492 stm32_fmc2_nfc_enable_bch_irq(nfc, mode); in stm32_fmc2_nfc_hwctl()
495 stm32_fmc2_nfc_set_ecc(nfc, true); in stm32_fmc2_nfc_hwctl()
513 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_ham_calculate() local
517 ret = regmap_read_poll_timeout(nfc->regmap, FMC2_SR, sr, in stm32_fmc2_nfc_ham_calculate()
521 dev_err(nfc->dev, "ham timeout\n"); in stm32_fmc2_nfc_ham_calculate()
525 regmap_read(nfc->regmap, FMC2_HECCR, &heccr); in stm32_fmc2_nfc_ham_calculate()
527 stm32_fmc2_nfc_set_ecc(nfc, false); in stm32_fmc2_nfc_ham_calculate()
594 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_bch_calculate() local
598 if (!wait_for_completion_timeout(&nfc->complete, in stm32_fmc2_nfc_bch_calculate()
600 dev_err(nfc->dev, "bch timeout\n"); in stm32_fmc2_nfc_bch_calculate()
601 stm32_fmc2_nfc_disable_bch_irq(nfc); in stm32_fmc2_nfc_bch_calculate()
606 regmap_read(nfc->regmap, FMC2_BCHPBR1, &bchpbr); in stm32_fmc2_nfc_bch_calculate()
612 regmap_read(nfc->regmap, FMC2_BCHPBR2, &bchpbr); in stm32_fmc2_nfc_bch_calculate()
620 regmap_read(nfc->regmap, FMC2_BCHPBR3, &bchpbr); in stm32_fmc2_nfc_bch_calculate()
626 regmap_read(nfc->regmap, FMC2_BCHPBR4, &bchpbr); in stm32_fmc2_nfc_bch_calculate()
630 stm32_fmc2_nfc_set_ecc(nfc, false); in stm32_fmc2_nfc_bch_calculate()
677 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_bch_correct() local
681 if (!wait_for_completion_timeout(&nfc->complete, in stm32_fmc2_nfc_bch_correct()
683 dev_err(nfc->dev, "bch timeout\n"); in stm32_fmc2_nfc_bch_correct()
684 stm32_fmc2_nfc_disable_bch_irq(nfc); in stm32_fmc2_nfc_bch_correct()
688 regmap_bulk_read(nfc->regmap, FMC2_BCHDSR0, ecc_sta, 5); in stm32_fmc2_nfc_bch_correct()
690 stm32_fmc2_nfc_set_ecc(nfc, false); in stm32_fmc2_nfc_bch_correct()
761 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_rw_page_init() local
770 regmap_update_bits(nfc->regmap, FMC2_PCR, FMC2_PCR_WEN, in stm32_fmc2_nfc_rw_page_init()
833 cfg[4] = FIELD_PREP(FMC2_CSQCAR2_NANDCEN, nfc->cs_sel); in stm32_fmc2_nfc_rw_page_init()
845 regmap_bulk_write(nfc->regmap, FMC2_CSQCFGR1, cfg, 5); in stm32_fmc2_nfc_rw_page_init()
857 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_xfer() local
860 struct dma_chan *dma_ch = nfc->dma_rx_ch; in stm32_fmc2_nfc_xfer()
873 dma_ch = nfc->dma_tx_ch; in stm32_fmc2_nfc_xfer()
876 for_each_sg(nfc->dma_data_sg.sgl, sg, eccsteps, s) { in stm32_fmc2_nfc_xfer()
881 ret = dma_map_sg(nfc->dev, nfc->dma_data_sg.sgl, in stm32_fmc2_nfc_xfer()
886 desc_data = dmaengine_prep_slave_sg(dma_ch, nfc->dma_data_sg.sgl, in stm32_fmc2_nfc_xfer()
894 reinit_completion(&nfc->dma_data_complete); in stm32_fmc2_nfc_xfer()
895 reinit_completion(&nfc->complete); in stm32_fmc2_nfc_xfer()
897 desc_data->callback_param = &nfc->dma_data_complete; in stm32_fmc2_nfc_xfer()
906 for_each_sg(nfc->dma_ecc_sg.sgl, sg, eccsteps, s) { in stm32_fmc2_nfc_xfer()
907 sg_dma_address(sg) = nfc->dma_ecc_addr + in stm32_fmc2_nfc_xfer()
908 s * nfc->dma_ecc_len; in stm32_fmc2_nfc_xfer()
909 sg_dma_len(sg) = nfc->dma_ecc_len; in stm32_fmc2_nfc_xfer()
912 desc_ecc = dmaengine_prep_slave_sg(nfc->dma_ecc_ch, in stm32_fmc2_nfc_xfer()
913 nfc->dma_ecc_sg.sgl, in stm32_fmc2_nfc_xfer()
921 reinit_completion(&nfc->dma_ecc_complete); in stm32_fmc2_nfc_xfer()
923 desc_ecc->callback_param = &nfc->dma_ecc_complete; in stm32_fmc2_nfc_xfer()
928 dma_async_issue_pending(nfc->dma_ecc_ch); in stm32_fmc2_nfc_xfer()
931 stm32_fmc2_nfc_clear_seq_irq(nfc); in stm32_fmc2_nfc_xfer()
932 stm32_fmc2_nfc_enable_seq_irq(nfc); in stm32_fmc2_nfc_xfer()
935 regmap_update_bits(nfc->regmap, FMC2_CSQCR, in stm32_fmc2_nfc_xfer()
939 if (!wait_for_completion_timeout(&nfc->complete, timeout)) { in stm32_fmc2_nfc_xfer()
940 dev_err(nfc->dev, "seq timeout\n"); in stm32_fmc2_nfc_xfer()
941 stm32_fmc2_nfc_disable_seq_irq(nfc); in stm32_fmc2_nfc_xfer()
944 dmaengine_terminate_all(nfc->dma_ecc_ch); in stm32_fmc2_nfc_xfer()
950 if (!wait_for_completion_timeout(&nfc->dma_data_complete, timeout)) { in stm32_fmc2_nfc_xfer()
951 dev_err(nfc->dev, "data DMA timeout\n"); in stm32_fmc2_nfc_xfer()
958 if (!wait_for_completion_timeout(&nfc->dma_ecc_complete, in stm32_fmc2_nfc_xfer()
960 dev_err(nfc->dev, "ECC DMA timeout\n"); in stm32_fmc2_nfc_xfer()
961 dmaengine_terminate_all(nfc->dma_ecc_ch); in stm32_fmc2_nfc_xfer()
967 dma_unmap_sg(nfc->dev, nfc->dma_data_sg.sgl, eccsteps, dma_data_dir); in stm32_fmc2_nfc_xfer()
1036 static u16 stm32_fmc2_nfc_get_mapping_status(struct stm32_fmc2_nfc *nfc) in stm32_fmc2_nfc_get_mapping_status() argument
1040 regmap_read(nfc->regmap, FMC2_CSQEMSR, &csqemsr); in stm32_fmc2_nfc_get_mapping_status()
1049 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_seq_correct() local
1054 u32 *ecc_sta = (u32 *)nfc->ecc_buf; in stm32_fmc2_nfc_seq_correct()
1055 u16 sta_map = stm32_fmc2_nfc_get_mapping_status(nfc); in stm32_fmc2_nfc_seq_correct()
1108 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_seq_read_page() local
1126 sta_map = stm32_fmc2_nfc_get_mapping_status(nfc); in stm32_fmc2_nfc_seq_read_page()
1182 struct stm32_fmc2_nfc *nfc = (struct stm32_fmc2_nfc *)dev_id; in stm32_fmc2_nfc_irq() local
1184 if (nfc->irq_state == FMC2_IRQ_SEQ) in stm32_fmc2_nfc_irq()
1186 stm32_fmc2_nfc_disable_seq_irq(nfc); in stm32_fmc2_nfc_irq()
1187 else if (nfc->irq_state == FMC2_IRQ_BCH) in stm32_fmc2_nfc_irq()
1189 stm32_fmc2_nfc_disable_bch_irq(nfc); in stm32_fmc2_nfc_irq()
1191 complete(&nfc->complete); in stm32_fmc2_nfc_irq()
1199 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_read_data() local
1200 void __iomem *io_addr_r = nfc->data_base[nfc->cs_sel]; in stm32_fmc2_nfc_read_data()
1204 stm32_fmc2_nfc_set_buswidth_16(nfc, false); in stm32_fmc2_nfc_read_data()
1240 stm32_fmc2_nfc_set_buswidth_16(nfc, true); in stm32_fmc2_nfc_read_data()
1246 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_write_data() local
1247 void __iomem *io_addr_w = nfc->data_base[nfc->cs_sel]; in stm32_fmc2_nfc_write_data()
1251 stm32_fmc2_nfc_set_buswidth_16(nfc, false); in stm32_fmc2_nfc_write_data()
1287 stm32_fmc2_nfc_set_buswidth_16(nfc, true); in stm32_fmc2_nfc_write_data()
1293 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_waitrdy() local
1298 if (regmap_read_poll_timeout(nfc->regmap, FMC2_SR, sr, in stm32_fmc2_nfc_waitrdy()
1301 dev_warn(nfc->dev, "Waitrdy timeout\n"); in stm32_fmc2_nfc_waitrdy()
1308 regmap_write(nfc->regmap, FMC2_ICR, FMC2_ICR_CIHLF); in stm32_fmc2_nfc_waitrdy()
1311 return regmap_read_poll_timeout(nfc->regmap, FMC2_ISR, isr, in stm32_fmc2_nfc_waitrdy()
1320 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_exec_op() local
1338 nfc->cmd_base[nfc->cs_sel]); in stm32_fmc2_nfc_exec_op()
1344 nfc->addr_base[nfc->cs_sel]); in stm32_fmc2_nfc_exec_op()
1369 static void stm32_fmc2_nfc_init(struct stm32_fmc2_nfc *nfc) in stm32_fmc2_nfc_init() argument
1373 regmap_read(nfc->regmap, FMC2_PCR, &pcr); in stm32_fmc2_nfc_init()
1376 nfc->cs_sel = -1; in stm32_fmc2_nfc_init()
1404 if (nfc->dev == nfc->cdev) in stm32_fmc2_nfc_init()
1405 regmap_update_bits(nfc->regmap, FMC2_BCR1, in stm32_fmc2_nfc_init()
1408 regmap_write(nfc->regmap, FMC2_PCR, pcr); in stm32_fmc2_nfc_init()
1409 regmap_write(nfc->regmap, FMC2_PMEM, FMC2_PMEM_DEFAULT); in stm32_fmc2_nfc_init()
1410 regmap_write(nfc->regmap, FMC2_PATT, FMC2_PATT_DEFAULT); in stm32_fmc2_nfc_init()
1416 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_calc_timings() local
1419 unsigned long hclk = clk_get_rate(nfc->clk); in stm32_fmc2_nfc_calc_timings()
1564 static int stm32_fmc2_nfc_dma_setup(struct stm32_fmc2_nfc *nfc) in stm32_fmc2_nfc_dma_setup() argument
1569 nfc->dma_tx_ch = dma_request_chan(nfc->dev, "tx"); in stm32_fmc2_nfc_dma_setup()
1570 if (IS_ERR(nfc->dma_tx_ch)) { in stm32_fmc2_nfc_dma_setup()
1571 ret = PTR_ERR(nfc->dma_tx_ch); in stm32_fmc2_nfc_dma_setup()
1573 dev_err(nfc->dev, in stm32_fmc2_nfc_dma_setup()
1575 nfc->dma_tx_ch = NULL; in stm32_fmc2_nfc_dma_setup()
1579 ret = dma_get_slave_caps(nfc->dma_tx_ch, &caps); in stm32_fmc2_nfc_dma_setup()
1582 nfc->tx_dma_max_burst = caps.max_burst; in stm32_fmc2_nfc_dma_setup()
1584 nfc->dma_rx_ch = dma_request_chan(nfc->dev, "rx"); in stm32_fmc2_nfc_dma_setup()
1585 if (IS_ERR(nfc->dma_rx_ch)) { in stm32_fmc2_nfc_dma_setup()
1586 ret = PTR_ERR(nfc->dma_rx_ch); in stm32_fmc2_nfc_dma_setup()
1588 dev_err(nfc->dev, in stm32_fmc2_nfc_dma_setup()
1590 nfc->dma_rx_ch = NULL; in stm32_fmc2_nfc_dma_setup()
1594 ret = dma_get_slave_caps(nfc->dma_rx_ch, &caps); in stm32_fmc2_nfc_dma_setup()
1597 nfc->rx_dma_max_burst = caps.max_burst; in stm32_fmc2_nfc_dma_setup()
1599 nfc->dma_ecc_ch = dma_request_chan(nfc->dev, "ecc"); in stm32_fmc2_nfc_dma_setup()
1600 if (IS_ERR(nfc->dma_ecc_ch)) { in stm32_fmc2_nfc_dma_setup()
1601 ret = PTR_ERR(nfc->dma_ecc_ch); in stm32_fmc2_nfc_dma_setup()
1603 dev_err(nfc->dev, in stm32_fmc2_nfc_dma_setup()
1605 nfc->dma_ecc_ch = NULL; in stm32_fmc2_nfc_dma_setup()
1609 ret = sg_alloc_table(&nfc->dma_ecc_sg, FMC2_MAX_SG, GFP_KERNEL); in stm32_fmc2_nfc_dma_setup()
1614 nfc->ecc_buf = dmam_alloc_coherent(nfc->dev, FMC2_MAX_ECC_BUF_LEN, in stm32_fmc2_nfc_dma_setup()
1615 &nfc->dma_ecc_addr, GFP_KERNEL); in stm32_fmc2_nfc_dma_setup()
1616 if (!nfc->ecc_buf) in stm32_fmc2_nfc_dma_setup()
1619 ret = sg_alloc_table(&nfc->dma_data_sg, FMC2_MAX_SG, GFP_KERNEL); in stm32_fmc2_nfc_dma_setup()
1623 init_completion(&nfc->dma_data_complete); in stm32_fmc2_nfc_dma_setup()
1624 init_completion(&nfc->dma_ecc_complete); in stm32_fmc2_nfc_dma_setup()
1630 dev_warn(nfc->dev, in stm32_fmc2_nfc_dma_setup()
1640 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_nand_callbacks_setup() local
1646 if (nfc->dma_tx_ch && nfc->dma_rx_ch && nfc->dma_ecc_ch) { in stm32_fmc2_nfc_nand_callbacks_setup()
1733 struct stm32_fmc2_nfc *nfc = to_stm32_nfc(chip->controller); in stm32_fmc2_nfc_attach_chip() local
1745 dev_err(nfc->dev, in stm32_fmc2_nfc_attach_chip()
1760 dev_err(nfc->dev, "no valid ECC settings set\n"); in stm32_fmc2_nfc_attach_chip()
1765 dev_err(nfc->dev, "nand page size is not supported\n"); in stm32_fmc2_nfc_attach_chip()
1799 static int stm32_fmc2_nfc_parse_child(struct stm32_fmc2_nfc *nfc, in stm32_fmc2_nfc_parse_child() argument
1802 struct stm32_fmc2_nand *nand = &nfc->nand; in stm32_fmc2_nfc_parse_child()
1811 dev_err(nfc->dev, "invalid reg property size\n"); in stm32_fmc2_nfc_parse_child()
1818 dev_err(nfc->dev, "could not retrieve reg property: %d\n", in stm32_fmc2_nfc_parse_child()
1823 if (cs >= nfc->data->max_ncs) { in stm32_fmc2_nfc_parse_child()
1824 dev_err(nfc->dev, "invalid reg value: %d\n", cs); in stm32_fmc2_nfc_parse_child()
1828 if (nfc->cs_assigned & BIT(cs)) { in stm32_fmc2_nfc_parse_child()
1829 dev_err(nfc->dev, "cs already assigned: %d\n", cs); in stm32_fmc2_nfc_parse_child()
1833 nfc->cs_assigned |= BIT(cs); in stm32_fmc2_nfc_parse_child()
1837 nand->wp_gpio = devm_fwnode_gpiod_get(nfc->dev, of_fwnode_handle(dn), in stm32_fmc2_nfc_parse_child()
1842 return dev_err_probe(nfc->dev, ret, in stm32_fmc2_nfc_parse_child()
1853 static int stm32_fmc2_nfc_parse_dt(struct stm32_fmc2_nfc *nfc) in stm32_fmc2_nfc_parse_dt() argument
1855 struct device_node *dn = nfc->dev->of_node; in stm32_fmc2_nfc_parse_dt()
1860 dev_err(nfc->dev, "NAND chip not defined\n"); in stm32_fmc2_nfc_parse_dt()
1865 dev_err(nfc->dev, "too many NAND chips defined\n"); in stm32_fmc2_nfc_parse_dt()
1870 ret = stm32_fmc2_nfc_parse_child(nfc, child); in stm32_fmc2_nfc_parse_dt()
1878 static int stm32_fmc2_nfc_set_cdev(struct stm32_fmc2_nfc *nfc) in stm32_fmc2_nfc_set_cdev() argument
1880 struct device *dev = nfc->dev; in stm32_fmc2_nfc_set_cdev()
1887 if (of_device_is_compatible(dev->of_node, "st,stm32mp1-fmc2-nfc")) { in stm32_fmc2_nfc_set_cdev()
1889 nfc->cdev = dev->parent; in stm32_fmc2_nfc_set_cdev()
1900 nfc->cdev = dev; in stm32_fmc2_nfc_set_cdev()
1909 struct stm32_fmc2_nfc *nfc; in stm32_fmc2_nfc_probe() local
1918 nfc = devm_kzalloc(dev, sizeof(*nfc), GFP_KERNEL); in stm32_fmc2_nfc_probe()
1919 if (!nfc) in stm32_fmc2_nfc_probe()
1922 nfc->dev = dev; in stm32_fmc2_nfc_probe()
1923 nand_controller_init(&nfc->base); in stm32_fmc2_nfc_probe()
1924 nfc->base.ops = &stm32_fmc2_nfc_controller_ops; in stm32_fmc2_nfc_probe()
1926 nfc->data = of_device_get_match_data(dev); in stm32_fmc2_nfc_probe()
1927 if (!nfc->data) in stm32_fmc2_nfc_probe()
1930 if (nfc->data->set_cdev) { in stm32_fmc2_nfc_probe()
1931 ret = nfc->data->set_cdev(nfc); in stm32_fmc2_nfc_probe()
1935 nfc->cdev = dev->parent; in stm32_fmc2_nfc_probe()
1938 ret = stm32_fmc2_nfc_parse_dt(nfc); in stm32_fmc2_nfc_probe()
1942 ret = of_address_to_resource(nfc->cdev->of_node, 0, &cres); in stm32_fmc2_nfc_probe()
1946 nfc->io_phys_addr = cres.start; in stm32_fmc2_nfc_probe()
1948 nfc->regmap = device_node_to_regmap(nfc->cdev->of_node); in stm32_fmc2_nfc_probe()
1949 if (IS_ERR(nfc->regmap)) in stm32_fmc2_nfc_probe()
1950 return PTR_ERR(nfc->regmap); in stm32_fmc2_nfc_probe()
1952 if (nfc->dev == nfc->cdev) in stm32_fmc2_nfc_probe()
1955 for (chip_cs = 0, mem_region = start_region; chip_cs < nfc->data->max_ncs; in stm32_fmc2_nfc_probe()
1957 if (!(nfc->cs_assigned & BIT(chip_cs))) in stm32_fmc2_nfc_probe()
1960 nfc->data_base[chip_cs] = devm_platform_get_and_ioremap_resource(pdev, in stm32_fmc2_nfc_probe()
1962 if (IS_ERR(nfc->data_base[chip_cs])) in stm32_fmc2_nfc_probe()
1963 return PTR_ERR(nfc->data_base[chip_cs]); in stm32_fmc2_nfc_probe()
1965 nfc->data_phys_addr[chip_cs] = res->start; in stm32_fmc2_nfc_probe()
1967 nfc->cmd_base[chip_cs] = devm_platform_ioremap_resource(pdev, mem_region + 1); in stm32_fmc2_nfc_probe()
1968 if (IS_ERR(nfc->cmd_base[chip_cs])) in stm32_fmc2_nfc_probe()
1969 return PTR_ERR(nfc->cmd_base[chip_cs]); in stm32_fmc2_nfc_probe()
1971 nfc->addr_base[chip_cs] = devm_platform_ioremap_resource(pdev, mem_region + 2); in stm32_fmc2_nfc_probe()
1972 if (IS_ERR(nfc->addr_base[chip_cs])) in stm32_fmc2_nfc_probe()
1973 return PTR_ERR(nfc->addr_base[chip_cs]); in stm32_fmc2_nfc_probe()
1981 dev_name(dev), nfc); in stm32_fmc2_nfc_probe()
1987 init_completion(&nfc->complete); in stm32_fmc2_nfc_probe()
1989 nfc->clk = devm_clk_get_enabled(nfc->cdev, NULL); in stm32_fmc2_nfc_probe()
1990 if (IS_ERR(nfc->clk)) { in stm32_fmc2_nfc_probe()
1992 return PTR_ERR(nfc->clk); in stm32_fmc2_nfc_probe()
2005 ret = stm32_fmc2_nfc_dma_setup(nfc); in stm32_fmc2_nfc_probe()
2009 stm32_fmc2_nfc_init(nfc); in stm32_fmc2_nfc_probe()
2011 nand = &nfc->nand; in stm32_fmc2_nfc_probe()
2016 chip->controller = &nfc->base; in stm32_fmc2_nfc_probe()
2031 platform_set_drvdata(pdev, nfc); in stm32_fmc2_nfc_probe()
2042 if (nfc->dma_ecc_ch) in stm32_fmc2_nfc_probe()
2043 dma_release_channel(nfc->dma_ecc_ch); in stm32_fmc2_nfc_probe()
2044 if (nfc->dma_tx_ch) in stm32_fmc2_nfc_probe()
2045 dma_release_channel(nfc->dma_tx_ch); in stm32_fmc2_nfc_probe()
2046 if (nfc->dma_rx_ch) in stm32_fmc2_nfc_probe()
2047 dma_release_channel(nfc->dma_rx_ch); in stm32_fmc2_nfc_probe()
2049 sg_free_table(&nfc->dma_data_sg); in stm32_fmc2_nfc_probe()
2050 sg_free_table(&nfc->dma_ecc_sg); in stm32_fmc2_nfc_probe()
2057 struct stm32_fmc2_nfc *nfc = platform_get_drvdata(pdev); in stm32_fmc2_nfc_remove() local
2058 struct stm32_fmc2_nand *nand = &nfc->nand; in stm32_fmc2_nfc_remove()
2066 if (nfc->dma_ecc_ch) in stm32_fmc2_nfc_remove()
2067 dma_release_channel(nfc->dma_ecc_ch); in stm32_fmc2_nfc_remove()
2068 if (nfc->dma_tx_ch) in stm32_fmc2_nfc_remove()
2069 dma_release_channel(nfc->dma_tx_ch); in stm32_fmc2_nfc_remove()
2070 if (nfc->dma_rx_ch) in stm32_fmc2_nfc_remove()
2071 dma_release_channel(nfc->dma_rx_ch); in stm32_fmc2_nfc_remove()
2073 sg_free_table(&nfc->dma_data_sg); in stm32_fmc2_nfc_remove()
2074 sg_free_table(&nfc->dma_ecc_sg); in stm32_fmc2_nfc_remove()
2081 struct stm32_fmc2_nfc *nfc = dev_get_drvdata(dev); in stm32_fmc2_nfc_suspend() local
2082 struct stm32_fmc2_nand *nand = &nfc->nand; in stm32_fmc2_nfc_suspend()
2084 clk_disable_unprepare(nfc->clk); in stm32_fmc2_nfc_suspend()
2095 struct stm32_fmc2_nfc *nfc = dev_get_drvdata(dev); in stm32_fmc2_nfc_resume() local
2096 struct stm32_fmc2_nand *nand = &nfc->nand; in stm32_fmc2_nfc_resume()
2101 ret = clk_prepare_enable(nfc->clk); in stm32_fmc2_nfc_resume()
2107 stm32_fmc2_nfc_init(nfc); in stm32_fmc2_nfc_resume()
2111 for (chip_cs = 0; chip_cs < nfc->data->max_ncs; chip_cs++) { in stm32_fmc2_nfc_resume()
2112 if (!(nfc->cs_assigned & BIT(chip_cs))) in stm32_fmc2_nfc_resume()
2139 .compatible = "st,stm32mp1-fmc2-nfc",
2143 .compatible = "st,stm32mp25-fmc2-nfc",
2162 MODULE_DESCRIPTION("STMicroelectronics STM32 FMC2 NFC driver");