1 // SPDX-License-Identifier: GPL-2.0-only
33 #define ECCLPLB		0x00	/* line parity 7 - 0 bit */
34 #define ECCLPUB		0x04	/* line parity 15 - 8 bit */
35 #define ECCCP		0x08	/* column parity 5 - 0 bit */
36 #define ECCCNTR		0x0C	/* ECC byte counter */
37 #define ECCCLRR		0x10	/* cleare ECC */
50  *	hardware specific access to control-lines
52  *	NAND_CNE: bit 0 -> ! bit 0 & 4
53  *	NAND_CLE: bit 1 -> bit 1
54  *	NAND_ALE: bit 2 -> bit 2
69 		writeb((readb(sharpsl->io + FLASHCTL) & ~0x17) | bits, sharpsl->io + FLASHCTL);  in sharpsl_nand_hwcontrol()
73 		writeb(cmd, chip->legacy.IO_ADDR_W);  in sharpsl_nand_hwcontrol()
79 	return !((readb(sharpsl->io + FLASHCTL) & FLRYBY) == 0);  in sharpsl_nand_dev_ready()
85 	writeb(0, sharpsl->io + ECCCLRR);  in sharpsl_nand_enable_hwecc()
92 	ecc_code[0] = ~readb(sharpsl->io + ECCLPUB);  in sharpsl_nand_calculate_ecc()
93 	ecc_code[1] = ~readb(sharpsl->io + ECCLPLB);  in sharpsl_nand_calculate_ecc()
94 	ecc_code[2] = (~readb(sharpsl->io + ECCCP) << 2) | 0x03;  in sharpsl_nand_calculate_ecc()
95 	return readb(sharpsl->io + ECCCNTR) != 0;  in sharpsl_nand_calculate_ecc()
100 	if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST)  in sharpsl_attach_chip()
103 	chip->ecc.size = 256;  in sharpsl_attach_chip()
104 	chip->ecc.bytes = 3;  in sharpsl_attach_chip()
105 	chip->ecc.strength = 1;  in sharpsl_attach_chip()
106 	chip->ecc.hwctl = sharpsl_nand_enable_hwecc;  in sharpsl_attach_chip()
107 	chip->ecc.calculate = sharpsl_nand_calculate_ecc;  in sharpsl_attach_chip()
108 	chip->ecc.correct = rawnand_sw_hamming_correct;  in sharpsl_attach_chip()
127 	struct sharpsl_nand_platform_data *data = dev_get_platdata(&pdev->dev);  in sharpsl_nand_probe()
130 		dev_err(&pdev->dev, "no platform data!\n");  in sharpsl_nand_probe()
131 		return -EINVAL;  in sharpsl_nand_probe()
137 		return -ENOMEM;  in sharpsl_nand_probe()
141 		dev_err(&pdev->dev, "no io memory resource defined!\n");  in sharpsl_nand_probe()
142 		err = -ENODEV;  in sharpsl_nand_probe()
147 	sharpsl->io = ioremap(r->start, resource_size(r));  in sharpsl_nand_probe()
148 	if (!sharpsl->io) {  in sharpsl_nand_probe()
149 		dev_err(&pdev->dev, "ioremap to access Sharp SL NAND chip failed\n");  in sharpsl_nand_probe()
150 		err = -EIO;  in sharpsl_nand_probe()
155 	this = (struct nand_chip *)(&sharpsl->chip);  in sharpsl_nand_probe()
157 	nand_controller_init(&sharpsl->controller);  in sharpsl_nand_probe()
158 	sharpsl->controller.ops = &sharpsl_ops;  in sharpsl_nand_probe()
159 	this->controller = &sharpsl->controller;  in sharpsl_nand_probe()
163 	mtd->dev.parent = &pdev->dev;  in sharpsl_nand_probe()
164 	mtd_set_ooblayout(mtd, data->ecc_layout);  in sharpsl_nand_probe()
171 	writeb(readb(sharpsl->io + FLASHCTL) | FLWP, sharpsl->io + FLASHCTL);  in sharpsl_nand_probe()
174 	this->legacy.IO_ADDR_R = sharpsl->io + FLASHIO;  in sharpsl_nand_probe()
175 	this->legacy.IO_ADDR_W = sharpsl->io + FLASHIO;  in sharpsl_nand_probe()
177 	this->legacy.cmd_ctrl = sharpsl_nand_hwcontrol;  in sharpsl_nand_probe()
178 	this->legacy.dev_ready = sharpsl_nand_dev_ready;  in sharpsl_nand_probe()
180 	this->legacy.chip_delay = 15;  in sharpsl_nand_probe()
181 	this->badblock_pattern = data->badblock_pattern;  in sharpsl_nand_probe()
189 	mtd->name = "sharpsl-nand";  in sharpsl_nand_probe()
191 	err = mtd_device_parse_register(mtd, data->part_parsers, NULL,  in sharpsl_nand_probe()
192 					data->partitions, data->nr_partitions);  in sharpsl_nand_probe()
203 	iounmap(sharpsl->io);  in sharpsl_nand_probe()
216 	struct nand_chip *chip = &sharpsl->chip;  in sharpsl_nand_remove()
226 	iounmap(sharpsl->io);  in sharpsl_nand_remove()
234 		.name	= "sharpsl-nand",
244 MODULE_DESCRIPTION("Device specific logic for NAND flash on Sharp SL-C7xx Series");