Lines Matching refs:ctlreg
324 dev->ctlreg &= ~(R852_CTL_DATA | R852_CTL_COMMAND | in r852_cmdctl()
328 dev->ctlreg |= R852_CTL_DATA; in r852_cmdctl()
331 dev->ctlreg |= R852_CTL_COMMAND; in r852_cmdctl()
334 dev->ctlreg |= (R852_CTL_CARDENABLE | R852_CTL_ON); in r852_cmdctl()
336 dev->ctlreg &= ~R852_CTL_WRITE; in r852_cmdctl()
340 dev->ctlreg |= R852_CTL_WRITE; in r852_cmdctl()
342 r852_write_reg(dev, R852_CTL, dev->ctlreg); in r852_cmdctl()
347 if (dat == NAND_CMD_SEQIN && (dev->ctlreg & R852_CTL_COMMAND)) { in r852_cmdctl()
348 dev->ctlreg |= R852_CTL_WRITE; in r852_cmdctl()
349 r852_write_reg(dev, R852_CTL, dev->ctlreg); in r852_cmdctl()
409 dev->ctlreg |= R852_CTL_ECC_ENABLE; in r852_ecc_hwctl()
413 dev->ctlreg | R852_CTL_ECC_ACCESS); in r852_ecc_hwctl()
416 r852_write_reg(dev, R852_CTL, dev->ctlreg); in r852_ecc_hwctl()
421 dev->ctlreg &= ~R852_CTL_ECC_ENABLE; in r852_ecc_hwctl()
422 r852_write_reg(dev, R852_CTL, dev->ctlreg); in r852_ecc_hwctl()
440 dev->ctlreg &= ~R852_CTL_ECC_ENABLE; in r852_ecc_calculate()
441 r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS); in r852_ecc_calculate()
454 r852_write_reg(dev, R852_CTL, dev->ctlreg); in r852_ecc_calculate()
479 r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS); in r852_ecc_correct()
481 r852_write_reg(dev, R852_CTL, dev->ctlreg); in r852_ecc_correct()
1018 if (dev->ctlreg & R852_CTL_CARDENABLE) in r852_suspend()