2545 			       struct qcom_op *q_op)  in qcom_op_cmd_mapping()  argument
2573 		q_op->flag = OP_PROGRAM_PAGE;  in qcom_op_cmd_mapping()
2594 				    struct qcom_op *q_op)  in qcom_parse_instructions()  argument
2608 			ret = qcom_op_cmd_mapping(chip, instr->ctx.cmd.opcode, q_op);  in qcom_parse_instructions()
2612 			q_op->cmd_reg = ret;  in qcom_parse_instructions()
2613 			q_op->rdy_delay_ns = instr->delay_ns;  in qcom_parse_instructions()
2622 				q_op->addr1_reg |= addrs[i] << (i * 8);  in qcom_parse_instructions()
2625 				q_op->addr2_reg |= addrs[4];  in qcom_parse_instructions()
2627 			q_op->rdy_delay_ns = instr->delay_ns;  in qcom_parse_instructions()
2631 			q_op->data_instr = instr;  in qcom_parse_instructions()
2632 			q_op->data_instr_idx = op_id;  in qcom_parse_instructions()
2633 			q_op->rdy_delay_ns = instr->delay_ns;  in qcom_parse_instructions()
2636 			q_op->rdy_delay_ns = instr->delay_ns;  in qcom_parse_instructions()
2640 			q_op->rdy_timeout_ms = instr->ctx.waitrdy.timeout_ms;  in qcom_parse_instructions()
2641 			q_op->rdy_delay_ns = instr->delay_ns;  in qcom_parse_instructions()
2686 	struct qcom_op q_op = {};  in qcom_read_status_exec()  local
2695 	ret = qcom_parse_instructions(chip, subop, &q_op);  in qcom_read_status_exec()
2709 	nandc_set_reg(chip, NAND_FLASH_CMD, q_op.cmd_reg);  in qcom_read_status_exec()
2736 	instr = q_op.data_instr;  in qcom_read_status_exec()
2737 	op_id = q_op.data_instr_idx;  in qcom_read_status_exec()
2749 	struct qcom_op q_op = {};  in qcom_read_id_type_exec()  local
2755 	ret = qcom_parse_instructions(chip, subop, &q_op);  in qcom_read_id_type_exec()
2766 	nandc_set_reg(chip, NAND_FLASH_CMD, q_op.cmd_reg);  in qcom_read_id_type_exec()
2767 	nandc_set_reg(chip, NAND_ADDR0, q_op.addr1_reg);  in qcom_read_id_type_exec()
2768 	nandc_set_reg(chip, NAND_ADDR1, q_op.addr2_reg);  in qcom_read_id_type_exec()
2785 	instr = q_op.data_instr;  in qcom_read_id_type_exec()
2786 	op_id = q_op.data_instr_idx;  in qcom_read_id_type_exec()
2800 	struct qcom_op q_op = {};  in qcom_misc_cmd_type_exec()  local
2804 	ret = qcom_parse_instructions(chip, subop, &q_op);  in qcom_misc_cmd_type_exec()
2808 	if (q_op.flag == OP_PROGRAM_PAGE) {  in qcom_misc_cmd_type_exec()
2810 	} else if (q_op.cmd_reg == OP_BLOCK_ERASE) {  in qcom_misc_cmd_type_exec()
2811 		q_op.cmd_reg |= PAGE_ACC | LAST_PAGE;  in qcom_misc_cmd_type_exec()
2812 		nandc_set_reg(chip, NAND_ADDR0, q_op.addr1_reg);  in qcom_misc_cmd_type_exec()
2813 		nandc_set_reg(chip, NAND_ADDR1, q_op.addr2_reg);  in qcom_misc_cmd_type_exec()
2818 	} else if (q_op.cmd_reg != OP_RESET_DEVICE) {  in qcom_misc_cmd_type_exec()
2829 	nandc_set_reg(chip, NAND_FLASH_CMD, q_op.cmd_reg);  in qcom_misc_cmd_type_exec()
2833 	if (q_op.cmd_reg == OP_BLOCK_ERASE)  in qcom_misc_cmd_type_exec()
2846 	qcom_delay_ns(q_op.rdy_delay_ns);  in qcom_misc_cmd_type_exec()
2847 	ret = qcom_wait_rdy_poll(chip, q_op.rdy_timeout_ms);  in qcom_misc_cmd_type_exec()
2857 	struct qcom_op q_op = {};  in qcom_param_page_type_exec()  local
2863 	ret = qcom_parse_instructions(chip, subop, &q_op);  in qcom_param_page_type_exec()
2867 	q_op.cmd_reg |= PAGE_ACC | LAST_PAGE;  in qcom_param_page_type_exec()
2875 	nandc_set_reg(chip, NAND_FLASH_CMD, q_op.cmd_reg);  in qcom_param_page_type_exec()
2909 	instr = q_op.data_instr;  in qcom_param_page_type_exec()
2910 	op_id = q_op.data_instr_idx;  in qcom_param_page_type_exec()
2940 	ret = qcom_wait_rdy_poll(chip, q_op.rdy_timeout_ms);  in qcom_param_page_type_exec()