1 // SPDX-License-Identifier: GPL-2.0+
3  * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
28 #define NFC_V1_V2_BUF_SIZE		(host->regs + 0x00)
29 #define NFC_V1_V2_BUF_ADDR		(host->regs + 0x04)
30 #define NFC_V1_V2_FLASH_ADDR		(host->regs + 0x06)
31 #define NFC_V1_V2_FLASH_CMD		(host->regs + 0x08)
32 #define NFC_V1_V2_CONFIG		(host->regs + 0x0a)
33 #define NFC_V1_V2_ECC_STATUS_RESULT	(host->regs + 0x0c)
34 #define NFC_V1_V2_RSLTMAIN_AREA		(host->regs + 0x0e)
35 #define NFC_V21_RSLTSPARE_AREA		(host->regs + 0x10)
36 #define NFC_V1_V2_WRPROT		(host->regs + 0x12)
37 #define NFC_V1_UNLOCKSTART_BLKADDR	(host->regs + 0x14)
38 #define NFC_V1_UNLOCKEND_BLKADDR	(host->regs + 0x16)
39 #define NFC_V21_UNLOCKSTART_BLKADDR0	(host->regs + 0x20)
40 #define NFC_V21_UNLOCKSTART_BLKADDR1	(host->regs + 0x24)
41 #define NFC_V21_UNLOCKSTART_BLKADDR2	(host->regs + 0x28)
42 #define NFC_V21_UNLOCKSTART_BLKADDR3	(host->regs + 0x2c)
43 #define NFC_V21_UNLOCKEND_BLKADDR0	(host->regs + 0x22)
44 #define NFC_V21_UNLOCKEND_BLKADDR1	(host->regs + 0x26)
45 #define NFC_V21_UNLOCKEND_BLKADDR2	(host->regs + 0x2a)
46 #define NFC_V21_UNLOCKEND_BLKADDR3	(host->regs + 0x2e)
47 #define NFC_V1_V2_NF_WRPRST		(host->regs + 0x18)
48 #define NFC_V1_V2_CONFIG1		(host->regs + 0x1a)
49 #define NFC_V1_V2_CONFIG2		(host->regs + 0x1c)
77 #define NFC_V3_FLASH_CMD		(host->regs_axi + 0x00)
78 #define NFC_V3_FLASH_ADDR0		(host->regs_axi + 0x04)
80 #define NFC_V3_CONFIG1			(host->regs_axi + 0x34)
84 #define NFC_V3_ECC_STATUS_RESULT	(host->regs_axi + 0x38)
86 #define NFC_V3_LAUNCH			(host->regs_axi + 0x40)
88 #define NFC_V3_WRPROT			(host->regs_ip + 0x0)
94 #define NFC_V3_WRPROT_UNLOCK_BLK_ADD0   (host->regs_ip + 0x04)
96 #define NFC_V3_CONFIG2			(host->regs_ip + 0x24)
111 #define NFC_V3_CONFIG3				(host->regs_ip + 0x28)
119 #define NFC_V3_IPC			(host->regs_ip + 0x2C)
123 #define NFC_V3_DELAY_LINE		(host->regs_ip + 0x34)
192 static void memcpy32_fromio(void *trg, const void __iomem  *src, size_t size)  in memcpy32_fromio()  argument
196 	const __iomem u32 *s = src;  in memcpy32_fromio()
202 static void memcpy16_fromio(void *trg, const void __iomem  *src, size_t size)  in memcpy16_fromio()  argument
206 	const __iomem u16 *s = src;  in memcpy16_fromio()
208 	/* We assume that src (IO) is always 32bit aligned */  in memcpy16_fromio()
210 		memcpy32_fromio(trg, src, size);  in memcpy16_fromio()
218 static inline void memcpy32_toio(void __iomem *trg, const void *src, int size)  in memcpy32_toio()  argument
221 	__iowrite32_copy(trg, src, size / 4);  in memcpy32_toio()
224 static void memcpy16_toio(void __iomem *trg, const void *src, int size)  in memcpy16_toio()  argument
228 	const u16 *s = src;  in memcpy16_toio()
231 	if (PTR_ALIGN(src, 4) == src && IS_ALIGNED(size, 4)) {  in memcpy16_toio()
232 		memcpy32_toio(trg, src, size);  in memcpy16_toio()
245  * This function handles the needed shuffling between host->data_buf (which
254 	u16 num_chunks = mtd->writesize / 512;  in copy_spare()
257 	u8 __iomem *s = host->spare0;  in copy_spare()
258 	u16 sparebuf_size = host->devtype_data->spare_len;  in copy_spare()
261 	oob_chunk_size = (host->used_oobsize / num_chunks) & ~1;  in copy_spare()
264 		for (i = 0; i < num_chunks - 1; i++)  in copy_spare()
272 				host->used_oobsize - i * oob_chunk_size);  in copy_spare()
274 		for (i = 0; i < num_chunks - 1; i++)  in copy_spare()
282 			      host->used_oobsize - i * oob_chunk_size);  in copy_spare()
308 	if (!host->devtype_data->irqpending_quirk)  in check_int_v1_v2()
344 	if (host->devtype_data->irqpending_quirk) {  in irq_control()
346 			enable_irq(host->irq);  in irq_control()
348 			disable_irq_nosync(host->irq);  in irq_control()
350 		host->devtype_data->irq_control(host, activate);  in irq_control()
361 	no_subpages = mtd->writesize >> 9;  in get_ecc_status_v1()
363 	ecc_stats = host->ecc_stats_v1;  in get_ecc_status_v1()
371 			mtd->ecc_stats.corrected++;  in get_ecc_status_v1()
375 			mtd->ecc_stats.failed++;  in get_ecc_status_v1()
393 	ecc_bit_mask = (host->eccsize == 4) ? 0x7 : 0xf;  in get_ecc_status_v2_v3()
394 	err_limit = (host->eccsize == 4) ? 0x4 : 0x8;  in get_ecc_status_v2_v3()
396 	no_subpages = mtd->writesize >> 9;  in get_ecc_status_v2_v3()
401 			mtd->ecc_stats.failed++;  in get_ecc_status_v2_v3()
403 			mtd->ecc_stats.corrected += err;  in get_ecc_status_v2_v3()
408 	} while (--no_subpages);  in get_ecc_status_v2_v3()
435 	if (!host->devtype_data->check_int(host))  in mxc_nfc_irq()
440 	complete(&host->op_completion);  in mxc_nfc_irq()
456 	if (host->devtype_data->check_int(host))  in wait_op_done()
462 		reinit_completion(&host->op_completion);  in wait_op_done()
466 		time_left = wait_for_completion_timeout(&host->op_completion, HZ);  in wait_op_done()
467 		if (!time_left && !host->devtype_data->check_int(host)) {  in wait_op_done()
468 			dev_dbg(host->dev, "timeout waiting for irq\n");  in wait_op_done()
469 			ret = -ETIMEDOUT;  in wait_op_done()
478 			done = host->devtype_data->check_int(host);  in wait_op_done()
482 		} while (--max_retries);  in wait_op_done()
485 			dev_dbg(host->dev, "timeout polling for completion\n");  in wait_op_done()
486 			ret = -ETIMEDOUT;  in wait_op_done()
511 	dev_dbg(host->dev, "send_cmd(host, 0x%x, %d)\n", cmd, useirq);  in send_cmd_v1_v2()
516 	if (host->devtype_data->irqpending_quirk && (cmd == NAND_CMD_RESET)) {  in send_cmd_v1_v2()
520 		while (max_retries-- > 0) {  in send_cmd_v1_v2()
527 			dev_dbg(host->dev, "%s: RESET failed\n", __func__);  in send_cmd_v1_v2()
550 	dev_dbg(host->dev, "send_addr(host, 0x%x %d)\n", addr, islast);  in send_addr_v1_v2()
581 	writew(host->active_cs << 4, NFC_V1_V2_BUF_ADDR);  in send_page_v2()
595 	if (mtd->writesize > 512)  in send_page_v1()
603 		writew((host->active_cs << 4) | i, NFC_V1_V2_BUF_ADDR);  in send_page_v1()
619 	memcpy32_fromio(host->data_buf, host->main_area0, 16);  in send_read_id_v3()
626 	writew(host->active_cs << 4, NFC_V1_V2_BUF_ADDR);  in send_read_id_v1_v2()
633 	memcpy32_fromio(host->data_buf, host->main_area0, 16);  in send_read_id_v1_v2()
648 	void __iomem *main_buf = host->main_area0;  in get_dev_status_v1_v2()
652 	writew(host->active_cs << 4, NFC_V1_V2_BUF_ADDR);  in get_dev_status_v1_v2()
676 	if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST)  in mxc_nand_enable_hwecc_v1_v2()
694 	if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST)  in mxc_nand_enable_hwecc_v3()
715 	if (mtd->writesize)  in mxc_nand_read_page_v1()
716 		no_subpages = mtd->writesize >> 9;  in mxc_nand_read_page_v1()
718 		/* READ PARAMETER PAGE is called when mtd->writesize is not yet set */  in mxc_nand_read_page_v1()
723 		writew((host->active_cs << 4) | i, NFC_V1_V2_BUF_ADDR);  in mxc_nand_read_page_v1()
734 	host->ecc_stats_v1 = ecc_stats;  in mxc_nand_read_page_v1()
744 	host->devtype_data->send_page(mtd, NFC_OUTPUT);  in mxc_nand_read_page_v2_v3()
756 	host->devtype_data->enable_hwecc(chip, true);  in mxc_nand_read_page()
758 	ret = nand_read_page_op(chip, page, 0, buf, mtd->writesize);  in mxc_nand_read_page()
760 	host->devtype_data->enable_hwecc(chip, false);  in mxc_nand_read_page()
766 		copy_spare(mtd, true, chip->oob_poi);  in mxc_nand_read_page()
768 	return host->devtype_data->get_ecc_status(chip);  in mxc_nand_read_page()
777 	ret = nand_read_page_op(chip, page, 0, buf, mtd->writesize);  in mxc_nand_read_page_raw()
782 		copy_spare(mtd, true, chip->oob_poi);  in mxc_nand_read_page_raw()
793 	ret = nand_read_page_op(chip, page, 0, host->data_buf, mtd->writesize);  in mxc_nand_read_oob()
797 	copy_spare(mtd, true, chip->oob_poi);  in mxc_nand_read_oob()
809 	copy_spare(mtd, false, chip->oob_poi);  in mxc_nand_write_page_ecc()
811 	host->devtype_data->enable_hwecc(chip, true);  in mxc_nand_write_page_ecc()
813 	ret = nand_prog_page_op(chip, page, 0, buf, mtd->writesize);  in mxc_nand_write_page_ecc()
815 	host->devtype_data->enable_hwecc(chip, false);  in mxc_nand_write_page_ecc()
825 	copy_spare(mtd, false, chip->oob_poi);  in mxc_nand_write_page_raw()
827 	return nand_prog_page_op(chip, page, 0, buf, mtd->writesize);  in mxc_nand_write_page_raw()
835 	memset(host->data_buf, 0xff, mtd->writesize);  in mxc_nand_write_oob()
836 	copy_spare(mtd, false, chip->oob_poi);  in mxc_nand_write_oob()
838 	return nand_prog_page_op(chip, page, 0, host->data_buf, mtd->writesize);  in mxc_nand_write_oob()
847 	if (chip == -1) {  in mxc_nand_select_chip_v1_v3()
849 		if (host->clk_act) {  in mxc_nand_select_chip_v1_v3()
850 			clk_disable_unprepare(host->clk);  in mxc_nand_select_chip_v1_v3()
851 			host->clk_act = 0;  in mxc_nand_select_chip_v1_v3()
856 	if (!host->clk_act) {  in mxc_nand_select_chip_v1_v3()
858 		clk_prepare_enable(host->clk);  in mxc_nand_select_chip_v1_v3()
859 		host->clk_act = 1;  in mxc_nand_select_chip_v1_v3()
867 	if (chip == -1) {  in mxc_nand_select_chip_v2()
869 		if (host->clk_act) {  in mxc_nand_select_chip_v2()
870 			clk_disable_unprepare(host->clk);  in mxc_nand_select_chip_v2()
871 			host->clk_act = 0;  in mxc_nand_select_chip_v2()
876 	if (!host->clk_act) {  in mxc_nand_select_chip_v2()
878 		clk_prepare_enable(host->clk);  in mxc_nand_select_chip_v2()
879 		host->clk_act = 1;  in mxc_nand_select_chip_v2()
882 	host->active_cs = chip;  in mxc_nand_select_chip_v2()
883 	writew(host->active_cs << 4, NFC_V1_V2_BUF_ADDR);  in mxc_nand_select_chip_v2()
893 	if (section >= nand_chip->ecc.steps)  in mxc_v1_ooblayout_ecc()
894 		return -ERANGE;  in mxc_v1_ooblayout_ecc()
896 	oobregion->offset = (section * 16) + 6;  in mxc_v1_ooblayout_ecc()
897 	oobregion->length = MXC_V1_ECCBYTES;  in mxc_v1_ooblayout_ecc()
907 	if (section > nand_chip->ecc.steps)  in mxc_v1_ooblayout_free()
908 		return -ERANGE;  in mxc_v1_ooblayout_free()
911 		if (mtd->writesize <= 512) {  in mxc_v1_ooblayout_free()
912 			oobregion->offset = 0;  in mxc_v1_ooblayout_free()
913 			oobregion->length = 5;  in mxc_v1_ooblayout_free()
915 			oobregion->offset = 2;  in mxc_v1_ooblayout_free()
916 			oobregion->length = 4;  in mxc_v1_ooblayout_free()
919 		oobregion->offset = ((section - 1) * 16) + MXC_V1_ECCBYTES + 6;  in mxc_v1_ooblayout_free()
920 		if (section < nand_chip->ecc.steps)  in mxc_v1_ooblayout_free()
921 			oobregion->length = (section * 16) + 6 -  in mxc_v1_ooblayout_free()
922 					    oobregion->offset;  in mxc_v1_ooblayout_free()
924 			oobregion->length = mtd->oobsize - oobregion->offset;  in mxc_v1_ooblayout_free()
939 	int stepsize = nand_chip->ecc.bytes == 9 ? 16 : 26;  in mxc_v2_ooblayout_ecc()
941 	if (section >= nand_chip->ecc.steps)  in mxc_v2_ooblayout_ecc()
942 		return -ERANGE;  in mxc_v2_ooblayout_ecc()
944 	oobregion->offset = (section * stepsize) + 7;  in mxc_v2_ooblayout_ecc()
945 	oobregion->length = nand_chip->ecc.bytes;  in mxc_v2_ooblayout_ecc()
954 	int stepsize = nand_chip->ecc.bytes == 9 ? 16 : 26;  in mxc_v2_ooblayout_free()
956 	if (section >= nand_chip->ecc.steps)  in mxc_v2_ooblayout_free()
957 		return -ERANGE;  in mxc_v2_ooblayout_free()
960 		if (mtd->writesize <= 512) {  in mxc_v2_ooblayout_free()
961 			oobregion->offset = 0;  in mxc_v2_ooblayout_free()
962 			oobregion->length = 5;  in mxc_v2_ooblayout_free()
964 			oobregion->offset = 2;  in mxc_v2_ooblayout_free()
965 			oobregion->length = 4;  in mxc_v2_ooblayout_free()
968 		oobregion->offset = section * stepsize;  in mxc_v2_ooblayout_free()
969 		oobregion->length = 7;  in mxc_v2_ooblayout_free()
989 	oobbytes_per_512 = mtd->oobsize * 512 / mtd->writesize;  in get_eccsize()
1003 	if (nand_chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST &&  in preset_v1()
1004 	    mtd->writesize)  in preset_v1()
1007 	if (!host->devtype_data->irqpending_quirk)  in preset_v1()
1010 	host->eccsize = 1;  in preset_v1()
1037 		return -ENOTSUPP;  in mxc_nand_v2_setup_interface()
1041 	tRC_min_ns = timings->tRC_min / 1000;  in mxc_nand_v2_setup_interface()
1051 		rate_round = clk_round_rate(host->clk, rate);  in mxc_nand_v2_setup_interface()
1056 		rate_round = clk_round_rate(host->clk, rate);  in mxc_nand_v2_setup_interface()
1065 	if (timings->tCLS_min > tRC_ps - 1000 ||  in mxc_nand_v2_setup_interface()
1066 	    timings->tCLH_min > tRC_ps - 2000 ||  in mxc_nand_v2_setup_interface()
1067 	    timings->tCS_min > tRC_ps - 1000 ||  in mxc_nand_v2_setup_interface()
1068 	    timings->tCH_min > tRC_ps - 2000 ||  in mxc_nand_v2_setup_interface()
1069 	    timings->tWP_min > tRC_ps - 1500 ||  in mxc_nand_v2_setup_interface()
1070 	    timings->tALS_min > tRC_ps ||  in mxc_nand_v2_setup_interface()
1071 	    timings->tALH_min > tRC_ps - 3000 ||  in mxc_nand_v2_setup_interface()
1072 	    timings->tDS_min > tRC_ps ||  in mxc_nand_v2_setup_interface()
1073 	    timings->tDH_min > tRC_ps - 5000 ||  in mxc_nand_v2_setup_interface()
1074 	    timings->tWC_min > 2 * tRC_ps ||  in mxc_nand_v2_setup_interface()
1075 	    timings->tWH_min > tRC_ps - 2500 ||  in mxc_nand_v2_setup_interface()
1076 	    timings->tRR_min > 6 * tRC_ps ||  in mxc_nand_v2_setup_interface()
1077 	    timings->tRP_min > 3 * tRC_ps / 2 ||  in mxc_nand_v2_setup_interface()
1078 	    timings->tRC_min > 2 * tRC_ps ||  in mxc_nand_v2_setup_interface()
1079 	    timings->tREH_min > (tRC_ps / 2) - 2500) {  in mxc_nand_v2_setup_interface()
1080 		dev_dbg(host->dev, "Timing out of bounds\n");  in mxc_nand_v2_setup_interface()
1081 		return -EINVAL;  in mxc_nand_v2_setup_interface()
1087 	ret = clk_set_rate(host->clk, rate);  in mxc_nand_v2_setup_interface()
1093 	dev_dbg(host->dev, "Setting rate to %ldHz, %s mode\n", rate_round,  in mxc_nand_v2_setup_interface()
1108 	if (!host->devtype_data->irqpending_quirk)  in preset_v2()
1111 	if (mtd->writesize) {  in preset_v2()
1112 		uint16_t pages_per_block = mtd->erasesize / mtd->writesize;  in preset_v2()
1114 		if (nand_chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST)  in preset_v2()
1117 		host->eccsize = get_eccsize(mtd);  in preset_v2()
1118 		if (host->eccsize == 4)  in preset_v2()
1121 		config1 |= NFC_V2_CONFIG1_PPB(ffs(pages_per_block) - 6);  in preset_v2()
1123 		host->eccsize = 1;  in preset_v2()
1129 	/* spare area size in 16-bit half-words */  in preset_v2()
1130 	writew(mtd->oobsize / 2, NFC_V21_RSLTSPARE_AREA);  in preset_v2()
1171 		NFC_V3_CONFIG2_SPAS(mtd->oobsize >> 1) |  in preset_v3()
1176 	addr_phases = fls(chip->pagemask) >> 3;  in preset_v3()
1178 	if (mtd->writesize == 2048) {  in preset_v3()
1181 	} else if (mtd->writesize == 4096) {  in preset_v3()
1186 		config2 |= NFC_V3_CONFIG2_NUM_ADDR_PHASE1(addr_phases - 1);  in preset_v3()
1189 	if (mtd->writesize) {  in preset_v3()
1190 		if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST)  in preset_v3()
1194 				ffs(mtd->erasesize / mtd->writesize) - 6,  in preset_v3()
1195 				host->devtype_data->ppb_shift);  in preset_v3()
1196 		host->eccsize = get_eccsize(mtd);  in preset_v3()
1197 		if (host->eccsize == 8)  in preset_v3()
1209 	if (!(chip->options & NAND_BUSWIDTH_16))  in preset_v3()
1373 	return host->devtype_data == &imx21_nand_devtype_data;  in is_imx21_nfc()
1378 	return host->devtype_data == &imx27_nand_devtype_data;  in is_imx27_nfc()
1383 	return host->devtype_data == &imx25_nand_devtype_data;  in is_imx25_nfc()
1387 	{ .compatible = "fsl,imx21-nand", .data = &imx21_nand_devtype_data, },
1388 	{ .compatible = "fsl,imx27-nand", .data = &imx27_nand_devtype_data, },
1389 	{ .compatible = "fsl,imx25-nand", .data = &imx25_nand_devtype_data, },
1390 	{ .compatible = "fsl,imx51-nand", .data = &imx51_nand_devtype_data, },
1391 	{ .compatible = "fsl,imx53-nand", .data = &imx53_nand_devtype_data, },
1400 	struct device *dev = mtd->dev.parent;  in mxcnd_attach_chip()
1402 	chip->ecc.bytes = host->devtype_data->eccbytes;  in mxcnd_attach_chip()
1403 	host->eccsize = host->devtype_data->eccsize;  in mxcnd_attach_chip()
1404 	chip->ecc.size = 512;  in mxcnd_attach_chip()
1406 	switch (chip->ecc.engine_type) {  in mxcnd_attach_chip()
1408 		mtd_set_ooblayout(mtd, host->devtype_data->ooblayout);  in mxcnd_attach_chip()
1409 		chip->ecc.read_page = mxc_nand_read_page;  in mxcnd_attach_chip()
1410 		chip->ecc.read_page_raw = mxc_nand_read_page_raw;  in mxcnd_attach_chip()
1411 		chip->ecc.read_oob = mxc_nand_read_oob;  in mxcnd_attach_chip()
1412 		chip->ecc.write_page = mxc_nand_write_page_ecc;  in mxcnd_attach_chip()
1413 		chip->ecc.write_page_raw = mxc_nand_write_page_raw;  in mxcnd_attach_chip()
1414 		chip->ecc.write_oob = mxc_nand_write_oob;  in mxcnd_attach_chip()
1418 		chip->ecc.write_page_raw = nand_monolithic_write_page_raw;  in mxcnd_attach_chip()
1419 		chip->ecc.read_page_raw = nand_monolithic_read_page_raw;  in mxcnd_attach_chip()
1423 		return -EINVAL;  in mxcnd_attach_chip()
1426 	if (chip->bbt_options & NAND_BBT_USE_FLASH) {  in mxcnd_attach_chip()
1427 		chip->bbt_td = &bbt_main_descr;  in mxcnd_attach_chip()
1428 		chip->bbt_md = &bbt_mirror_descr;  in mxcnd_attach_chip()
1432 	devm_kfree(dev, (void *)host->data_buf);  in mxcnd_attach_chip()
1433 	host->data_buf = devm_kzalloc(dev, mtd->writesize + mtd->oobsize,  in mxcnd_attach_chip()
1435 	if (!host->data_buf)  in mxcnd_attach_chip()
1436 		return -ENOMEM;  in mxcnd_attach_chip()
1439 	host->devtype_data->preset(mtd);  in mxcnd_attach_chip()
1441 	if (!chip->ecc.bytes) {  in mxcnd_attach_chip()
1442 		if (host->eccsize == 8)  in mxcnd_attach_chip()
1443 			chip->ecc.bytes = 18;  in mxcnd_attach_chip()
1444 		else if (host->eccsize == 4)  in mxcnd_attach_chip()
1445 			chip->ecc.bytes = 9;  in mxcnd_attach_chip()
1452 	 * might cause ECC data corruption when doing sub-page write to a  in mxcnd_attach_chip()
1455 	host->used_oobsize = min(mtd->oobsize, 218U);  in mxcnd_attach_chip()
1457 	if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST) {  in mxcnd_attach_chip()
1459 			chip->ecc.strength = 1;  in mxcnd_attach_chip()
1461 			chip->ecc.strength = (host->eccsize == 4) ? 4 : 8;  in mxcnd_attach_chip()
1472 	return host->devtype_data->setup_interface(chip, chipnr, conf);  in mxcnd_setup_interface()
1488 	unsigned int no_subpages = mtd->writesize / 512;  in copy_page_to_sram()
1491 	oob_per_subpage = (mtd->oobsize / no_subpages) & ~1;  in copy_page_to_sram()
1511 			memcpy16_toio(host->main_area0 + i * 512, buf, now);  in copy_page_to_sram()
1514 			memff16_toio(host->main_area0 + i * 512 + now, 512 - now);  in copy_page_to_sram()
1517 		buf_len -= now;  in copy_page_to_sram()
1521 			memcpy16_toio(host->spare0 + i * host->devtype_data->spare_len,  in copy_page_to_sram()
1525 			memff16_toio(host->spare0 + i * host->devtype_data->spare_len + now,  in copy_page_to_sram()
1526 				     oob_per_subpage - now);  in copy_page_to_sram()
1529 		buf_len -= now;  in copy_page_to_sram()
1537 	void *buf = host->data_buf;  in copy_page_from_sram()
1538 	unsigned int no_subpages = mtd->writesize / 512;  in copy_page_from_sram()
1541 	/* mtd->writesize is not set during ident scanning */  in copy_page_from_sram()
1545 	oob_per_subpage = (mtd->oobsize / no_subpages) & ~1;  in copy_page_from_sram()
1548 		memcpy16_fromio(buf, host->main_area0 + i * 512, 512);  in copy_page_from_sram()
1551 		memcpy16_fromio(buf, host->spare0 + i * host->devtype_data->spare_len,  in copy_page_from_sram()
1569 	for (i = 0; i < op->ninstrs; i++) {  in mxcnd_do_exec_op()
1570 		instr = &op->instrs[i];  in mxcnd_do_exec_op()
1572 		switch (instr->type) {  in mxcnd_do_exec_op()
1577 			host->devtype_data->send_cmd(host, instr->ctx.cmd.opcode, true);  in mxcnd_do_exec_op()
1579 			if (instr->ctx.cmd.opcode == NAND_CMD_READID)  in mxcnd_do_exec_op()
1581 			if (instr->ctx.cmd.opcode == NAND_CMD_STATUS)  in mxcnd_do_exec_op()
1586 			for (j = 0; j < instr->ctx.addr.naddrs; j++) {  in mxcnd_do_exec_op()
1587 				bool islast = j == instr->ctx.addr.naddrs - 1;  in mxcnd_do_exec_op()
1588 				host->devtype_data->send_addr(host, instr->ctx.addr.addrs[j], islast);  in mxcnd_do_exec_op()
1592 			buf_write = instr->ctx.data.buf.out;  in mxcnd_do_exec_op()
1593 			buf_len = instr->ctx.data.len;  in mxcnd_do_exec_op()
1595 			if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST)  in mxcnd_do_exec_op()
1596 				memcpy32_toio(host->main_area0, buf_write, buf_len);  in mxcnd_do_exec_op()
1600 			host->devtype_data->send_page(mtd, NFC_INPUT);  in mxcnd_do_exec_op()
1605 			buf_read = instr->ctx.data.buf.in;  in mxcnd_do_exec_op()
1606 			buf_len = instr->ctx.data.len;  in mxcnd_do_exec_op()
1609 				host->devtype_data->send_read_id(host);  in mxcnd_do_exec_op()
1612 				memcpy32_fromio(host->data_buf, host->main_area0, buf_len * 2);  in mxcnd_do_exec_op()
1614 				if (chip->options & NAND_BUSWIDTH_16) {  in mxcnd_do_exec_op()
1616 					u16 *bufw = host->data_buf;  in mxcnd_do_exec_op()
1620 					memcpy(buf_read, host->data_buf, buf_len);  in mxcnd_do_exec_op()
1626 				*(u8*)buf_read = host->devtype_data->get_dev_status(host);  in mxcnd_do_exec_op()
1631 			host->devtype_data->read_page(chip);  in mxcnd_do_exec_op()
1633 			if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST) {  in mxcnd_do_exec_op()
1635 					memcpy32_fromio(buf_read, host->main_area0, buf_len);  in mxcnd_do_exec_op()
1637 					memcpy32_fromio(host->data_buf, host->main_area0, mtd->writesize);  in mxcnd_do_exec_op()
1638 					memcpy(buf_read, host->data_buf, buf_len);  in mxcnd_do_exec_op()
1642 				memcpy(buf_read, host->data_buf, buf_len);  in mxcnd_do_exec_op()
1696 	host = devm_kzalloc(&pdev->dev, sizeof(struct mxc_nand_host),  in mxcnd_probe()
1699 		return -ENOMEM;  in mxcnd_probe()
1702 	host->data_buf = devm_kzalloc(&pdev->dev, PAGE_SIZE, GFP_KERNEL);  in mxcnd_probe()
1703 	if (!host->data_buf)  in mxcnd_probe()
1704 		return -ENOMEM;  in mxcnd_probe()
1706 	host->dev = &pdev->dev;  in mxcnd_probe()
1708 	this = &host->nand;  in mxcnd_probe()
1710 	mtd->dev.parent = &pdev->dev;  in mxcnd_probe()
1711 	mtd->name = DRIVER_NAME;  in mxcnd_probe()
1714 	this->legacy.chip_delay = 5;  in mxcnd_probe()
1717 	nand_set_flash_node(this, pdev->dev.of_node);  in mxcnd_probe()
1719 	host->clk = devm_clk_get(&pdev->dev, NULL);  in mxcnd_probe()
1720 	if (IS_ERR(host->clk))  in mxcnd_probe()
1721 		return PTR_ERR(host->clk);  in mxcnd_probe()
1723 	host->devtype_data = device_get_match_data(&pdev->dev);  in mxcnd_probe()
1725 	if (!host->devtype_data->setup_interface)  in mxcnd_probe()
1726 		this->options |= NAND_KEEP_TIMINGS;  in mxcnd_probe()
1728 	if (host->devtype_data->needs_ip) {  in mxcnd_probe()
1729 		host->regs_ip = devm_platform_ioremap_resource(pdev, 0);  in mxcnd_probe()
1730 		if (IS_ERR(host->regs_ip))  in mxcnd_probe()
1731 			return PTR_ERR(host->regs_ip);  in mxcnd_probe()
1733 		host->base = devm_platform_ioremap_resource(pdev, 1);  in mxcnd_probe()
1735 		host->base = devm_platform_ioremap_resource(pdev, 0);  in mxcnd_probe()
1738 	if (IS_ERR(host->base))  in mxcnd_probe()
1739 		return PTR_ERR(host->base);  in mxcnd_probe()
1741 	host->main_area0 = host->base;  in mxcnd_probe()
1743 	if (host->devtype_data->regs_offset)  in mxcnd_probe()
1744 		host->regs = host->base + host->devtype_data->regs_offset;  in mxcnd_probe()
1745 	host->spare0 = host->base + host->devtype_data->spare0_offset;  in mxcnd_probe()
1746 	if (host->devtype_data->axi_offset)  in mxcnd_probe()
1747 		host->regs_axi = host->base + host->devtype_data->axi_offset;  in mxcnd_probe()
1749 	this->legacy.select_chip = host->devtype_data->select_chip;  in mxcnd_probe()
1751 	init_completion(&host->op_completion);  in mxcnd_probe()
1753 	host->irq = platform_get_irq(pdev, 0);  in mxcnd_probe()
1754 	if (host->irq < 0)  in mxcnd_probe()
1755 		return host->irq;  in mxcnd_probe()
1758 	 * Use host->devtype_data->irq_control() here instead of irq_control()  in mxcnd_probe()
1762 	host->devtype_data->irq_control(host, 0);  in mxcnd_probe()
1764 	err = devm_request_irq(&pdev->dev, host->irq, mxc_nfc_irq,  in mxcnd_probe()
1769 	err = clk_prepare_enable(host->clk);  in mxcnd_probe()
1772 	host->clk_act = 1;  in mxcnd_probe()
1779 	if (host->devtype_data->irqpending_quirk) {  in mxcnd_probe()
1780 		disable_irq_nosync(host->irq);  in mxcnd_probe()
1781 		host->devtype_data->irq_control(host, 1);  in mxcnd_probe()
1785 	this->legacy.dummy_controller.ops = &mxcnd_controller_ops;  in mxcnd_probe()
1802 	if (host->clk_act)  in mxcnd_probe()
1803 		clk_disable_unprepare(host->clk);  in mxcnd_probe()
1811 	struct nand_chip *chip = &host->nand;  in mxcnd_remove()
1817 	if (host->clk_act)  in mxcnd_remove()
1818 		clk_disable_unprepare(host->clk);  in mxcnd_remove()