Lines Matching +full:nand +full:- +full:ecc +full:- +full:algo
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2004-2008 Freescale Semiconductor, Inc.
127 return in_be16(prv->regs + reg); in nfc_read()
136 out_be16(prv->regs + reg, val); in nfc_write()
167 /* Send data from NFC buffers to NAND flash */
175 /* Receive data from NAND flash */
183 /* Receive ID from NAND flash */
191 /* Receive status from NAND flash */
207 wake_up(&prv->irq_waitq); in mpc5121_nfc_irq()
221 rv = wait_event_timeout(prv->irq_waitq, in mpc5121_nfc_done()
225 dev_warn(prv->dev, in mpc5121_nfc_done()
236 u32 pagemask = chip->pagemask; in mpc5121_nfc_addr_cycle()
238 if (column != -1) { in mpc5121_nfc_addr_cycle()
240 if (mtd->writesize > 512) in mpc5121_nfc_addr_cycle()
244 if (page != -1) { in mpc5121_nfc_addr_cycle()
254 static void mpc5121_nfc_select_chip(struct nand_chip *nand, int chip) in mpc5121_nfc_select_chip() argument
256 struct mtd_info *mtd = nand_to_mtd(nand); in mpc5121_nfc_select_chip()
276 dn = of_find_compatible_node(NULL, NULL, "fsl,mpc5121ads-cpld"); in ads5121_chipselect_init()
278 prv->csreg = of_iomap(dn, 0); in ads5121_chipselect_init()
280 if (!prv->csreg) in ads5121_chipselect_init()
281 return -ENOMEM; in ads5121_chipselect_init()
283 /* CPLD Register 9 controls NAND /CE Lines */ in ads5121_chipselect_init()
284 prv->csreg += 9; in ads5121_chipselect_init()
288 return -EINVAL; in ads5121_chipselect_init()
292 static void ads5121_select_chip(struct nand_chip *nand, int chip) in ads5121_select_chip() argument
294 struct mpc5121_nfc_prv *prv = nand_get_controller_data(nand); in ads5121_select_chip()
297 v = in_8(prv->csreg); in ads5121_select_chip()
301 mpc5121_nfc_select_chip(nand, 0); in ads5121_select_chip()
304 mpc5121_nfc_select_chip(nand, -1); in ads5121_select_chip()
306 out_8(prv->csreg, v); in ads5121_select_chip()
309 /* Read NAND Ready/Busy signal */
310 static int mpc5121_nfc_dev_ready(struct nand_chip *nand) in mpc5121_nfc_dev_ready() argument
319 /* Write command to NAND flash */
326 prv->column = (column >= 0) ? column : 0; in mpc5121_nfc_command()
327 prv->spareonly = 0; in mpc5121_nfc_command()
334 * NFC does not support sub-page reads and writes, in mpc5121_nfc_command()
342 prv->column += 256; in mpc5121_nfc_command()
348 prv->spareonly = 1; in mpc5121_nfc_command()
373 if (mtd->writesize > 512) in mpc5121_nfc_command()
384 if (chip->options & NAND_BUSWIDTH_16) in mpc5121_nfc_command()
385 prv->column = 1; in mpc5121_nfc_command()
387 prv->column = 0; in mpc5121_nfc_command()
396 struct nand_chip *nand = mtd_to_nand(mtd); in mpc5121_nfc_copy_spare() local
397 struct mpc5121_nfc_prv *prv = nand_get_controller_data(nand); in mpc5121_nfc_copy_spare()
401 * NAND spare area is available through NFC spare buffers. in mpc5121_nfc_copy_spare()
406 * For NAND device in which the spare area is not divided fully in mpc5121_nfc_copy_spare()
416 sbsize = (mtd->oobsize / (mtd->writesize / 512)) & ~1; in mpc5121_nfc_copy_spare()
421 if (s > NFC_SPARE_BUFFERS - 1) in mpc5121_nfc_copy_spare()
422 s = NFC_SPARE_BUFFERS - 1; in mpc5121_nfc_copy_spare()
428 o = offset - (s * sbsize); in mpc5121_nfc_copy_spare()
429 blksize = min(sbsize - o, size); in mpc5121_nfc_copy_spare()
432 memcpy_toio(prv->regs + NFC_SPARE_AREA(s) + o, in mpc5121_nfc_copy_spare()
436 prv->regs + NFC_SPARE_AREA(s) + o, blksize); in mpc5121_nfc_copy_spare()
440 size -= blksize; in mpc5121_nfc_copy_spare()
450 uint c = prv->column; in mpc5121_nfc_buf_copy()
454 if (prv->spareonly || c >= mtd->writesize) { in mpc5121_nfc_buf_copy()
456 if (c >= mtd->writesize) in mpc5121_nfc_buf_copy()
457 c -= mtd->writesize; in mpc5121_nfc_buf_copy()
459 prv->column += len; in mpc5121_nfc_buf_copy()
465 * Handle main area access - limit copy length to prevent in mpc5121_nfc_buf_copy()
468 l = min((uint)len, mtd->writesize - c); in mpc5121_nfc_buf_copy()
469 prv->column += l; in mpc5121_nfc_buf_copy()
472 memcpy_toio(prv->regs + NFC_MAIN_AREA(0) + c, buf, l); in mpc5121_nfc_buf_copy()
474 memcpy_fromio(buf, prv->regs + NFC_MAIN_AREA(0) + c, l); in mpc5121_nfc_buf_copy()
479 len -= l; in mpc5121_nfc_buf_copy()
511 * in Reset Config Word. There is no other way to set NAND block
527 rmnode = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-reset"); in mpc5121_nfc_read_hw_config()
529 dev_err(prv->dev, "Missing 'fsl,mpc5121-reset' " in mpc5121_nfc_read_hw_config()
531 return -ENODEV; in mpc5121_nfc_read_hw_config()
536 dev_err(prv->dev, "Error mapping reset module node!\n"); in mpc5121_nfc_read_hw_config()
537 ret = -EBUSY; in mpc5121_nfc_read_hw_config()
541 rcwh = in_be32(&rm->rcwhr); in mpc5121_nfc_read_hw_config()
576 mtd->writesize = rcw_pagesize; in mpc5121_nfc_read_hw_config()
577 mtd->oobsize = rcw_sparesize; in mpc5121_nfc_read_hw_config()
579 chip->options |= NAND_BUSWIDTH_16; in mpc5121_nfc_read_hw_config()
581 dev_notice(prv->dev, "Configured for " in mpc5121_nfc_read_hw_config()
582 "%u-bit NAND, page size %u " in mpc5121_nfc_read_hw_config()
598 if (prv->csreg) in mpc5121_nfc_free()
599 iounmap(prv->csreg); in mpc5121_nfc_free()
604 if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_SOFT && in mpc5121_nfc_attach_chip()
605 chip->ecc.algo == NAND_ECC_ALGO_UNKNOWN) in mpc5121_nfc_attach_chip()
606 chip->ecc.algo = NAND_ECC_ALGO_HAMMING; in mpc5121_nfc_attach_chip()
617 struct device_node *dn = op->dev.of_node; in mpc5121_nfc_probe()
619 struct device *dev = &op->dev; in mpc5121_nfc_probe()
637 return -ENXIO; in mpc5121_nfc_probe()
642 return -ENOMEM; in mpc5121_nfc_probe()
644 chip = &prv->chip; in mpc5121_nfc_probe()
647 nand_controller_init(&prv->controller); in mpc5121_nfc_probe()
648 prv->controller.ops = &mpc5121_nfc_ops; in mpc5121_nfc_probe()
649 chip->controller = &prv->controller; in mpc5121_nfc_probe()
651 mtd->dev.parent = dev; in mpc5121_nfc_probe()
654 prv->dev = dev; in mpc5121_nfc_probe()
663 prv->irq = irq_of_parse_and_map(dn, 0); in mpc5121_nfc_probe()
664 if (!prv->irq) { in mpc5121_nfc_probe()
666 return -EINVAL; in mpc5121_nfc_probe()
678 return -EINVAL; in mpc5121_nfc_probe()
686 return -EBUSY; in mpc5121_nfc_probe()
689 prv->regs = devm_ioremap(dev, regs_paddr, regs_size); in mpc5121_nfc_probe()
690 if (!prv->regs) { in mpc5121_nfc_probe()
692 return -ENOMEM; in mpc5121_nfc_probe()
695 mtd->name = "MPC5121 NAND"; in mpc5121_nfc_probe()
696 chip->legacy.dev_ready = mpc5121_nfc_dev_ready; in mpc5121_nfc_probe()
697 chip->legacy.cmdfunc = mpc5121_nfc_command; in mpc5121_nfc_probe()
698 chip->legacy.read_byte = mpc5121_nfc_read_byte; in mpc5121_nfc_probe()
699 chip->legacy.read_buf = mpc5121_nfc_read_buf; in mpc5121_nfc_probe()
700 chip->legacy.write_buf = mpc5121_nfc_write_buf; in mpc5121_nfc_probe()
701 chip->legacy.select_chip = mpc5121_nfc_select_chip; in mpc5121_nfc_probe()
702 chip->legacy.set_features = nand_get_set_features_notsupp; in mpc5121_nfc_probe()
703 chip->legacy.get_features = nand_get_set_features_notsupp; in mpc5121_nfc_probe()
704 chip->bbt_options = NAND_BBT_USE_FLASH; in mpc5121_nfc_probe()
706 /* Support external chip-select logic on ADS5121 board */ in mpc5121_nfc_probe()
714 chip->legacy.select_chip = ads5121_select_chip; in mpc5121_nfc_probe()
724 prv->clk = clk; in mpc5121_nfc_probe()
726 /* Reset NAND Flash controller */ in mpc5121_nfc_probe()
731 retval = -EINVAL; in mpc5121_nfc_probe()
741 /* Enable write to all NAND pages */ in mpc5121_nfc_probe()
748 * - Big Endian transfers, in mpc5121_nfc_probe()
749 * - Interrupt after full page read/write. in mpc5121_nfc_probe()
755 nfc_write(mtd, NFC_SPAS, mtd->oobsize >> 1); in mpc5121_nfc_probe()
757 init_waitqueue_head(&prv->irq_waitq); in mpc5121_nfc_probe()
758 retval = devm_request_irq(dev, prv->irq, &mpc5121_nfc_irq, 0, DRV_NAME, in mpc5121_nfc_probe()
766 * This driver assumes that the default ECC engine should be TYPE_SOFT. in mpc5121_nfc_probe()
767 * Set ->engine_type before registering the NAND devices in order to in mpc5121_nfc_probe()
770 chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT; in mpc5121_nfc_probe()
772 /* Detect NAND chips */ in mpc5121_nfc_probe()
775 dev_err(dev, "NAND Flash not found !\n"); in mpc5121_nfc_probe()
780 switch (mtd->erasesize / mtd->writesize) { in mpc5121_nfc_probe()
798 dev_err(dev, "Unsupported NAND flash!\n"); in mpc5121_nfc_probe()
799 retval = -ENXIO; in mpc5121_nfc_probe()
820 struct device *dev = &op->dev; in mpc5121_nfc_remove()
831 { .compatible = "fsl,mpc5121-nfc", },
848 MODULE_DESCRIPTION("MPC5121 NAND MTD driver");