Lines Matching refs:nfc
516 static void marvell_nfc_disable_int(struct marvell_nfc *nfc, u32 int_mask) in marvell_nfc_disable_int() argument
521 reg = readl_relaxed(nfc->regs + NDCR); in marvell_nfc_disable_int()
522 writel_relaxed(reg | int_mask, nfc->regs + NDCR); in marvell_nfc_disable_int()
525 static void marvell_nfc_enable_int(struct marvell_nfc *nfc, u32 int_mask) in marvell_nfc_enable_int() argument
530 reg = readl_relaxed(nfc->regs + NDCR); in marvell_nfc_enable_int()
531 writel_relaxed(reg & ~int_mask, nfc->regs + NDCR); in marvell_nfc_enable_int()
534 static u32 marvell_nfc_clear_int(struct marvell_nfc *nfc, u32 int_mask) in marvell_nfc_clear_int() argument
538 reg = readl_relaxed(nfc->regs + NDSR); in marvell_nfc_clear_int()
539 writel_relaxed(int_mask, nfc->regs + NDSR); in marvell_nfc_clear_int()
547 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_force_byte_access() local
559 ndcr = readl_relaxed(nfc->regs + NDCR); in marvell_nfc_force_byte_access()
566 writel_relaxed(ndcr, nfc->regs + NDCR); in marvell_nfc_force_byte_access()
571 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_wait_ndrun() local
579 ret = readl_relaxed_poll_timeout(nfc->regs + NDCR, val, in marvell_nfc_wait_ndrun()
583 dev_err(nfc->dev, "Timeout on NAND controller run mode\n"); in marvell_nfc_wait_ndrun()
584 writel_relaxed(readl(nfc->regs + NDCR) & ~NDCR_ND_RUN, in marvell_nfc_wait_ndrun()
585 nfc->regs + NDCR); in marvell_nfc_wait_ndrun()
609 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_prepare_cmd() local
616 dev_err(nfc->dev, "Last operation did not succeed\n"); in marvell_nfc_prepare_cmd()
620 ndcr = readl_relaxed(nfc->regs + NDCR); in marvell_nfc_prepare_cmd()
621 writel_relaxed(readl(nfc->regs + NDSR), nfc->regs + NDSR); in marvell_nfc_prepare_cmd()
624 writel_relaxed(ndcr | NDCR_ND_RUN, nfc->regs + NDCR); in marvell_nfc_prepare_cmd()
625 ret = readl_relaxed_poll_timeout(nfc->regs + NDSR, val, in marvell_nfc_prepare_cmd()
629 dev_err(nfc->dev, "Timeout on WRCMDRE\n"); in marvell_nfc_prepare_cmd()
634 writel_relaxed(NDSR_WRCMDREQ, nfc->regs + NDSR); in marvell_nfc_prepare_cmd()
643 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_send_cmd() local
645 dev_dbg(nfc->dev, "\nNDCR: 0x%08x\n" in marvell_nfc_send_cmd()
647 (u32)readl_relaxed(nfc->regs + NDCR), nfc_op->ndcb[0], in marvell_nfc_send_cmd()
651 nfc->regs + NDCB0); in marvell_nfc_send_cmd()
652 writel_relaxed(nfc_op->ndcb[1], nfc->regs + NDCB0); in marvell_nfc_send_cmd()
653 writel(nfc_op->ndcb[2], nfc->regs + NDCB0); in marvell_nfc_send_cmd()
661 if (!WARN_ON_ONCE(!nfc->caps->is_nfcv2)) in marvell_nfc_send_cmd()
662 writel(nfc_op->ndcb[3], nfc->regs + NDCB0); in marvell_nfc_send_cmd()
669 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_end_cmd() local
673 ret = readl_relaxed_poll_timeout(nfc->regs + NDSR, val, in marvell_nfc_end_cmd()
678 dev_err(nfc->dev, "Timeout on %s (NDSR: 0x%08x)\n", in marvell_nfc_end_cmd()
680 if (nfc->dma_chan) in marvell_nfc_end_cmd()
681 dmaengine_terminate_all(nfc->dma_chan); in marvell_nfc_end_cmd()
689 if (nfc->use_dma && (readl_relaxed(nfc->regs + NDCR) & NDCR_DMA_EN)) in marvell_nfc_end_cmd()
692 writel_relaxed(flag, nfc->regs + NDSR); in marvell_nfc_end_cmd()
705 static int marvell_nfc_poll_status(struct marvell_nfc *nfc, u32 mask, in marvell_nfc_poll_status() argument
713 st = readl_relaxed(nfc->regs + NDSR); in marvell_nfc_poll_status()
728 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_wait_op() local
738 ret = marvell_nfc_poll_status(nfc, NDSR_RDY(0), in marvell_nfc_wait_op()
742 init_completion(&nfc->complete); in marvell_nfc_wait_op()
744 marvell_nfc_enable_int(nfc, NDCR_RDYM); in marvell_nfc_wait_op()
745 ret = wait_for_completion_timeout(&nfc->complete, in marvell_nfc_wait_op()
747 marvell_nfc_disable_int(nfc, NDCR_RDYM); in marvell_nfc_wait_op()
749 pending = marvell_nfc_clear_int(nfc, NDSR_RDY(0) | NDSR_RDY(1)); in marvell_nfc_wait_op()
756 dev_err(nfc->dev, "Timeout waiting for RB signal\n"); in marvell_nfc_wait_op()
767 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_select_target() local
774 ndcr_generic = readl_relaxed(nfc->regs + NDCR) & in marvell_nfc_select_target()
776 writel_relaxed(ndcr_generic | marvell_nand->ndcr, nfc->regs + NDCR); in marvell_nfc_select_target()
779 marvell_nfc_clear_int(nfc, NDCR_ALL_INT); in marvell_nfc_select_target()
781 if (chip == nfc->selected_chip && die_nr == marvell_nand->selected_die) in marvell_nfc_select_target()
784 writel_relaxed(marvell_nand->ndtr0, nfc->regs + NDTR0); in marvell_nfc_select_target()
785 writel_relaxed(marvell_nand->ndtr1, nfc->regs + NDTR1); in marvell_nfc_select_target()
787 nfc->selected_chip = chip; in marvell_nfc_select_target()
793 struct marvell_nfc *nfc = dev_id; in marvell_nfc_isr() local
794 u32 st = readl_relaxed(nfc->regs + NDSR); in marvell_nfc_isr()
795 u32 ien = (~readl_relaxed(nfc->regs + NDCR)) & NDCR_ALL_INT; in marvell_nfc_isr()
807 marvell_nfc_disable_int(nfc, st & NDCR_ALL_INT); in marvell_nfc_isr()
810 complete(&nfc->complete); in marvell_nfc_isr()
818 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_enable_hw_ecc() local
819 u32 ndcr = readl_relaxed(nfc->regs + NDCR); in marvell_nfc_enable_hw_ecc()
822 writel_relaxed(ndcr | NDCR_ECC_EN, nfc->regs + NDCR); in marvell_nfc_enable_hw_ecc()
829 writel_relaxed(NDECCCTRL_BCH_EN, nfc->regs + NDECCCTRL); in marvell_nfc_enable_hw_ecc()
835 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_disable_hw_ecc() local
836 u32 ndcr = readl_relaxed(nfc->regs + NDCR); in marvell_nfc_disable_hw_ecc()
839 writel_relaxed(ndcr & ~NDCR_ECC_EN, nfc->regs + NDCR); in marvell_nfc_disable_hw_ecc()
841 writel_relaxed(0, nfc->regs + NDECCCTRL); in marvell_nfc_disable_hw_ecc()
846 static void marvell_nfc_enable_dma(struct marvell_nfc *nfc) in marvell_nfc_enable_dma() argument
850 reg = readl_relaxed(nfc->regs + NDCR); in marvell_nfc_enable_dma()
851 writel_relaxed(reg | NDCR_DMA_EN, nfc->regs + NDCR); in marvell_nfc_enable_dma()
854 static void marvell_nfc_disable_dma(struct marvell_nfc *nfc) in marvell_nfc_disable_dma() argument
858 reg = readl_relaxed(nfc->regs + NDCR); in marvell_nfc_disable_dma()
859 writel_relaxed(reg & ~NDCR_DMA_EN, nfc->regs + NDCR); in marvell_nfc_disable_dma()
863 static int marvell_nfc_xfer_data_dma(struct marvell_nfc *nfc, in marvell_nfc_xfer_data_dma() argument
873 marvell_nfc_enable_dma(nfc); in marvell_nfc_xfer_data_dma()
875 sg_init_one(&sg, nfc->dma_buf, dma_len); in marvell_nfc_xfer_data_dma()
876 ret = dma_map_sg(nfc->dma_chan->device->dev, &sg, 1, direction); in marvell_nfc_xfer_data_dma()
878 dev_err(nfc->dev, "Could not map DMA S/G list\n"); in marvell_nfc_xfer_data_dma()
882 tx = dmaengine_prep_slave_sg(nfc->dma_chan, &sg, 1, in marvell_nfc_xfer_data_dma()
887 dev_err(nfc->dev, "Could not prepare DMA S/G list\n"); in marvell_nfc_xfer_data_dma()
888 dma_unmap_sg(nfc->dma_chan->device->dev, &sg, 1, direction); in marvell_nfc_xfer_data_dma()
898 dma_async_issue_pending(nfc->dma_chan); in marvell_nfc_xfer_data_dma()
899 ret = marvell_nfc_wait_cmdd(nfc->selected_chip); in marvell_nfc_xfer_data_dma()
900 dma_unmap_sg(nfc->dma_chan->device->dev, &sg, 1, direction); in marvell_nfc_xfer_data_dma()
901 marvell_nfc_disable_dma(nfc); in marvell_nfc_xfer_data_dma()
903 dev_err(nfc->dev, "Timeout waiting for DMA (status: %d)\n", in marvell_nfc_xfer_data_dma()
904 dmaengine_tx_status(nfc->dma_chan, cookie, NULL)); in marvell_nfc_xfer_data_dma()
905 dmaengine_terminate_all(nfc->dma_chan); in marvell_nfc_xfer_data_dma()
912 static int marvell_nfc_xfer_data_in_pio(struct marvell_nfc *nfc, u8 *in, in marvell_nfc_xfer_data_in_pio() argument
920 ioread32_rep(nfc->regs + NDDB, in + i, FIFO_REP(FIFO_DEPTH)); in marvell_nfc_xfer_data_in_pio()
925 ioread32_rep(nfc->regs + NDDB, tmp_buf, FIFO_REP(FIFO_DEPTH)); in marvell_nfc_xfer_data_in_pio()
932 static int marvell_nfc_xfer_data_out_pio(struct marvell_nfc *nfc, const u8 *out, in marvell_nfc_xfer_data_out_pio() argument
940 iowrite32_rep(nfc->regs + NDDB, out + i, FIFO_REP(FIFO_DEPTH)); in marvell_nfc_xfer_data_out_pio()
946 iowrite32_rep(nfc->regs + NDDB, tmp_buf, FIFO_REP(FIFO_DEPTH)); in marvell_nfc_xfer_data_out_pio()
996 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_hw_ecc_check_bitflips() local
1000 ndsr = readl_relaxed(nfc->regs + NDSR); in marvell_nfc_hw_ecc_check_bitflips()
1004 writel_relaxed(ndsr, nfc->regs + NDSR); in marvell_nfc_hw_ecc_check_bitflips()
1018 writel_relaxed(ndsr, nfc->regs + NDSR); in marvell_nfc_hw_ecc_check_bitflips()
1039 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_hw_ecc_hmg_do_read_page() local
1054 if (nfc->caps->is_nfcv2) in marvell_nfc_hw_ecc_hmg_do_read_page()
1073 if (nfc->use_dma) { in marvell_nfc_hw_ecc_hmg_do_read_page()
1074 marvell_nfc_xfer_data_dma(nfc, DMA_FROM_DEVICE, in marvell_nfc_hw_ecc_hmg_do_read_page()
1076 memcpy(data_buf, nfc->dma_buf, lt->data_bytes); in marvell_nfc_hw_ecc_hmg_do_read_page()
1077 memcpy(oob_buf, nfc->dma_buf + lt->data_bytes, oob_bytes); in marvell_nfc_hw_ecc_hmg_do_read_page()
1079 marvell_nfc_xfer_data_in_pio(nfc, data_buf, lt->data_bytes); in marvell_nfc_hw_ecc_hmg_do_read_page()
1080 marvell_nfc_xfer_data_in_pio(nfc, oob_buf, oob_bytes); in marvell_nfc_hw_ecc_hmg_do_read_page()
1153 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_hw_ecc_hmg_do_write_page() local
1169 if (nfc->caps->is_nfcv2) in marvell_nfc_hw_ecc_hmg_do_write_page()
1183 if (nfc->use_dma) { in marvell_nfc_hw_ecc_hmg_do_write_page()
1184 memcpy(nfc->dma_buf, data_buf, lt->data_bytes); in marvell_nfc_hw_ecc_hmg_do_write_page()
1185 memcpy(nfc->dma_buf + lt->data_bytes, oob_buf, oob_bytes); in marvell_nfc_hw_ecc_hmg_do_write_page()
1186 marvell_nfc_xfer_data_dma(nfc, DMA_TO_DEVICE, lt->data_bytes + in marvell_nfc_hw_ecc_hmg_do_write_page()
1189 marvell_nfc_xfer_data_out_pio(nfc, data_buf, lt->data_bytes); in marvell_nfc_hw_ecc_hmg_do_write_page()
1190 marvell_nfc_xfer_data_out_pio(nfc, oob_buf, oob_bytes); in marvell_nfc_hw_ecc_hmg_do_write_page()
1309 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_hw_ecc_bch_read_chunk() local
1356 marvell_nfc_xfer_data_in_pio(nfc, data, in marvell_nfc_hw_ecc_bch_read_chunk()
1364 marvell_nfc_xfer_data_in_pio(nfc, spare, in marvell_nfc_hw_ecc_bch_read_chunk()
1571 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_hw_ecc_bch_write_chunk() local
1620 iowrite32_rep(nfc->regs + NDDB, data, FIFO_REP(data_len)); in marvell_nfc_hw_ecc_bch_write_chunk()
1621 iowrite32_rep(nfc->regs + NDDB, spare, FIFO_REP(spare_len)); in marvell_nfc_hw_ecc_bch_write_chunk()
1714 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_parse_instructions() local
1767 if (nfc->caps->is_nfcv2) { in marvell_nfc_parse_instructions()
1781 if (nfc->caps->is_nfcv2) { in marvell_nfc_parse_instructions()
1803 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_xfer_data_pio() local
1817 ret = marvell_nfc_xfer_data_in_pio(nfc, in, len); in marvell_nfc_xfer_data_pio()
1821 ret = marvell_nfc_xfer_data_out_pio(nfc, out, len); in marvell_nfc_xfer_data_pio()
1885 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_monolithic_access_exec() local
1887 writel_relaxed(readl(nfc->regs + NDCR) & ~NDCR_ND_RUN, in marvell_nfc_monolithic_access_exec()
1888 nfc->regs + NDCR); in marvell_nfc_monolithic_access_exec()
1957 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_naked_access_exec() local
1959 writel_relaxed(readl(nfc->regs + NDCR) & ~NDCR_ND_RUN, in marvell_nfc_naked_access_exec()
1960 nfc->regs + NDCR); in marvell_nfc_naked_access_exec()
2182 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_exec_op() local
2187 if (nfc->caps->is_nfcv2) in marvell_nfc_exec_op()
2248 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nand_hw_ecc_controller_init() local
2252 if (!nfc->caps->is_nfcv2 && in marvell_nand_hw_ecc_controller_init()
2254 dev_err(nfc->dev, in marvell_nand_hw_ecc_controller_init()
2271 (!nfc->caps->is_nfcv2 && ecc->strength > 1)) { in marvell_nand_hw_ecc_controller_init()
2272 dev_err(nfc->dev, in marvell_nand_hw_ecc_controller_init()
2281 dev_err(nfc->dev, "Requested layout needs at least 128 OOB bytes\n"); in marvell_nand_hw_ecc_controller_init()
2324 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nand_ecc_init() local
2333 dev_info(nfc->dev, in marvell_nand_ecc_init()
2349 if (!nfc->caps->is_nfcv2 && mtd->writesize != SZ_512 && in marvell_nand_ecc_init()
2351 dev_err(nfc->dev, "NFCv1 cannot write %d bytes pages\n", in marvell_nand_ecc_init()
2390 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nfc_setup_interface() local
2391 unsigned int period_ns = 1000000000 / clk_get_rate(nfc->core_clk) * 2; in marvell_nfc_setup_interface()
2400 if (nfc->caps->max_mode_number && nfc->caps->max_mode_number < conf->timings.mode) in marvell_nfc_setup_interface()
2445 if (nfc->caps->is_nfcv2) { in marvell_nfc_setup_interface()
2473 if (nfc->caps->is_nfcv2) { in marvell_nfc_setup_interface()
2488 nfc->selected_chip = NULL; in marvell_nfc_setup_interface()
2497 struct marvell_nfc *nfc = to_marvell_nfc(chip->controller); in marvell_nand_attach_chip() local
2498 struct pxa3xx_nand_platform_data *pdata = dev_get_platdata(nfc->dev); in marvell_nand_attach_chip()
2550 dev_err(nfc->dev, "ECC init failed: %d\n", ret); in marvell_nand_attach_chip()
2564 if (pdata || nfc->caps->legacy_of_bindings) { in marvell_nand_attach_chip()
2582 mtd->name = devm_kasprintf(nfc->dev, GFP_KERNEL, in marvell_nand_attach_chip()
2583 "%s:nand.%d", dev_name(nfc->dev), in marvell_nand_attach_chip()
2586 dev_err(nfc->dev, "Failed to allocate mtd->name\n"); in marvell_nand_attach_chip()
2600 static int marvell_nand_chip_init(struct device *dev, struct marvell_nfc *nfc, in marvell_nand_chip_init() argument
2619 if (pdata || nfc->caps->legacy_of_bindings) { in marvell_nand_chip_init()
2642 if (pdata || nfc->caps->legacy_of_bindings) { in marvell_nand_chip_init()
2658 if (cs >= nfc->caps->max_cs_nb) { in marvell_nand_chip_init()
2660 cs, nfc->caps->max_cs_nb); in marvell_nand_chip_init()
2664 if (test_and_set_bit(cs, &nfc->assigned_cs)) { in marvell_nand_chip_init()
2692 if (pdata || nfc->caps->legacy_of_bindings) { in marvell_nand_chip_init()
2706 if (rb >= nfc->caps->max_rb_nb) { in marvell_nand_chip_init()
2708 rb, nfc->caps->max_rb_nb); in marvell_nand_chip_init()
2716 chip->controller = &nfc->controller; in marvell_nand_chip_init()
2729 marvell_nand->ndtr0 = readl_relaxed(nfc->regs + NDTR0); in marvell_nand_chip_init()
2730 marvell_nand->ndtr1 = readl_relaxed(nfc->regs + NDTR1); in marvell_nand_chip_init()
2751 list_add_tail(&marvell_nand->node, &nfc->chips); in marvell_nand_chip_init()
2756 static void marvell_nand_chips_cleanup(struct marvell_nfc *nfc) in marvell_nand_chips_cleanup() argument
2762 list_for_each_entry_safe(entry, temp, &nfc->chips, node) { in marvell_nand_chips_cleanup()
2771 static int marvell_nand_chips_init(struct device *dev, struct marvell_nfc *nfc) in marvell_nand_chips_init() argument
2774 int max_cs = nfc->caps->max_cs_nb; in marvell_nand_chips_init()
2795 if (nfc->caps->legacy_of_bindings) { in marvell_nand_chips_init()
2796 ret = marvell_nand_chip_init(dev, nfc, np); in marvell_nand_chips_init()
2801 ret = marvell_nand_chip_init(dev, nfc, nand_np); in marvell_nand_chips_init()
2803 marvell_nand_chips_cleanup(nfc); in marvell_nand_chips_init()
2811 static int marvell_nfc_init_dma(struct marvell_nfc *nfc) in marvell_nfc_init_dma() argument
2813 struct platform_device *pdev = container_of(nfc->dev, in marvell_nfc_init_dma()
2821 dev_warn(nfc->dev, in marvell_nfc_init_dma()
2826 ret = dma_set_mask_and_coherent(nfc->dev, DMA_BIT_MASK(32)); in marvell_nfc_init_dma()
2830 nfc->dma_chan = dma_request_chan(nfc->dev, "data"); in marvell_nfc_init_dma()
2831 if (IS_ERR(nfc->dma_chan)) { in marvell_nfc_init_dma()
2832 ret = PTR_ERR(nfc->dma_chan); in marvell_nfc_init_dma()
2833 nfc->dma_chan = NULL; in marvell_nfc_init_dma()
2834 return dev_err_probe(nfc->dev, ret, "DMA channel request failed\n"); in marvell_nfc_init_dma()
2849 ret = dmaengine_slave_config(nfc->dma_chan, &config); in marvell_nfc_init_dma()
2851 dev_err(nfc->dev, "Failed to configure DMA channel\n"); in marvell_nfc_init_dma()
2861 nfc->dma_buf = kmalloc(MAX_CHUNK_SIZE, GFP_KERNEL | GFP_DMA); in marvell_nfc_init_dma()
2862 if (!nfc->dma_buf) { in marvell_nfc_init_dma()
2867 nfc->use_dma = true; in marvell_nfc_init_dma()
2872 dma_release_channel(nfc->dma_chan); in marvell_nfc_init_dma()
2873 nfc->dma_chan = NULL; in marvell_nfc_init_dma()
2878 static void marvell_nfc_reset(struct marvell_nfc *nfc) in marvell_nfc_reset() argument
2888 NDCR_RD_ID_CNT(NFCV1_READID_LEN), nfc->regs + NDCR); in marvell_nfc_reset()
2889 writel_relaxed(0xFFFFFFFF, nfc->regs + NDSR); in marvell_nfc_reset()
2890 writel_relaxed(0, nfc->regs + NDECCCTRL); in marvell_nfc_reset()
2893 static int marvell_nfc_init(struct marvell_nfc *nfc) in marvell_nfc_init() argument
2895 struct device_node *np = nfc->dev->of_node; in marvell_nfc_init()
2903 if (nfc->caps->need_system_controller) { in marvell_nfc_init()
2924 if (!nfc->caps->is_nfcv2) in marvell_nfc_init()
2925 marvell_nfc_init_dma(nfc); in marvell_nfc_init()
2927 marvell_nfc_reset(nfc); in marvell_nfc_init()
2935 struct marvell_nfc *nfc; in marvell_nfc_probe() local
2939 nfc = devm_kzalloc(&pdev->dev, sizeof(struct marvell_nfc), in marvell_nfc_probe()
2941 if (!nfc) in marvell_nfc_probe()
2944 nfc->dev = dev; in marvell_nfc_probe()
2945 nand_controller_init(&nfc->controller); in marvell_nfc_probe()
2946 nfc->controller.ops = &marvell_nand_controller_ops; in marvell_nfc_probe()
2947 INIT_LIST_HEAD(&nfc->chips); in marvell_nfc_probe()
2949 nfc->regs = devm_platform_ioremap_resource(pdev, 0); in marvell_nfc_probe()
2950 if (IS_ERR(nfc->regs)) in marvell_nfc_probe()
2951 return PTR_ERR(nfc->regs); in marvell_nfc_probe()
2957 nfc->core_clk = devm_clk_get(&pdev->dev, "core"); in marvell_nfc_probe()
2960 if (nfc->core_clk == ERR_PTR(-ENOENT)) in marvell_nfc_probe()
2961 nfc->core_clk = devm_clk_get(&pdev->dev, NULL); in marvell_nfc_probe()
2963 if (IS_ERR(nfc->core_clk)) in marvell_nfc_probe()
2964 return PTR_ERR(nfc->core_clk); in marvell_nfc_probe()
2966 ret = clk_prepare_enable(nfc->core_clk); in marvell_nfc_probe()
2970 nfc->reg_clk = devm_clk_get(&pdev->dev, "reg"); in marvell_nfc_probe()
2971 if (IS_ERR(nfc->reg_clk)) { in marvell_nfc_probe()
2972 if (PTR_ERR(nfc->reg_clk) != -ENOENT) { in marvell_nfc_probe()
2973 ret = PTR_ERR(nfc->reg_clk); in marvell_nfc_probe()
2977 nfc->reg_clk = NULL; in marvell_nfc_probe()
2980 ret = clk_prepare_enable(nfc->reg_clk); in marvell_nfc_probe()
2984 marvell_nfc_disable_int(nfc, NDCR_ALL_INT); in marvell_nfc_probe()
2985 marvell_nfc_clear_int(nfc, NDCR_ALL_INT); in marvell_nfc_probe()
2987 0, "marvell-nfc", nfc); in marvell_nfc_probe()
2993 nfc->caps = (void *)pdev->id_entry->driver_data; in marvell_nfc_probe()
2995 nfc->caps = of_device_get_match_data(&pdev->dev); in marvell_nfc_probe()
2997 if (!nfc->caps) { in marvell_nfc_probe()
3004 ret = marvell_nfc_init(nfc); in marvell_nfc_probe()
3008 platform_set_drvdata(pdev, nfc); in marvell_nfc_probe()
3010 ret = marvell_nand_chips_init(dev, nfc); in marvell_nfc_probe()
3017 if (nfc->use_dma) in marvell_nfc_probe()
3018 dma_release_channel(nfc->dma_chan); in marvell_nfc_probe()
3020 clk_disable_unprepare(nfc->reg_clk); in marvell_nfc_probe()
3022 clk_disable_unprepare(nfc->core_clk); in marvell_nfc_probe()
3029 struct marvell_nfc *nfc = platform_get_drvdata(pdev); in marvell_nfc_remove() local
3031 marvell_nand_chips_cleanup(nfc); in marvell_nfc_remove()
3033 if (nfc->use_dma) { in marvell_nfc_remove()
3034 dmaengine_terminate_all(nfc->dma_chan); in marvell_nfc_remove()
3035 dma_release_channel(nfc->dma_chan); in marvell_nfc_remove()
3038 clk_disable_unprepare(nfc->reg_clk); in marvell_nfc_remove()
3039 clk_disable_unprepare(nfc->core_clk); in marvell_nfc_remove()
3044 struct marvell_nfc *nfc = dev_get_drvdata(dev); in marvell_nfc_suspend() local
3047 list_for_each_entry(chip, &nfc->chips, node) in marvell_nfc_suspend()
3050 clk_disable_unprepare(nfc->reg_clk); in marvell_nfc_suspend()
3051 clk_disable_unprepare(nfc->core_clk); in marvell_nfc_suspend()
3058 struct marvell_nfc *nfc = dev_get_drvdata(dev); in marvell_nfc_resume() local
3061 ret = clk_prepare_enable(nfc->core_clk); in marvell_nfc_resume()
3065 ret = clk_prepare_enable(nfc->reg_clk); in marvell_nfc_resume()
3067 clk_disable_unprepare(nfc->core_clk); in marvell_nfc_resume()
3075 nfc->selected_chip = NULL; in marvell_nfc_resume()
3078 marvell_nfc_reset(nfc); in marvell_nfc_resume()