1150 	const struct nand_sdr_timings *sdr =  in marvell_nfc_hw_ecc_hmg_do_write_page()  local
1198 				  PSEC_TO_MSEC(sdr->tPROG_max));  in marvell_nfc_hw_ecc_hmg_do_write_page()
1630 	const struct nand_sdr_timings *sdr =  in marvell_nfc_hw_ecc_bch_write_page()  local
1669 	ret = marvell_nfc_wait_op(chip, PSEC_TO_MSEC(sdr->tPROG_max));  in marvell_nfc_hw_ecc_bch_write_page()
2392 	const struct nand_sdr_timings *sdr;  in marvell_nfc_setup_interface()  local
2396 	sdr = nand_get_sdr_timings(conf);  in marvell_nfc_setup_interface()
2397 	if (IS_ERR(sdr))  in marvell_nfc_setup_interface()
2398 		return PTR_ERR(sdr);  in marvell_nfc_setup_interface()
2404 	 * SDR timings are given in pico-seconds while NFC timings must be  in marvell_nfc_setup_interface()
2414 	nfc_tmg.tRP = TO_CYCLES(DIV_ROUND_UP(sdr->tRC_min, 2), period_ns) - 1;  in marvell_nfc_setup_interface()
2416 	nfc_tmg.tWP = TO_CYCLES(DIV_ROUND_UP(sdr->tWC_min, 2), period_ns) - 1;  in marvell_nfc_setup_interface()
2418 	nfc_tmg.tCS = TO_CYCLES(sdr->tCS_min, period_ns);  in marvell_nfc_setup_interface()
2419 	nfc_tmg.tCH = TO_CYCLES(sdr->tCH_min, period_ns) - 1;  in marvell_nfc_setup_interface()
2420 	nfc_tmg.tADL = TO_CYCLES(sdr->tADL_min, period_ns);  in marvell_nfc_setup_interface()
2427 	read_delay = sdr->tRC_min >= 30000 ?  in marvell_nfc_setup_interface()
2430 	nfc_tmg.tAR = TO_CYCLES(sdr->tAR_min, period_ns);  in marvell_nfc_setup_interface()
2436 	nfc_tmg.tWHR = TO_CYCLES(max_t(int, sdr->tWHR_min, sdr->tCCS_min),  in marvell_nfc_setup_interface()
2438 	nfc_tmg.tRHW = TO_CYCLES(max_t(int, sdr->tRHW_min, sdr->tCCS_min),  in marvell_nfc_setup_interface()
2446 		nfc_tmg.tR = TO_CYCLES(sdr->tWB_max, period_ns);  in marvell_nfc_setup_interface()
2448 		nfc_tmg.tR = TO_CYCLES64(sdr->tWB_max + sdr->tR_max,  in marvell_nfc_setup_interface()