Lines Matching +full:pio +full:- +full:transfer
1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2010-2015 Freescale Semiconductor, Inc.
19 #include <linux/dma/mxs-dma.h>
21 #include "gpmi-nand.h"
22 #include "gpmi-regs.h"
23 #include "bch-regs.h"
26 #define GPMI_NAND_GPMI_REGS_ADDR_RES_NAME "gpmi-nand"
54 while ((readl(addr) & mask) && --timeout)
98 while ((!(readl(reset_addr) & MODULE_CLKGATE)) && --timeout)
118 return -ETIMEDOUT;
128 clk = this->resources.clock[i];
143 for (; i > 0; i--)
144 clk_disable_unprepare(this->resources.clock[i - 1]);
150 struct resources *r = &this->resources;
153 ret = pm_runtime_resume_and_get(this->dev);
157 ret = gpmi_reset_block(r->gpmi_regs, false);
165 ret = gpmi_reset_block(r->bch_regs, GPMI_IS_MXS(this));
170 writel(BM_GPMI_CTRL1_GPMI_MODE, r->gpmi_regs + HW_GPMI_CTRL1_CLR);
174 r->gpmi_regs + HW_GPMI_CTRL1_SET);
176 /* Disable Write-Protection. */
177 writel(BM_GPMI_CTRL1_DEV_RESET, r->gpmi_regs + HW_GPMI_CTRL1_SET);
180 writel(BM_GPMI_CTRL1_BCH_MODE, r->gpmi_regs + HW_GPMI_CTRL1_SET);
188 r->gpmi_regs + HW_GPMI_CTRL1_SET);
191 pm_runtime_mark_last_busy(this->dev);
192 pm_runtime_put_autosuspend(this->dev);
199 struct resources *r = &this->resources;
200 struct bch_geometry *geo = &this->bch_geometry;
204 dev_err(this->dev, "Show GPMI registers :\n");
206 reg = readl(r->gpmi_regs + i * 0x10);
207 dev_err(this->dev, "offset 0x%.3x : 0x%.8x\n", i * 0x10, reg);
211 dev_err(this->dev, "Show BCH registers :\n");
213 reg = readl(r->bch_regs + i * 0x10);
214 dev_err(this->dev, "offset 0x%.3x : 0x%.8x\n", i * 0x10, reg);
216 dev_err(this->dev, "BCH Geometry :\n"
229 geo->gf_len,
230 geo->ecc_strength,
231 geo->page_size,
232 geo->metadata_size,
233 geo->ecc0_chunk_size,
234 geo->eccn_chunk_size,
235 geo->ecc_chunk_count,
236 geo->payload_size,
237 geo->auxiliary_size,
238 geo->auxiliary_status_offset,
239 geo->block_mark_byte_offset,
240 geo->block_mark_bit_offset);
245 struct nand_chip *chip = &this->nand;
246 struct bch_geometry *geo = &this->bch_geometry;
247 struct nand_device *nand = &chip->base;
248 struct nand_ecc_props *conf = &nand->ecc.ctx.conf;
250 conf->step_size = geo->eccn_chunk_size;
251 conf->strength = geo->ecc_strength;
256 if (geo->gf_len == 14)
260 if (geo->ecc_strength > this->devdata->bch_max_ecc_strength)
273 struct bch_geometry *geo = &this->bch_geometry;
274 struct nand_chip *chip = &this->nand;
278 if (geo->ecc0_chunk_size != geo->eccn_chunk_size) {
279 dev_err(this->dev,
284 i = (mtd->writesize * 8 - geo->metadata_size * 8) /
285 (geo->gf_len * geo->ecc_strength +
286 geo->eccn_chunk_size * 8);
288 j = (mtd->writesize * 8 - geo->metadata_size * 8) -
289 (geo->gf_len * geo->ecc_strength +
290 geo->eccn_chunk_size * 8) * i;
292 if (j < geo->eccn_chunk_size * 8) {
294 dev_dbg(this->dev, "Set ecc to %d and bbm in chunk %d\n",
295 geo->ecc_strength, *chunk_num);
312 struct bch_geometry *geo = &this->bch_geometry;
313 struct nand_chip *chip = &this->nand;
319 geo->gf_len = 13;
322 geo->gf_len = 14;
325 dev_err(this->dev,
327 nanddev_get_ecc_requirements(&chip->base)->strength,
328 nanddev_get_ecc_requirements(&chip->base)->step_size);
329 return -EINVAL;
331 geo->ecc0_chunk_size = ecc_step;
332 geo->eccn_chunk_size = ecc_step;
333 geo->ecc_strength = round_up(ecc_strength, 2);
335 return -EINVAL;
338 if (geo->eccn_chunk_size < mtd->oobsize) {
339 dev_err(this->dev,
341 ecc_step, mtd->oobsize);
342 return -EINVAL;
346 geo->metadata_size = 10;
348 geo->ecc_chunk_count = mtd->writesize / geo->eccn_chunk_size;
354 * |<----------------------------------------------------->|
358 * |<-------------------------------------------->| D | | O' |
359 * | |<---->| |<--->|
361 * +---+----------+-+----------+-+----------+-+----------+-+-----+
363 * +---+----------+-+----------+-+----------+-+----------+-+-----+
366 * |<------------>|
382 * P = ------------ + P' + M
385 * The position of block mark moves forward in the ECC-based view
388 * E * G * (N - 1)
389 * D = (---------------- + M)
394 * So the bit position of the physical block mark within the ECC-based
396 * (P' - D) * 8
398 geo->page_size = mtd->writesize + geo->metadata_size +
399 (geo->gf_len * geo->ecc_strength * geo->ecc_chunk_count) / 8;
401 geo->payload_size = mtd->writesize;
403 geo->auxiliary_status_offset = ALIGN(geo->metadata_size, 4);
404 geo->auxiliary_size = ALIGN(geo->metadata_size, 4)
405 + ALIGN(geo->ecc_chunk_count, 4);
407 if (!this->swap_block_mark)
411 block_mark_bit_offset = mtd->writesize * 8 -
412 (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1)
413 + geo->metadata_size * 8);
415 geo->block_mark_byte_offset = block_mark_bit_offset / 8;
416 geo->block_mark_bit_offset = block_mark_bit_offset % 8;
430 * ------------ <= (O - M)
434 * (O - M) * 8
435 * E <= -------------
440 struct bch_geometry *geo = &this->bch_geometry;
441 struct mtd_info *mtd = nand_to_mtd(&this->nand);
444 ecc_strength = ((mtd->oobsize - geo->metadata_size) * 8)
445 / (geo->gf_len * geo->ecc_chunk_count);
453 struct bch_geometry *geo = &this->bch_geometry;
454 struct nand_chip *chip = &this->nand;
457 nanddev_get_ecc_requirements(&chip->base);
464 if (!(requirements->strength > 0 &&
465 requirements->step_size > 0))
466 return -EINVAL;
467 geo->ecc_strength = requirements->strength;
471 dev_err(this->dev,
473 geo->ecc_strength);
474 return -EINVAL;
478 geo->metadata_size = 10;
479 geo->gf_len = 14;
480 geo->ecc0_chunk_size = 1024;
481 geo->eccn_chunk_size = 1024;
482 geo->ecc_chunk_count = mtd->writesize / geo->eccn_chunk_size;
484 this->devdata->bch_max_ecc_strength);
490 geo->ecc_strength = max_ecc;
491 while (!(geo->ecc_strength < requirements->strength)) {
494 geo->ecc_strength -= 2;
499 geo->ecc_strength = requirements->strength;
501 geo->ecc0_chunk_size = 0;
502 geo->ecc_chunk_count = (mtd->writesize / geo->eccn_chunk_size) + 1;
503 geo->ecc_for_meta = 1;
505 if (mtd->oobsize * 8 < geo->metadata_size * 8 +
506 geo->gf_len * geo->ecc_strength * geo->ecc_chunk_count) {
507 dev_err(this->dev, "unsupported NAND chip with new layout\n");
508 return -EINVAL;
512 bbm_chunk = (mtd->writesize * 8 - geo->metadata_size * 8 -
513 geo->gf_len * geo->ecc_strength) /
514 (geo->gf_len * geo->ecc_strength +
515 geo->eccn_chunk_size * 8) + 1;
519 geo->page_size = mtd->writesize + geo->metadata_size +
520 (geo->gf_len * geo->ecc_strength * geo->ecc_chunk_count) / 8;
521 geo->payload_size = mtd->writesize;
525 * metadata is padded to the nearest 32-bit boundary. The ECC status
527 * nearest 32-bit boundary.
529 geo->auxiliary_status_offset = ALIGN(geo->metadata_size, 4);
530 geo->auxiliary_size = ALIGN(geo->metadata_size, 4)
531 + ALIGN(geo->ecc_chunk_count, 4);
533 if (!this->swap_block_mark)
537 i = (mtd->writesize / geo->eccn_chunk_size) - bbm_chunk + 1;
539 block_mark_bit_offset = mtd->writesize * 8 -
540 (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - i)
541 + geo->metadata_size * 8);
543 geo->block_mark_byte_offset = block_mark_bit_offset / 8;
544 geo->block_mark_bit_offset = block_mark_bit_offset % 8;
546 dev_dbg(this->dev, "BCH Geometry :\n"
561 geo->gf_len,
562 geo->ecc_strength,
563 geo->page_size,
564 geo->metadata_size,
565 geo->ecc0_chunk_size,
566 geo->eccn_chunk_size,
567 geo->ecc_chunk_count,
568 geo->payload_size,
569 geo->auxiliary_size,
570 geo->auxiliary_status_offset,
571 geo->block_mark_byte_offset,
572 geo->block_mark_bit_offset,
574 geo->ecc_for_meta);
581 struct bch_geometry *geo = &this->bch_geometry;
582 struct mtd_info *mtd = nand_to_mtd(&this->nand);
592 geo->metadata_size = 10;
595 geo->gf_len = 13;
598 geo->ecc0_chunk_size = 512;
599 geo->eccn_chunk_size = 512;
600 while (geo->eccn_chunk_size < mtd->oobsize) {
601 geo->ecc0_chunk_size *= 2; /* keep C >= O */
602 geo->eccn_chunk_size *= 2; /* keep C >= O */
603 geo->gf_len = 14;
606 geo->ecc_chunk_count = mtd->writesize / geo->eccn_chunk_size;
609 geo->ecc_strength = get_ecc_strength(this);
611 dev_err(this->dev,
614 geo->ecc_strength,
615 this->devdata->bch_max_ecc_strength);
616 return -EINVAL;
619 geo->page_size = mtd->writesize + geo->metadata_size +
620 (geo->gf_len * geo->ecc_strength * geo->ecc_chunk_count) / 8;
621 geo->payload_size = mtd->writesize;
625 * metadata is padded to the nearest 32-bit boundary. The ECC status
627 * nearest 32-bit boundary.
629 metadata_size = ALIGN(geo->metadata_size, 4);
630 status_size = ALIGN(geo->ecc_chunk_count, 4);
632 geo->auxiliary_size = metadata_size + status_size;
633 geo->auxiliary_status_offset = metadata_size;
635 if (!this->swap_block_mark)
640 * the physical block mark within the ECC-based view of the page.
646 * |<---->|
648 * +---+----------+-+----------+-+----------+-+----------+-+
650 * +---+----------+-+----------+-+----------+-+----------+-+
652 * The position of block mark moves forward in the ECC-based view
655 * E * G * (N - 1)
656 * D = (---------------- + M)
664 * E * G (O - M) C - M C - M
665 * ----------- <= ------- <= -------- < ---------
666 * 8 N N (N - 1)
670 * E * G * (N - 1)
671 * D = (---------------- + M) < C
675 * within the ECC-based view of the page is still in the data chunk,
679 * physical block mark within the ECC-based view of the page:
680 * (page_size - D) * 8
682 * --Huang Shijie
684 block_mark_bit_offset = mtd->writesize * 8 -
685 (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1)
686 + geo->metadata_size * 8);
688 geo->block_mark_byte_offset = block_mark_bit_offset / 8;
689 geo->block_mark_bit_offset = block_mark_bit_offset % 8;
695 struct nand_chip *chip = &this->nand;
696 struct mtd_info *mtd = nand_to_mtd(&this->nand);
698 nanddev_get_ecc_requirements(&chip->base);
702 use_minimun_ecc = of_property_read_bool(this->dev->of_node,
703 "fsl,use-minimum-ecc");
706 if ((!use_minimun_ecc && mtd->oobsize < 1024) ||
707 !(requirements->strength > 0 && requirements->step_size > 0)) {
708 dev_dbg(this->dev, "use legacy bch geometry\n");
715 if (mtd->oobsize > 1024) {
716 dev_dbg(this->dev, "use large oob bch geometry\n");
723 dev_dbg(this->dev, "use minimum ecc bch geometry\n");
724 err = set_geometry_by_ecc_info(this, requirements->strength,
725 requirements->step_size);
727 dev_err(this->dev, "none of the bch geometry setting works\n");
735 struct resources *r = &this->resources;
742 ret = pm_runtime_resume_and_get(this->dev);
752 ret = gpmi_reset_block(r->bch_regs, GPMI_IS_MXS(this));
757 writel(0, r->bch_regs + HW_BCH_LAYOUTSELECT);
761 pm_runtime_mark_last_busy(this->dev);
762 pm_runtime_put_autosuspend(this->dev);
768 * <1> Firstly, we should know what's the GPMI-clock means.
769 * The GPMI-clock is the internal clock in the gpmi nand controller.
770 * If you set 100MHz to gpmi nand controller, the GPMI-clock's period
771 * is 10ns. Mark the GPMI-clock's period as GPMI-clock-period.
774 * The frequency on the nand chip pins is derived from the GPMI-clock.
793 * |<---tREA---->|
796 * |<--tRP-->| |
801 * /---------\
802 * Read Data --------------< >---------
803 * \---------/
805 * |<-D->|
815 * Delay = (tREA + C - tRP) {1}
820 * tRP = (GPMI-clock-period) * DATA_SETUP
826 * if (GPMI-clock-period > DLL_THRETHOLD)
827 * RP = GPMI-clock-period / 2;
829 * RP = GPMI-clock-period;
831 * Set the HW_GPMI_CTRL1:HALF_PERIOD if GPMI-clock-period
837 * (tREA + 4000 - tRP) * 8
838 * RDN_DELAY = ----------------------- {3}
844 struct gpmi_nfc_hardware_timing *hw = &this->hw;
845 struct resources *r = &this->resources;
846 unsigned int dll_threshold_ps = this->devdata->max_chain_delay;
857 if (sdr->tRC_min >= 30000) {
858 /* ONFI non-EDO modes [0-3] */
859 hw->clk_rate = 22000000;
862 } else if (sdr->tRC_min >= 25000) {
864 hw->clk_rate = 80000000;
869 hw->clk_rate = 100000000;
874 clk_rate = clk_round_rate(r->clock[0], hw->clk_rate);
876 dev_err(this->dev, "clock setting: expected %ld, got %ld\n",
877 hw->clk_rate, clk_rate);
878 return -ENOTSUPP;
881 hw->clk_rate = clk_rate;
883 period_ps = div_u64((u64)NSEC_PER_SEC * 1000, hw->clk_rate);
885 addr_setup_cycles = TO_CYCLES(sdr->tALS_min, period_ps);
886 data_setup_cycles = TO_CYCLES(sdr->tDS_min, period_ps);
887 data_hold_cycles = TO_CYCLES(sdr->tDH_min, period_ps);
888 busy_timeout_ps = max(sdr->tBERS_max, sdr->tPROG_max);
891 hw->timing0 = BF_GPMI_TIMING0_ADDRESS_SETUP(addr_setup_cycles) |
894 hw->timing1 = BF_GPMI_TIMING1_BUSY_TIMEOUT(DIV_ROUND_UP(busy_timeout_cycles, 4096));
899 * (tREA + 4000 - tRP) * 8
900 * RDN_DELAY = -----------------------
912 sample_delay_ps = (sdr->tREA_max + 4000 - tRP_ps) * 8;
918 hw->ctrl1n = BF_GPMI_CTRL1_WRN_DLY_SEL(wrn_dly_sel);
920 hw->ctrl1n |= BF_GPMI_CTRL1_RDN_DELAY(sample_delay_factor) |
928 struct gpmi_nfc_hardware_timing *hw = &this->hw;
929 struct resources *r = &this->resources;
930 void __iomem *gpmi_regs = r->gpmi_regs;
939 clk_disable_unprepare(r->clock[0]);
941 ret = clk_set_rate(r->clock[0], hw->clk_rate);
943 dev_err(this->dev, "cannot set clock rate to %lu Hz: %d\n", hw->clk_rate, ret);
948 ret = clk_prepare_enable(r->clock[0]);
953 writel(hw->timing0, gpmi_regs + HW_GPMI_TIMING0);
954 writel(hw->timing1, gpmi_regs + HW_GPMI_TIMING1);
961 writel(hw->ctrl1n, gpmi_regs + HW_GPMI_CTRL1_SET);
964 dll_wait_time_us = USEC_PER_SEC / hw->clk_rate * 64;
987 if (sdr->tRC_min <= 25000 && !this->devdata->support_edo_timing)
988 return -ENOTSUPP;
999 this->hw.must_apply_timings = true;
1007 struct resources *r = &this->resources;
1008 writel(BM_BCH_CTRL_COMPLETE_IRQ, r->bch_regs + HW_BCH_CTRL_CLR);
1014 return this->dma_chans[0];
1021 struct completion *dma_c = &this->dma_done;
1031 complete(&this->bch_done);
1041 if (this->bch)
1042 return ALIGN_DOWN(raw_len, this->bch_geometry.eccn_chunk_size);
1058 ret = dma_map_sg(this->dev, sgl, 1, dr);
1067 sg_init_one(sgl, this->data_buffer_dma, len);
1069 if (dr == DMA_TO_DEVICE && buf != this->data_buffer_dma)
1070 memcpy(this->data_buffer_dma, buf, len);
1072 dma_map_sg(this->dev, sgl, 1, dr);
1095 struct bch_geometry *geo = &this->bch_geometry;
1098 return -ERANGE;
1100 oobregion->offset = 0;
1101 oobregion->length = geo->page_size - mtd->writesize;
1111 struct bch_geometry *geo = &this->bch_geometry;
1114 return -ERANGE;
1117 if (geo->page_size < mtd->writesize + mtd->oobsize) {
1118 oobregion->offset = geo->page_size - mtd->writesize;
1119 oobregion->length = mtd->oobsize - oobregion->offset;
1202 struct platform_device *pdev = this->pdev;
1203 struct resources *res = &this->resources;
1211 res->gpmi_regs = p;
1213 res->bch_regs = p;
1215 dev_err(this->dev, "unknown resource name : %s\n", res_name);
1222 struct platform_device *pdev = this->pdev;
1230 err = devm_request_irq(this->dev, err, irq_h, 0, res_name, this);
1232 dev_err(this->dev, "error requesting BCH IRQ\n");
1241 if (this->dma_chans[i]) {
1242 dma_release_channel(this->dma_chans[i]);
1243 this->dma_chans[i] = NULL;
1249 struct platform_device *pdev = this->pdev;
1254 dma_chan = dma_request_chan(&pdev->dev, "rx-tx");
1256 ret = dev_err_probe(this->dev, PTR_ERR(dma_chan),
1260 this->dma_chans[0] = dma_chan;
1268 struct resources *r = &this->resources;
1272 for (i = 0; i < this->devdata->clks_count; i++) {
1273 clk = devm_clk_get(this->dev, this->devdata->clks[i]);
1279 r->clock[i] = clk;
1285 dev_dbg(this->dev, "failed in finding the clocks.\n");
1327 struct device *dev = this->dev;
1328 struct bch_geometry *geo = &this->bch_geometry;
1330 if (this->auxiliary_virt && virt_addr_valid(this->auxiliary_virt))
1331 dma_free_coherent(dev, geo->auxiliary_size,
1332 this->auxiliary_virt,
1333 this->auxiliary_phys);
1334 kfree(this->data_buffer_dma);
1335 kfree(this->raw_buffer);
1337 this->data_buffer_dma = NULL;
1338 this->raw_buffer = NULL;
1344 struct bch_geometry *geo = &this->bch_geometry;
1345 struct device *dev = this->dev;
1346 struct mtd_info *mtd = nand_to_mtd(&this->nand);
1356 this->data_buffer_dma = kzalloc(mtd->writesize ?: PAGE_SIZE,
1358 if (this->data_buffer_dma == NULL)
1361 this->auxiliary_virt = dma_alloc_coherent(dev, geo->auxiliary_size,
1362 &this->auxiliary_phys, GFP_DMA);
1363 if (!this->auxiliary_virt)
1366 this->raw_buffer = kzalloc((mtd->writesize ?: PAGE_SIZE) + mtd->oobsize, GFP_KERNEL);
1367 if (!this->raw_buffer)
1374 return -ENOMEM;
1385 struct bch_geometry *nfc_geo = &this->bch_geometry;
1393 if (!this->swap_block_mark)
1400 bit = nfc_geo->block_mark_bit_offset;
1401 p = payload + nfc_geo->block_mark_byte_offset;
1410 from_data = (p[0] >> bit) | (p[1] << (8 - bit));
1418 mask = (0x1 << bit) - 1;
1422 p[1] = (p[1] & mask) | (from_oob >> (8 - bit));
1429 struct bch_geometry *nfc_geo = &this->bch_geometry;
1436 status = this->auxiliary_virt + ALIGN(meta, 4);
1443 int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len;
1444 u8 *eccbuf = this->raw_buffer;
1450 offset = nfc_geo->metadata_size * 8;
1451 offset += ((8 * nfc_geo->eccn_chunk_size) + eccbits) * (i + 1);
1452 offset -= eccbits;
1456 eccbytes -= offset;
1462 * in-band data in the first and last byte of
1463 * eccbuf. Set non-eccbits to one so that
1468 eccbuf[0] |= GENMASK(bitoffset - 1, 0);
1472 eccbuf[eccbytes - 1] |= GENMASK(7, bitoffset);
1488 buf + i * nfc_geo->eccn_chunk_size,
1489 nfc_geo->eccn_chunk_size,
1491 this->auxiliary_virt,
1492 nfc_geo->metadata_size,
1493 nfc_geo->ecc_strength);
1496 buf + i * nfc_geo->eccn_chunk_size,
1497 nfc_geo->eccn_chunk_size,
1500 nfc_geo->ecc_strength);
1506 mtd->ecc_stats.corrected += flips;
1510 mtd->ecc_stats.failed++;
1514 mtd->ecc_stats.corrected += *status;
1523 struct bch_geometry *geo = &this->bch_geometry;
1524 unsigned int ecc_strength = geo->ecc_strength >> 1;
1525 unsigned int gf_len = geo->gf_len;
1526 unsigned int block0_size = geo->ecc0_chunk_size;
1527 unsigned int blockn_size = geo->eccn_chunk_size;
1529 this->bch_flashlayout0 =
1530 BF_BCH_FLASH0LAYOUT0_NBLOCKS(geo->ecc_chunk_count - 1) |
1531 BF_BCH_FLASH0LAYOUT0_META_SIZE(geo->metadata_size) |
1536 this->bch_flashlayout1 =
1537 BF_BCH_FLASH0LAYOUT1_PAGE_SIZE(geo->page_size) |
1548 struct bch_geometry *geo = &this->bch_geometry;
1553 this->bch = true;
1555 ret = nand_read_page_op(chip, page, 0, buf, geo->page_size);
1560 geo->ecc_chunk_count,
1561 geo->auxiliary_status_offset);
1564 block_mark_swapping(this, buf, this->auxiliary_virt);
1577 memset(chip->oob_poi, ~0, mtd->oobsize);
1578 chip->oob_poi[0] = ((uint8_t *)this->auxiliary_virt)[0];
1589 struct bch_geometry *geo = &this->bch_geometry;
1590 int size = chip->ecc.size; /* ECC chunk size */
1600 ecc_parity_size = geo->gf_len * geo->ecc_strength / 8;
1604 last = (offs + len - 1) / size;
1606 if (this->swap_block_mark) {
1614 marker_pos = geo->block_mark_byte_offset / size;
1616 dev_dbg(this->dev,
1625 * - need to add an extra ECC size when calculating col and page_size,
1627 * - ecc0_chunk size need to set to the same size as other chunks,
1631 meta = geo->metadata_size;
1633 if (geo->ecc_for_meta)
1643 ecc_parity_size = geo->gf_len * geo->ecc_strength / 8;
1644 n = last - first + 1;
1646 if (geo->ecc_for_meta && meta)
1652 ecc_strength = geo->ecc_strength >> 1;
1654 this->bch_flashlayout0 = BF_BCH_FLASH0LAYOUT0_NBLOCKS(
1655 (geo->ecc_for_meta ? n : n - 1)) |
1658 BF_BCH_FLASH0LAYOUT0_GF(geo->gf_len, this) |
1659 BF_BCH_FLASH0LAYOUT0_DATA0_SIZE((geo->ecc_for_meta ?
1660 0 : geo->ecc0_chunk_size), this);
1662 this->bch_flashlayout1 = BF_BCH_FLASH0LAYOUT1_PAGE_SIZE(page_size) |
1664 BF_BCH_FLASH0LAYOUT1_GF(geo->gf_len, this) |
1665 BF_BCH_FLASH0LAYOUT1_DATAN_SIZE(geo->eccn_chunk_size, this);
1667 this->bch = true;
1673 dev_dbg(this->dev, "page:%d(%d:%d)%d, chunk:(%d:%d), BCH PG size:%d\n",
1686 struct bch_geometry *nfc_geo = &this->bch_geometry;
1688 dev_dbg(this->dev, "ecc write page.\n");
1691 this->bch = true;
1693 memcpy(this->auxiliary_virt, chip->oob_poi, nfc_geo->auxiliary_size);
1695 if (this->swap_block_mark) {
1700 memcpy(this->data_buffer_dma, buf, mtd->writesize);
1701 buf = this->data_buffer_dma;
1702 block_mark_swapping(this, this->data_buffer_dma,
1703 this->auxiliary_virt);
1706 return nand_prog_page_op(chip, page, 0, buf, nfc_geo->page_size);
1723 * 3) ECC-based read operations return an OOB full of set bits (since we never
1724 * allow ECC-based writes to the OOB, it doesn't matter what ECC-based reads
1735 * 1) Are we doing a "raw" read, or an ECC-based read?
1741 * | Raw | ECC-based |
1742 * -------------+-------------------------+-------------------------+
1748 * -------------+-------------------------+ return it in a buffer |
1756 * -------------+-------------------------+-------------------------+
1763 * It turns out that knowing whether we want an "ECC-based" or "raw" read is not
1766 * ECC-based or raw view of the page is implicit in which function it calls
1767 * (there is a similar pair of ECC-based/raw functions for writing).
1776 memset(chip->oob_poi, ~0, mtd->oobsize);
1779 ret = nand_read_page_op(chip, page, mtd->writesize, chip->oob_poi,
1780 mtd->oobsize);
1786 * non-transcribing case (!GPMI_IS_MX23()), we already have it.
1791 ret = nand_read_page_op(chip, page, 0, chip->oob_poi, 1);
1807 return -EPERM;
1810 return -EPERM;
1812 return nand_prog_page_op(chip, page, mtd->writesize + of.offset,
1813 chip->oob_poi + of.offset, of.length);
1833 struct bch_geometry *nfc_geo = &this->bch_geometry;
1834 int eccsize = nfc_geo->eccn_chunk_size;
1835 int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len;
1836 u8 *tmp_buf = this->raw_buffer;
1840 uint8_t *oob = chip->oob_poi;
1845 mtd->writesize + mtd->oobsize);
1856 if (this->swap_block_mark)
1857 swap(tmp_buf[0], tmp_buf[mtd->writesize]);
1864 memcpy(oob, tmp_buf, nfc_geo->metadata_size);
1866 oob_bit_off = nfc_geo->metadata_size * 8;
1870 for (step = 0; step < nfc_geo->ecc_chunk_count; step++) {
1877 if (step == nfc_geo->ecc_chunk_count - 1 &&
1879 eccbits += 8 - ((oob_bit_off + eccbits) % 8);
1892 if (oob_byte_off < mtd->oobsize)
1894 tmp_buf + mtd->writesize + oob_byte_off,
1895 mtd->oobsize - oob_byte_off);
1918 struct bch_geometry *nfc_geo = &this->bch_geometry;
1919 int eccsize = nfc_geo->eccn_chunk_size;
1920 int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len;
1921 u8 *tmp_buf = this->raw_buffer;
1922 uint8_t *oob = chip->oob_poi;
1934 memset(tmp_buf, 0xff, mtd->writesize + mtd->oobsize);
1940 memcpy(tmp_buf, oob, nfc_geo->metadata_size);
1941 oob_bit_off = nfc_geo->metadata_size * 8;
1945 for (step = 0; step < nfc_geo->ecc_chunk_count; step++) {
1952 if (step == nfc_geo->ecc_chunk_count - 1 &&
1954 eccbits += 8 - ((oob_bit_off + eccbits) % 8);
1966 if (oob_required && oob_byte_off < mtd->oobsize)
1967 memcpy(tmp_buf + mtd->writesize + oob_byte_off,
1968 oob + oob_byte_off, mtd->oobsize - oob_byte_off);
1977 if (this->swap_block_mark)
1978 swap(tmp_buf[0], tmp_buf[mtd->writesize]);
1981 mtd->writesize + mtd->oobsize);
2002 chipnr = (int)(ofs >> chip->chip_shift);
2005 column = !GPMI_IS_MX23(this) ? mtd->writesize : 0;
2008 block_mark = this->data_buffer_dma;
2012 page = (int)(ofs >> chip->page_shift);
2023 struct boot_rom_geometry *geometry = &this->rom_geometry;
2033 geometry->stride_size_in_pages = 64;
2043 geometry->search_area_stride_exponent = 2;
2050 struct boot_rom_geometry *rom_geo = &this->rom_geometry;
2051 struct device *dev = this->dev;
2052 struct nand_chip *chip = &this->nand;
2061 search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent;
2072 page = stride * rom_geo->stride_size_in_pages;
2105 struct device *dev = this->dev;
2106 struct boot_rom_geometry *rom_geo = &this->rom_geometry;
2107 struct nand_chip *chip = &this->nand;
2120 block_size_in_pages = mtd->erasesize / mtd->writesize;
2121 search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent;
2123 rom_geo->stride_size_in_pages;
2125 (search_area_size_in_pages + (block_size_in_pages - 1)) /
2147 memset(buffer, ~0, mtd->writesize);
2154 page = stride * rom_geo->stride_size_in_pages;
2159 status = chip->ecc.write_page_raw(chip, buffer, 0, page);
2171 struct device *dev = this->dev;
2172 struct nand_chip *chip = &this->nand;
2186 * anything -- the block marks are already transcribed.
2198 block_count = nanddev_eraseblocks_per_target(&chip->base);
2209 chipnr = block >> (chip->chip_shift - chip->phys_erase_shift);
2210 page = block << (chip->phys_erase_shift - chip->page_shift);
2211 byte = block << chip->phys_erase_shift;
2215 ret = nand_read_page_op(chip, page, mtd->writesize, &block_mark,
2229 ret = chip->legacy.block_markbad(chip, byte);
2246 /* This is ROM arch-specific initilization before the BBT scanning. */
2262 dev_err(this->dev, "Error setting BCH geometry : %d\n", ret);
2272 struct nand_chip *chip = &this->nand;
2274 struct nand_ecc_ctrl *ecc = &chip->ecc;
2275 struct bch_geometry *bch_geo = &this->bch_geometry;
2284 ecc->read_page = gpmi_ecc_read_page;
2285 ecc->write_page = gpmi_ecc_write_page;
2286 ecc->read_oob = gpmi_ecc_read_oob;
2287 ecc->write_oob = gpmi_ecc_write_oob;
2288 ecc->read_page_raw = gpmi_ecc_read_page_raw;
2289 ecc->write_page_raw = gpmi_ecc_write_page_raw;
2290 ecc->read_oob_raw = gpmi_ecc_read_oob_raw;
2291 ecc->write_oob_raw = gpmi_ecc_write_oob_raw;
2292 ecc->engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
2293 ecc->size = bch_geo->eccn_chunk_size;
2294 ecc->strength = bch_geo->ecc_strength;
2303 ((bch_geo->gf_len * bch_geo->ecc_strength) % 8) == 0) {
2304 ecc->read_subpage = gpmi_ecc_read_subpage;
2305 chip->options |= NAND_SUBPAGE_READ;
2316 if (chip->bbt_options & NAND_BBT_USE_FLASH) {
2317 chip->bbt_options |= NAND_BBT_NO_OOB;
2319 if (of_property_read_bool(this->dev->of_node,
2320 "fsl,no-blockmark-swap"))
2321 this->swap_block_mark = false;
2323 dev_dbg(this->dev, "Blockmark swapping %s\n",
2324 str_enabled_disabled(this->swap_block_mark));
2330 chip->options |= NAND_SKIP_BBTSCAN;
2337 struct gpmi_transfer *transfer = &this->transfers[this->ntransfers];
2339 this->ntransfers++;
2341 if (this->ntransfers == GPMI_MAX_TRANSFERS)
2344 return transfer;
2352 struct gpmi_transfer *transfer;
2353 int chip = this->nand.cur_cs;
2354 u32 pio[3];
2356 /* [1] send out the PIO words */
2357 pio[0] = BF_GPMI_CTRL0_COMMAND_MODE(BV_GPMI_CTRL0_COMMAND_MODE__WRITE)
2364 pio[1] = 0;
2365 pio[2] = 0;
2366 desc = mxs_dmaengine_prep_pio(channel, pio, ARRAY_SIZE(pio),
2371 transfer = get_next_transfer(this);
2372 if (!transfer)
2375 transfer->cmdbuf[0] = cmd;
2377 memcpy(&transfer->cmdbuf[1], addr, naddr);
2379 sg_init_one(&transfer->sgl, transfer->cmdbuf, naddr + 1);
2380 dma_map_sg(this->dev, &transfer->sgl, 1, DMA_TO_DEVICE);
2382 transfer->direction = DMA_TO_DEVICE;
2384 desc = dmaengine_prep_slave_sg(channel, &transfer->sgl, 1, DMA_MEM_TO_DEV,
2393 u32 pio[2];
2395 pio[0] = BF_GPMI_CTRL0_COMMAND_MODE(BV_GPMI_CTRL0_COMMAND_MODE__WAIT_FOR_READY)
2397 | BF_GPMI_CTRL0_CS(this->nand.cur_cs, this)
2401 pio[1] = 0;
2403 return mxs_dmaengine_prep_pio(channel, pio, 2, DMA_TRANS_NONE,
2412 struct gpmi_transfer *transfer;
2413 u32 pio[6] = {};
2415 transfer = get_next_transfer(this);
2416 if (!transfer)
2419 transfer->direction = DMA_FROM_DEVICE;
2421 *direct = prepare_data_dma(this, buf, raw_len, &transfer->sgl,
2424 pio[0] = BF_GPMI_CTRL0_COMMAND_MODE(BV_GPMI_CTRL0_COMMAND_MODE__READ)
2426 | BF_GPMI_CTRL0_CS(this->nand.cur_cs, this)
2431 if (this->bch) {
2432 pio[2] = BM_GPMI_ECCCTRL_ENABLE_ECC
2436 pio[3] = raw_len;
2437 pio[4] = transfer->sgl.dma_address;
2438 pio[5] = this->auxiliary_phys;
2441 desc = mxs_dmaengine_prep_pio(channel, pio, ARRAY_SIZE(pio),
2446 if (!this->bch)
2447 desc = dmaengine_prep_slave_sg(channel, &transfer->sgl, 1,
2459 struct gpmi_transfer *transfer;
2460 u32 pio[6] = {};
2462 transfer = get_next_transfer(this);
2463 if (!transfer)
2466 transfer->direction = DMA_TO_DEVICE;
2468 prepare_data_dma(this, buf, raw_len, &transfer->sgl, DMA_TO_DEVICE);
2470 pio[0] = BF_GPMI_CTRL0_COMMAND_MODE(BV_GPMI_CTRL0_COMMAND_MODE__WRITE)
2472 | BF_GPMI_CTRL0_CS(this->nand.cur_cs, this)
2477 if (this->bch) {
2478 pio[2] = BM_GPMI_ECCCTRL_ENABLE_ECC
2482 pio[3] = raw_len;
2483 pio[4] = transfer->sgl.dma_address;
2484 pio[5] = this->auxiliary_phys;
2487 desc = mxs_dmaengine_prep_pio(channel, pio, ARRAY_SIZE(pio),
2489 (this->bch ? MXS_DMA_CTRL_WAIT4END : 0));
2493 if (!this->bch)
2494 desc = dmaengine_prep_slave_sg(channel, &transfer->sgl, 1,
2519 this->ntransfers = 0;
2521 this->transfers[i].direction = DMA_NONE;
2523 ret = pm_runtime_resume_and_get(this->dev);
2533 if (this->hw.must_apply_timings) {
2534 this->hw.must_apply_timings = false;
2540 dev_dbg(this->dev, "%s: %d instructions\n", __func__, op->ninstrs);
2542 for (i = 0; i < op->ninstrs; i++) {
2543 instr = &op->instrs[i];
2547 switch (instr->type) {
2552 cmd = instr->ctx.cmd.opcode;
2558 if (i + 1 != op->ninstrs &&
2559 op->instrs[i + 1].type == NAND_OP_ADDR_INSTR)
2566 desc = gpmi_chain_command(this, cmd, instr->ctx.addr.addrs,
2567 instr->ctx.addr.naddrs);
2570 buf_write = instr->ctx.data.buf.out;
2571 buf_len = instr->ctx.data.len;
2578 if (!instr->ctx.data.len)
2580 buf_read = instr->ctx.data.buf.in;
2581 buf_len = instr->ctx.data.len;
2590 ret = -ENXIO;
2595 dev_dbg(this->dev, "%s setup done\n", __func__);
2598 dev_err(this->dev, "Multiple data instructions not supported\n");
2599 ret = -EINVAL;
2603 if (this->bch) {
2604 writel(this->bch_flashlayout0,
2605 this->resources.bch_regs + HW_BCH_FLASH0LAYOUT0);
2606 writel(this->bch_flashlayout1,
2607 this->resources.bch_regs + HW_BCH_FLASH0LAYOUT1);
2610 desc->callback = dma_irq_callback;
2611 desc->callback_param = this;
2612 dma_completion = &this->dma_done;
2617 if (this->bch && buf_read) {
2619 this->resources.bch_regs + HW_BCH_CTRL_SET);
2620 bch_completion = &this->bch_done;
2629 dev_err(this->dev, "DMA timeout, last DMA\n");
2631 ret = -ETIMEDOUT;
2635 if (this->bch && buf_read) {
2638 dev_err(this->dev, "BCH timeout, last DMA\n");
2640 ret = -ETIMEDOUT;
2646 this->resources.bch_regs + HW_BCH_CTRL_CLR);
2652 for (i = 0; i < this->ntransfers; i++) {
2653 struct gpmi_transfer *transfer = &this->transfers[i];
2655 if (transfer->direction != DMA_NONE)
2656 dma_unmap_sg(this->dev, &transfer->sgl, 1,
2657 transfer->direction);
2661 memcpy(buf_read, this->data_buffer_dma,
2664 this->bch = false;
2667 pm_runtime_mark_last_busy(this->dev);
2668 pm_runtime_put_autosuspend(this->dev);
2681 struct nand_chip *chip = &this->nand;
2686 mtd->name = "gpmi-nand";
2687 mtd->dev.parent = this->dev;
2689 /* init the nand_chip{}, we don't support a 16-bit NAND Flash bus. */
2691 nand_set_flash_node(chip, this->pdev->dev.of_node);
2692 chip->legacy.block_markbad = gpmi_block_markbad;
2693 chip->badblock_pattern = &gpmi_bbt_descr;
2694 chip->options |= NAND_NO_SUBPAGE_WRITE;
2697 this->swap_block_mark = !GPMI_IS_MX23(this);
2703 this->bch_geometry.payload_size = 1024;
2704 this->bch_geometry.auxiliary_size = 128;
2709 nand_controller_init(&this->base);
2710 this->base.ops = &gpmi_nand_controller_ops;
2711 chip->controller = &this->base;
2737 { .compatible = "fsl,imx23-gpmi-nand", .data = &gpmi_devdata_imx23, },
2738 { .compatible = "fsl,imx28-gpmi-nand", .data = &gpmi_devdata_imx28, },
2739 { .compatible = "fsl,imx6q-gpmi-nand", .data = &gpmi_devdata_imx6q, },
2740 { .compatible = "fsl,imx6sx-gpmi-nand", .data = &gpmi_devdata_imx6sx, },
2741 { .compatible = "fsl,imx7d-gpmi-nand", .data = &gpmi_devdata_imx7d,},
2742 { .compatible = "fsl,imx8qxp-gpmi-nand", .data = &gpmi_devdata_imx8qxp, },
2752 this = devm_kzalloc(&pdev->dev, sizeof(*this), GFP_KERNEL);
2754 return -ENOMEM;
2756 this->devdata = of_device_get_match_data(&pdev->dev);
2758 this->pdev = pdev;
2759 this->dev = &pdev->dev;
2765 pm_runtime_enable(&pdev->dev);
2766 pm_runtime_set_autosuspend_delay(&pdev->dev, 500);
2767 pm_runtime_use_autosuspend(&pdev->dev);
2777 dev_info(this->dev, "driver registered.\n");
2782 pm_runtime_dont_use_autosuspend(&pdev->dev);
2783 pm_runtime_disable(&pdev->dev);
2793 struct nand_chip *chip = &this->nand;
2801 pm_runtime_dont_use_autosuspend(&pdev->dev);
2802 pm_runtime_disable(&pdev->dev);
2822 dev_err(this->dev, "Error in resume %d\n", ret);
2828 /* re-init the GPMI registers */
2831 dev_err(this->dev, "Error setting GPMI : %d\n", ret);
2836 if (this->hw.clk_rate)
2837 this->hw.must_apply_timings = true;
2839 /* re-init the BCH registers */
2842 dev_err(this->dev, "Error setting BCH : %d\n", ret);
2881 .name = "gpmi-nand",