2350 	const struct nand_sdr_timings *sdr;  in cadence_nand_setup_interface()  local
2371 	sdr = nand_get_sdr_timings(conf);  in cadence_nand_setup_interface()
2372 	if (IS_ERR(sdr))  in cadence_nand_setup_interface()
2373 		return PTR_ERR(sdr);  in cadence_nand_setup_interface()
2385 	tdvw_min = sdr->tREA_max + board_delay_skew_max;  in cadence_nand_setup_interface()
2391 	 * for SDR timing modes 1, 2, 3, 4 and 5.  in cadence_nand_setup_interface()
2392 	 * If clk_period is 20ns the condition is met only for SDR timing  in cadence_nand_setup_interface()
2395 	if (sdr->tRC_min <= clk_period &&  in cadence_nand_setup_interface()
2396 	    sdr->tRP_min <= (clk_period / 2) &&  in cadence_nand_setup_interface()
2397 	    sdr->tREH_min <= (clk_period / 2)) {  in cadence_nand_setup_interface()
2400 		tdvw = calc_tdvw(trp_cnt, clk_period, sdr->tRHOH_min,  in cadence_nand_setup_interface()
2401 				 sdr->tREA_max, ext_rd_mode);  in cadence_nand_setup_interface()
2402 		tdvw_max = calc_tdvw_max(trp_cnt, clk_period, sdr->tRHOH_min,  in cadence_nand_setup_interface()
2425 			trp_cnt = (sdr->tREA_max + board_delay_skew_max  in cadence_nand_setup_interface()
2435 		trp_cnt = calc_cycl(sdr->tRP_min, clk_period);  in cadence_nand_setup_interface()
2436 		trh = sdr->tRC_min - ((trp_cnt + 1) * clk_period);  in cadence_nand_setup_interface()
2437 		if (sdr->tREH_min >= trh)  in cadence_nand_setup_interface()
2438 			trh_cnt = calc_cycl(sdr->tREH_min, clk_period);  in cadence_nand_setup_interface()
2442 		tdvw = calc_tdvw(trp_cnt, clk_period, sdr->tRHOH_min,  in cadence_nand_setup_interface()
2443 				 sdr->tREA_max, ext_rd_mode);  in cadence_nand_setup_interface()
2451 						 sdr->tRHOH_min,  in cadence_nand_setup_interface()
2475 			trp_cnt = (sdr->tREA_max + board_delay_skew_max  in cadence_nand_setup_interface()
2481 				 sdr->tRHOH_min,  in cadence_nand_setup_interface()
2484 	if (sdr->tWC_min <= clk_period &&  in cadence_nand_setup_interface()
2485 	    (sdr->tWP_min + if_skew) <= (clk_period / 2) &&  in cadence_nand_setup_interface()
2486 	    (sdr->tWH_min + if_skew) <= (clk_period / 2)) {  in cadence_nand_setup_interface()
2492 		twp_cnt = calc_cycl(sdr->tWP_min + if_skew, clk_period);  in cadence_nand_setup_interface()
2493 		if ((twp_cnt + 1) * clk_period < (sdr->tALS_min + if_skew))  in cadence_nand_setup_interface()
2494 			twp_cnt = calc_cycl(sdr->tALS_min + if_skew,  in cadence_nand_setup_interface()
2497 		twh = (sdr->tWC_min - (twp_cnt + 1) * clk_period);  in cadence_nand_setup_interface()
2498 		if (sdr->tWH_min >= twh)  in cadence_nand_setup_interface()
2499 			twh = sdr->tWH_min;  in cadence_nand_setup_interface()
2511 	tadl_cnt = calc_cycl((sdr->tADL_min + if_skew), clk_period);  in cadence_nand_setup_interface()
2512 	tccs_cnt = calc_cycl((sdr->tCCS_min + if_skew), clk_period);  in cadence_nand_setup_interface()
2513 	twhr_cnt = calc_cycl((sdr->tWHR_min + if_skew), clk_period);  in cadence_nand_setup_interface()
2514 	trhw_cnt = calc_cycl((sdr->tRHW_min + if_skew), clk_period);  in cadence_nand_setup_interface()
2532 	trhz_cnt = calc_cycl(sdr->tRHZ_max, clk_period);  in cadence_nand_setup_interface()
2534 	twb_cnt = calc_cycl((sdr->tWB_max + board_delay), clk_period);  in cadence_nand_setup_interface()
2552 	tfeat_cnt = calc_cycl(sdr->tFEAT_max, clk_period);  in cadence_nand_setup_interface()
2556 	tceh_cnt = calc_cycl(sdr->tCEH_min, clk_period);  in cadence_nand_setup_interface()
2557 	tcs_cnt = calc_cycl((sdr->tCS_min + if_skew), clk_period);  in cadence_nand_setup_interface()